1043 results about "Electric conductance" patented technology

An electrosurgical medical device and method for creating thermal welds in engaged tissue. In one embodiment, at least one jaw of the instrument defines a tissue engagement plane carrying a conductive-resistive matrix of a conductively-doped non-conductive elastomer. The engagement surface portions thus can be described as a positive temperature coefficient material that has a unique selected decreased electrical conductance at each selected increased temperature thereof over a targeted treatment range. The conductive-resistive matrix can be engineered to bracket a targeted thermal treatment range, for example about 60° C. to 80° C., at which tissue welding can be accomplished. In one mode of operation, the engagement plane will automatically modulate and spatially localize ohmic heating within the engaged tissue from Rf energy application—across micron-scale portions of the engagement surface. In another mode of operation, a conductive-resistive matrix can induce a “wave” of Rf energy density to sweep across the tissue to thereby weld tissue.

An MSW processing apparatus includes two or more semi-isolated reaction chambers separated from one another by isolation regions configured with two or more TIG elements, either or both of which may be independently purged. The TIG elements may be configured in a staircase-like fashion and include vertical and horizontal conductance spacings, sized so that, under different operational process temperatures of the MSW processing apparatus, a change in the horizontal conductance spacing is less than a change in the vertical conductance spacing.

A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. A single-sided word line architecture provides a word line exclusively for each row of memory elements instead of sharing one word line between two rows of memory elements thereby avoids linking the memory element across the array across the word lines. While the row of memory elements is also being accessed by a corresponding row of local bit lines, there is no extension of coupling between adjacent rows of local bit lines and therefore leakage currents beyond the word line.

A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. A double-global-bit-line architecture provides a pair of global bit lines for each bit lines for accessing a row of memory elements in parallel. A first one of each pair allows the local bit lines of the row to be sensed while a second one of each pair allows local bit lines in an adjacent row to be set to a definite voltage so as to eliminate leakage currents between adjacent rows of local bit lines.

Techniques for a post-write read are presented. In an exemplary embodiment, a combined simultaneous sensing of multiple word lines is used in order to identify a problem in one or more of these word lines. That is, sensing voltages are concurrently applied to the control gates of more than one memory cell whose resultant conductance is measured on the same bit line. The combined sensing result is use for measuring certain statistics of the cell voltage distribution (CVD) of multiple word lines and comparing it to the expected value. In case the measured statistics are different than expected, this may indicate that one or more of the sensed word lines may exhibit a failure and more thorough examination of the group of word lines can be performed.

Devices, systems, and methods for measuring parallel tissue conductance, luminal cross-sectional areas, fluid velocity, and/or determining plaque vulnerability using temperature. In at least one embodiment of a method to obtain parallel tissue conductance, the method comprises the steps of inserting at least part of a detection device into a luminal organ, applying current thereto, obtaining a native temperature measurement, injecting a solution of a known conductivity into the luminal organ, detecting a temperature change indicative of the fluid within the luminal organ, measuring an output conductance, and calculating a parallel tissue conductance based upon the output conductance and the conductivity of the injected solution.

Methods and apparatus for treating tinnitus are described where an oral appliance having an electronic and/or transducer assembly for generating sounds via a vibrating transducer element is coupled to a tooth or teeth. Generally, the transducer may generate one or more frequencies of sound via the actuatable transducer positioned against at least one tooth such that the sound is transmitted via vibratory conductance to an inner ear of the patient, whereby the sound completely or at least partially masks or provides sound therapy for habituation of the tinnitus perceived by the patient. The one or more generated frequencies may be correlated to measured tinnitus frequencies or they may be preset.

The present invention is directed to the development of a biosensor based on the immuno-chromatographic method that can provide an assay speed and convenience required for point-of-care (the doctor's office and emergency room) testing or home-version diagnosis. Though certain physical symptoms, such as pregnancy and ovulation, or bacterial infection may be identified by a qualitative analysis for the presence of indicating substances, most analytes for clinical investigation demand their concentrations known in specimens. Therefore, the inventors of the present invention have developed a novel biosensor by combining the immuno-chromatographic method and the electric conductivity detection technology so that on-site quantitative determination at the points of care or at home may be carried out.

A solid-state field-effect transistor device for detecting chemical and biological species and for detecting changes in radiation is disclosed. The device includes a quantum wire channel section to improve device sensitivity. The device is operated in a fully depleted mode such that a sensed biological, chemical or radiation change causes an exponential change in channel conductance of the transistor.

This is an iontophoresis device preferred to detect abnormal conductivity at the beginning of energization and during energization. The iontophoresis device has a device (50) as a power source and the device (50) comprises an electric energy generating portion (60) generating electric energy, an output portion (70) outputting the electric energy, and an abnormal conductivity detecting portion (80) detecting whether or not the electric energy is supplied normally. The detecting action of the abnormal conductivity detecting portion (80) is carried out at the time of the non-output action of the output portion (70). During the energization, the output action by the output portion (70) and the detecting action by the abnormal conductivity detecting portion (80) are alternated in response to a command received from the microcomputer (12).

A nanowire includes a single crystalline semiconductor material having an exterior surface and an interior region and at least one dopant atom. At least a portion of the nanowire thermally switches between two conductance states; a high conductance state, where a high fraction of the dopant atoms is in the interior region, and a low conductance state, where a lower fraction of the dopant atoms is at the interior region and a higher fraction of the atoms is at the exterior surface. A method to select the conductance of the nanowire increases a temperature of the nanowire at least in a local region to a programming temperature to thermally activate diffusion of a dopant atom into a bulk region of the single crystalline semiconductor material and decreases the temperature of the nanowire at least in the local region to a second temperature to immobilize dopant atoms in the bulk region, the second temperature being below the programming temperature, wherein immobilized dopant atoms in the bulk region produce a desired high or low conductance state in the nanowire. The method can be used to initially configure and to reconfigure a circuit incorporating the nanowire.

A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes.

Plasma containment is achieved within a region by a containment plate while gas is allowed to flow through this region by openings in the plate. The openings in the plate are larger in two of the cross-sectional dimensions parallel to the plate surface than the thickness of the dark space or plasma sheath. This plasma containment plate allows high conductance for conditions including those of long molecular mean free path and thick material deposits on the interior chamber of the plasma reactor.

Neural Network Loadflow (NNL) computation method is invented involving input vector composed of net nodal injection of real and reactive powers and diagonal elements of conductance and susceptance matrices multiplied by the squared voltage magnitude components of the flat-start normally used as initial solution estimate guess for loadflow solution by conventional NRL or SSDL methods. Training, and testing/validating input-output data sets are generated by applying uniform and non-uniform scaling factors applied to base case loads at PQ-nodes, resistance and reactance of transmission line branches. These scale factors are increased until loadflow solution by conventional methods such as Newton-Raphson Loadflow and Super Super Decoupled Loadflow methods diverge. Divergence of loadflow methods are due to node voltage, node angle, and numerical instabilities. Voltage magnitude and phase angle values in the solution before divergence are respective stability limits and voltage magnitude and phase angle values in loadflow solution provide direct measure to the respective stability margins. Also Suresh's diakoptiks based feature selection technique is presented for ANNs calculating one node variable with one neuron each in their output layers.

A three-dimensional array is especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. During sensing, to compensate for word line resistance, a sense amplifier references a stored reference value during sensing of a memory element at a given location of the word line. A layout with a row of sense amplifiers between two memory arrays is provided to facilitate the referencing. A selected memory element is reset without resetting neighboring ones when it is subject to a bias voltage under predetermined conditions.

Embodiments for monitoring one or more utilities consumed within a monitored area including detecting an amount of a first utility consumed by a load associated with a device and an amount of a second utility consumed by a load associated with the device. The identity of the device is determined based on the amount of the first and second utility consumed. A utility monitoring method is disclosed that includes measuring an amount of a utility consumed by a first device at a first time and an amount of a utility consumed by a second device at a second time. The identity of the first device is determined based on the measured consumption of the first and second devices at the first and second time. In certain implementations, the electricity meter uses an effective variance analysis of the conductance waveform on an electrical circuit to identify specific appliances.

A water level controller for a tank has control circuitry and multiple conductance terminals connected to the control circuitry and located at different heights from the other. By such an arrangement, the water level can be determined when the conductance of the water measured by corresponding conductance terminals becomes zero. The water inlet can be controlled to add to the tank by the control circuitry as the conductance measured by two of the corresponding terminals becomes practically negligible. Consequently, the water level in the tank can be accurately controlled, and the controller can be used with pure water so as to enlarge the useful scope of the controller.

A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes.

A liquid crystal display includes a pair of support substrates, a liquid crystal layer held between the substrates, and pixel circuits that are arrayed in a matrix on one of the substrates and control the alignment state of liquid crystal molecules. Each pixel circuit includes first and second power terminals, first and second pixel electrodes that apply a liquid crystal drive voltage to the liquid crystal layer to create a substantially lateral electric field, and first and second drive transistors that have gate electrodes for receiving a video signal, that are connected between the first power terminal and the first pixel electrode and between the second power terminal and the second pixel electrode, respectively, and that cause the liquid crystal drive voltage determined by conductances that vary in accordance with the video signal, to be retained in a liquid crystal capacitance between the first and second pixel electrodes.

A modulated Class E transmitter is disclosed. In one embodiment of the invention, the modulated Class E oscillator achieves high coil currents (˜1A) and voltages (˜500V) with low power components by precisely timed injection of current when the oscillating current in the inductor passes through zero. A detector circuit is used to trigger the current injection at the appropriate instant regardless of changes in the resonant frequency of the system. Its phase can be adjusted to compensate for propagation delays in the drive circuitry, while amplitude modulation is accomplished by switching in additional reactive conductance to increase the current injected into the tank circuit.

The present invention includes a chemical monolayer construction that comprises: a substrate having a contact surface, and a monolayer of a plurality of substantially parallel molecular units attached to the contact surface of the substrate. The molecular units are strongly coupled electronically to the substrate. The contact surface of the substrate has a roughness value less than or equal to the average length of the molecular units. The molecular units comprise a chemical structure that is capable of being changed from a relatively non-conductive state to a relatively conductive state by the application of a stimulus. The present invention also includes electronic circuit components and devices including chemical monolayer constructions.