389 results about "Line resistance" patented technology

A method and apparatus for aggregating power from multiple sources generates a single direct current regulated voltage. The apparatus comprises a plurality of slave voltage converters and a master pulse width modulator circuit. Providing a plurality of direct current power sources, current is drawn through a plurality of lines connected to the plurality of direct current power sources. An open circuit voltage for each direct current power source is unknown. Each line of the plurality of lines has a line resistance. The line resistance of at least some of the plurality of lines may be unknown. The line resistance of at least some of the plurality of lines is large. The single direct current regulated voltage is generated from the drawn current.

At a writing time, a first transistor 412 is turned on so that a data signal Xj is supplied to one end of a capacitor 420. At this time, since a second transistor 414 is turned off, driving current does not flow to an organic light emitting diode (OLED) device 430. A power supply voltage Vdd is supplied to the other end of a capacitor through a power supply line L. However, since the driving current does not flow at the writing time, the power supply voltage Vdd is not reduced by the wiring line resistance of the power supply line L. On the other hand, at an emission time, the first transistor 412 is turned off and the second transistor 414 is turned on. Therefore, the driving current is supplied to the OLED device 430.

A three-dimensional array is especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. During sensing, to compensate for word line resistance, a sense amplifier references a stored reference value during sensing of a memory element at a given location of the word line. A layout with a row of sense amplifiers between two memory arrays is provided to facilitate the referencing. A selected memory element is reset without resetting neighboring ones when it is subject to a bias voltage under predetermined conditions.

An electrically-driven liquid crystal lens wherein electric connection between finely split electrodes and signal lines used to apply signals to the split electrodes can be accomplished using a minimal number of masks and signals can be applied to the finely split electrodes without line resistance, and a stereoscopic display device using the same are disclosed. The liquid crystal lens includes first and second substrates arranged opposite each other and each defining a plurality of lens regions, a plurality of metal lines formed on the first substrate, a first insulating film formed on the first substrate, a plurality of first electrodes formed on the first insulating film in the respective lens regions to intersect the plurality of metal lines, a second insulating film formed on the first electrodes, a plurality of second electrodes formed on the second insulating film at positions alternating with the first electrodes, a first contact structure between the first electrodes and the metal lines using a transparent electrode pattern of the same layer as the second electrodes, a second contact structure between the second electrodes and the plurality of metal lines, a common electrode formed over the entire surface of the second substrate, and a liquid crystal layer filled between the first substrate and the second substrate.

The present invention provides a structure of a semiconductor device that realizes low power consumption even where increased in screen size, and a method for manufacturing the same. The invention forms an insulating layer, forms a buried interconnection (of Cu, Au, Ag, Ni, Cr, Pd, Rh, Sn, Pb or an alloy thereof) in the insulating layer. Furthermore, after planarizing the surface of the insulating layer, a metal protection film (Ti, TiN, Ta, TaN or the like) is formed in an exposed part. By using the buried interconnection in part of various lines (gate line, source line, power supply line, common line and the like) for a light-emitting device or liquid-crystal display device, line resistance is decreased.

The present invention relates generally to detecting energy theft within an energy distribution system and more particularly to systems and methods for detecting energy discrepancies in voltages and/or currents reported by electric meters present in a distribution circuit, without requiring installation of additional hardware at the transformer. Typically, the location of each of at least two meters is determined with respect to a transformer. The line resistances within the distribution circuit are determined starting with a line resistance farthest from the transformer. Estimated line voltages are determined for at least one electric meter using the estimated line resistances, and the estimated voltages are compared to actual voltage readings for the at least one electric meter. The existence of line loss is determined based on this comparison.

A memory device includes a plurality of blocks, with each block having a respective array of memory cells and respective local word lines. The memory device also includes a respective switching device coupled between each local word line and a common voltage node. A global word line driver controls the respective switching devices to turn on for respective local word lines in a row across the blocks including an accessed memory cell. Thus, the common voltage node is in the current path of the accessed memory cell with minimized layout area and resistance of the current path.

A plurality of metal interconnects incorporating a Group II element alloy for protecting the metal interconnects and method to form and incorporate the Group II element alloy are described. In one embodiment, a Group II element alloy is used as a seed layer, or a portion thereof, which decreases the line resistance and increases the mechanical strength of a metal interconnect. In another embodiment, a Group II element alloy is used to form a barrier layer, which, in addition to decreasing the line resistance and increasing the mechanical integrity, also increases the chemical integrity of a metal interconnect.

A flat panel display reduces the line resistance of a driving power supply line and prevents a voltage drop in the driving power supply line so as to obtain uniform resolution and luminance. The flat panel display includes a substrate, a display region formed on the substrate, the display region having a self-luminescent element and VDD lines that supply a driving potential power and/or a source current to the self-luminescent element. Further, a covering member for sealing the display region at least, the covering member being adhered to the substrate to face the substrate and a terminal region formed on one or more edges of the substrate, the terminal region having one or more driving power terminals are provided. In addition, a driving power supply line that connects the driving power terminals to the VDD lines of the display region and a bus conductive unit that is electrically connected to the driving power supply line are provided.

The invention provides polyamide6-graphene quantum dot/carbon nanotube anti-static fiber and preparation. According to the method, the molecular template effect of graphene quantum dots is utilized for being compounded with a carbon nanotube to form a self-assembled three-dimensional network structure first and then combined with a PA6 knitting state structure to form a dislocation effect to construct a conductive path, conductivity is improved on the condition of not losing a mechanical property of PA6 fiber, and meanwhile conductivity and the mechanical property of the PA fiber are promoted. Moreover, by means of compounding of the graphene quantum dots and the carbon nano tube and the self-assembled three-dimensional network structure, electronic transmission efficiency in the carbon nano tube is improved, a small quantity of GQD/CNT is added, conductivity of the fiber can be improved, and transparency is improved at the same time, which is beneficial for treatment technologies like dyeing in the fiber preparing process. By means of the traditional mature PA6 melt spinning technology, the high-strength and high-conductivity PA6-GQD/CNT composite fiber with tensile strength being 0.52-0.81 GPa and line resistance being magnitude 106 is prepared and can be applied to anti-static clothes, needle-punched carpet, filter felt, industrial non-woven fabric, medical supplies and the like.

The present invention relates to a data signal distortion compensation method and circuit for liquid crystal display panels, which is a method and a circuit that utilize adjusting the linear increase of the opening time width of scanning signals. As the total electric charge amount of the capacitance supplied to one row of display units can be the same, the reflected brightness can be the same as well. Therefore, the present invention can obviously improve the uneven brightness phenomenon caused by the on-line resistance-capacitance effect of data, so as to improve the phenomenon that liquid crystal display panels are uneven in brightness.

A liquid crystal display and a method of driving the same is capable of for preventing a difference in brightness from occurring between horizontal line blocks. A liquid crystal display includes a liquid crystal display panel having liquid crystal cells arranged in a matrix pattern; at least one integrated circuit for driving the liquid crystal display panel; a supply line commonly connected to the at least one integrated circuit for applying drive signals to the at least one integrated circuit; and a signal-limiting part formed at an input terminal of the supply line, wherein the supply line has a higher resistance than the sum of the line resistances of the entire supply line.

This invention relates to one 2D displacement measurement method, which comprises the following steps: according to Wheatstone bridge circuit test principle to distribute the bridge resistance wire into direct or arc shape and the direct resistance wire is to test line displacement; the arc resistance wire is to test arc length change volume and then according to the relationship between arc length and radium to get test point rotary angle; through testing points in electrode coordinate displacement change to realize 2D displacement. The 2D displacement sensor comprises the test bridge line resistance wire and arc resistance wire fixed onto one structure around axis and it also comprises data transmission line.

Provided is an organic light emitting diode (OLED) display device including a substrate on a front side of the OLED display device that is coupled to an encapsulation substrate on the back side of the OLED display device. An interconnection line is disposed in a predetermined region of the encapsulation substrate corresponding to a portion of the substrate on which no interconnection lines are disposed. Alternatively, a common power supply line is disposed only on the encapsulation substrate. As a result, a dead space in a display region of the substrate can be reduced so that other lines can be disposed in an interconnection line region of the substrate, and the display region can be further expanded. Also, since a wide interconnection line can be disposed on the encapsulation substrate, line resistance is decreased and a voltage drop can be reduced.

A display substrate includes source lines, gate lines, an output pad part, a fan-out part and a first voltage line part. The source lines are in a display area. The gate lines cross the source lines. The output pad part is in a peripheral area surrounding the display area and is electrically connected to output terminals of a driving chip. The fan-out part is electrically connected between the output pad part and the source lines. The first voltage line part is inclined with respect to a central line of a chip area in which the driving chip is mounted toward opposite sides of the chip area to cross the fan-out part. Therefore, the line reactance of the fan-out part is decreased and the uniformity of the line resistance of the fan-out part is increased to improve image display quality.

Disclosed is a full color flat display panel by using an organic electro-luminescent(EL) device, a manufacturing method thereof and a driving circuit of the organic EL device, in particular, which includes first, second and third pixels, a plurality of first electrodes, and a plurality of second electrodes perpendicularly intersecting the first electrodes, in which each of the first, second and third light emitting pixels is arranged in each of intersecting positions of the first and second electrodes. Light emitting pixels are arranged to have different areas according to luminous efficiency so that a red light emitting area with relatively poorer efficiency is sized larger than a blue or green light emitting area thereby manufacturing an efficient full color organic EL display panel. Also, the influence from the line resistance in the anode lines and the cathode lines is reduced when a constant current is introduced into the device structured of the RGB array in order to realize the white light as full color. Thus, the voltage loss on the line resistance is prevented and the area ratio of the device is adjusted to make each of the RGB pixels for generating the white light have the similar value of drive voltage thereby minimizing power loss.

A method for manufacturing a thin film transistor substrate including forming bus lines by etching a surface of a substrate to form bus line patterns and filling the bus line patterns with a bus line metal; forming a semiconductor channel layer at one portion of a pixel area defined by the bus lines; and forming source-drain electrodes on the semiconductor channel layer, a pixel electrode extending from the drain electrode within the pixel area, and a common electrode parallel with the pixel electrode. The bus lines are formed as being thicker but the bus lines are buried in the substrate so that the line resistance can be reduced and the step difference due to the thickness of bus line does not affect the device.

The invention belongs to the field of solar cells, and provides an electrode of a full-back-contact solar cell and a fabrication method of the electrode. The electrode is characterized in that the electrode comprises first fine grid metal electrodes, second fine grid metal electrodes, first main grid electrodes, second main grid electrodes and first dielectric layers, wherein the first fine grid metal electrodes, the second fine grid metal electrodes, the first main grid electrodes and the second main grid electrodes are positioned on a first main surface of a substrate; the first fine grid metal electrodes and the second fine grid metal electrodes are alternately distributed in an inter-digital shape; the first main grid electrodes and the second main grid electrodes are intersected with the first fine grid metal electrodes and the second fine grid metal electrodes respectively; intersected and overlapped parts between the first main grid electrodes and the second fine grid metal electrodes are isolated from intersected and overlapped parts between second first main grid electrodes and the first fine grid metal electrodes by the dielectric layers; and the first main grid electrodes and the first fine grid metal electrodes are directly contacted with the second main grid electrodes and the second fine grid metal electrodes in intersected and overlapped positions. Compared with the prior art, according to the electrode and the fabrication method, an influence of electrical shading of the electrode is eliminated; line resistance losses of the electrode are reduced; and the performance of a device is improved.

In a display substrate and a display device having the display substrate for reducing a line resistance, the display substrate includes a plurality of pixel parts, a signal line part and a signal pad part. The pixel parts are formed in a display area. The signal line part is formed in a peripheral area surrounding the display area. The signal line part includes a first line formed with a first conductive layer, and a second line formed with a second conductive layer over the first line. The second line overlaps the first line. The signal pad part includes a first pad integrally formed with the first line, and a second pad integrally formed with the second line, wherein an identical driving signal is applied to the first pad and the second pad. Accordingly, the line resistance of the signal line part may be reduced.

Provided is an organic light emitting display device. The organic light emitting display device includes: a plurality of sub-pixels including an anode and a cathode; an anode line configured to supply an anode voltage to the anode; and a cathode line configured to supply a cathode voltage to the cathode, and in each of the plurality of sub-pixels, a direction of an anode voltage input of the anode line and a direction of a cathode voltage input of the cathode line are different from each other and face each other in order to reduce a deviation in a potential difference between the anode and the cathode. Thus, it is possible to improve uniformity in the potential difference between the anode and the cathode caused by a line resistance.

The invention relates to a system for automatically controlling winding tension of a transformer coil. The system comprises an uncoiler, a recoiler, an uncoilder rotary torque adjusting device and a recoiler rotary torque adjusting device, wherein the uncoilder rotary torque adjusting device comprises an uncoiling drum winding diameter detection component and an adjustment controller; the uncoiling drum coiling diameter detection component is used for detecting the coiling diameter variation of the uncoiling drum; the adjustment controller is used for dynamically adjusting the rotary torque of the uncoiling drum according to the coiling diameter variation, so that the current tension of a winding material wound on the uncoiling drum in the rotating process is in the error range of the preset tension value; the recoiler rotary torque adjusting device comprises a coil coiling diameter detection component and a transducer; the coil coiling diameter detection component is used for detecting the coiling diameter variation of a winding carrier; and the transducer is used for dynamically adjusting the rotary torque of the winding carrier, so that the tension of a winding material wound on the winding carrier is constant. The resistance unbalance ratio of the transformer coil can meet the related requirement of the national standard, for example, the interphase resistance unbalance ratio is less than or equal to 4 percent and the line resistance unbalance ratio is less than or equal to 2 percent.