9 results about "Carrier scattering" patented technology

The invention provides an oxide thin film transistor and a preparation method thereof. The composite active layer at least comprises a first layer and a second layer which are stacked on the substrate and are arranged in a contact manner; the source and drain electrode layer is arranged on the substrate and is electrically connected with the composite active layer; wherein lattice constant difference exists between the first layer and the second layer; the second layer is a metal oxide semiconductor, and the proportion of metal atoms of the second layer is monotonically decreased from the substrate side to the top surface. The lattice constant difference of the first layer and the second layer enables lattice mismatch of the first layer and the second layer to introduce compressive strain in the second layer, the energy band structure of the second layer is optimized, the interface defect density is reduced, and carrier scattering is reduced; the proportion of metal atoms in the second layer is monotonically decreased to form a built-in electric field, carriers are guided to be directionally transmitted, scattering paths are reduced, and the carrier mobility is remarkably improved through the synergistic effect of the two.

The invention discloses a WS2 / MoS2 heterojunction photoelectric detector with a three-dimensional array structure and a preparation method of the WS2 / MoS2 heterojunction photoelectric detector, and belongs to the technical field of photoelectric detection. According to the invention, the array substrate with the spatially ordered three-dimensional conical structure is firstly constructed, and the structure utilizes the specific geometric and physical advantages of a three-dimensional interface, so that the light absorption and light capture capabilities are obviously improved, the carrier transmission path is optimized, the carrier scattering and recombination caused by interface defects are inhibited, and the light absorption and light capture capabilities are improved; and then preparing a large-area continuous three-dimensional array WS2 / MoS2 heterojunction composite film with a uniform structure in a conical side slope region of the three-dimensional conical array substrate, so that the specific surface area and charge mobility of the heterojunction composite film are remarkably improved, a carrier transmission path is optimized, the interface quality is improved, and the performance of the three-dimensional array WS2 / MoS2 heterojunction composite film is improved. Noise generation is effectively suppressed while the light response sensitivity is enhanced, so that the sensitivity and the signal-to-noise ratio of the device are cooperatively improved.

The invention discloses an organic field effect rectifier transistor based on asymmetric carrier scattering potential distribution and a preparation method thereof, and belongs to the field of organic semiconductor devices. According to the invention, a preset asymmetric carrier scattering potential distribution is constructed in a conductive channel region of an active layer. The scattering potential distribution utilizes the coupling effect of inherent structural asymmetry and electrical asymmetry (pinch-off effect) generated by grid voltage regulation and control when the transistor works, so that the effective resistance of the device along the first direction is unequal to the effective resistance of the device along the opposite second direction, and the effective resistance of the device along the first direction is not equal to the effective resistance of the device along the opposite second direction under the condition that a p-n junction or a material heterojunction is not needed. And an efficient and controllable rectification function is realized. The method can be realized through micro-nano processing steps compatible with a standard process, the problems that an organic rectifier in the prior art depends on a complex structure and the process difficulty is large are solved, and the method can be widely applied to the fields of undoped logic circuits, radio frequency identification, flexible electronics and the like.

The invention relates to the technical field of semiconductors, in particular to a novel epitaxial structure based on irradiation two-dimensional h-BN and a preparation method thereof.The structure comprises a free substrate, a buffer layer and a GaN epitaxial layer which are sequentially arranged from bottom to top, and the buffer layer comprises an irradiation two-dimensional h-BN layer, a low-temperature AlN layer and a high-temperature AlN layer; the irradiation two-dimensional h-BN layer is made of two-dimensional h-BN / Cu foil through nitrogen ion irradiation and gradient annealing processes. According to the method, h-BN is modified through nitrogen ion irradiation, the influence of the substrate is shielded, carrier scattering can be avoided, and local lattice reconstruction is induced to form epitaxial nucleation points while irradiation defects are stabilized through a gradient annealing process.

This invention discloses a superlattice material with high thermoelectric performance and its preparation method, belonging to the field of thermoelectric materials technology. The method includes: [preparing AgSb...] 1‑x Hg x The molar ratio of each element in Se2 is determined by mixing the raw materials, heating, and reacting to obtain a metal ingot. The metal ingot is ground into powder, and a quartz tube containing the metal mixture powder is placed in a vertical single-temperature zone Bridgman furnace for melting and reaction. After the reaction, the temperature is lowered. After cooling, the quartz tube is moved downward to create a temperature difference between its upper and lower ends. Heating in the furnace is stopped, and the temperature is lowered to room temperature. This method allows for the complete melting of the metal raw materials and the directional crystallization growth, resulting in a high-crystallinity superlattice crystal. The prepared superlattice crystal exhibits significantly reduced grain boundary defects, enabling the formation of a superstructure. In Hg-doped AgSbSe2, carrier scattering intensity is significantly reduced, and the influence of impurity scattering is minimized, thus achieving a simultaneous improvement in carrier transport performance and power factor.

The invention discloses a PHEMT (Pseudomorphic High Electron Mobility Transistor) device, which comprises a GaAs substrate; the AlGaAs lower potential barrier layer is arranged on the GaAs substrate; the InGaAs channel layer is stacked on the AlGaAs lower potential barrier layer; the perovskite enhancement layer is stacked on the InGaAs channel layer; the AlGaAs upper potential barrier layer is laminated on the perovskite enhancement layer; and the GaAs ohmic contact layer is laminated on the AlGaAs upper potential barrier layer. The PHEMT device and the manufacturing method thereof at least have one of the following advantages: 1, the perovskite enhancement layer and the InGaAs channel layer form a staggered energy band structure to generate energy band offset, so that a built-in electric field is generated and electron limitation is enhanced; 2, the perovskite enhancement layer can reduce the interface dislocation density and improve the channel two-dimensional electron gas mobility; 3, due to the defect passivation effect of the perovskite enhancement layer, the interface state density can be reduced, and carrier scattering can be inhibited; and 4, the perovskite enhancement layer can restrain the deep energy level defect in the AlGaAs, so that the performance of the device can be maintained at 200 DEG C.

The invention discloses a super-junction groove type 4H-SiC MOSFET integrated with a heterojunction, and belongs to the technical field of semiconductor power chips. The device is composed of drain metal, an N + substrate region, an N-drift region, a P-super junction region, a P + polysilicon gate, an N-polysilicon region, an N-body region, an N + polysilicon source region, an N + body source region, source metal, a source trench, a gate trench and a P + separation gate. A heterojunction structure with a low potential barrier is introduced into the device, current does not flow through the body diode when the device works reversely, and the bipolar degradation effect existing when the device works in a third quadrant is effectively eliminated. In order to optimize the performance of the device, an accumulation type conducting channel is further designed, the accumulation type conducting channel conducts electricity by means of majority carriers, scattering of the carriers is little, the mobility is increased, the switching speed of the device is effectively improved, and the on-resistance of the device is reduced. In addition, the device is excellent in reliability and breakdown characteristic.

The application discloses AuPtPdNi-based bimodal heterojunction high-entropy alloy electric contact material and a preparation method thereof, and belongs to the technical field of electric contact materials.The AuPtPdNi-based bimodal heterojunction high-entropy alloy electric contact material comprises Au, Pt, Pd and Ni in equal atomic proportions.A bimodal distribution of grains is introduced into the heterostructure through cold rolling and double-stage aging treatment, and a multistage organizational structure of soft and hard alternation is formed in the material, so that the ductility is significantly improved while the hardness of the material is maintained.In addition, the combination of cold rolling and double-stage aging treatment and the design of the multi-principal element alloy composition form phase interfaces with different energy band structures in the matrix, the built-in electric field generated at the hetero-interface can effectively reduce the carrier scattering probability, reduce the grain boundary barrier height and reduce the resistivity.Meanwhile, the coherent or incoherent interface in the heterostructure can be used as a fast transmission channel for carriers, so that the carrier mobility is improved, and the material still maintains excellent conductivity stability under high-frequency and large-current working conditions.

The application provides a multi-doped high-mobility ceramic target material and a preparation method and application thereof, and belongs to the technical field of ceramic materials. The application effectively provides extra electrons by introducing titanium oxide and gallium oxide as doped components, realizes the regulation of carrier concentration, and further improves the optical performance of the material. The doping of zirconium oxide can inhibit the excessive growth of crystal grains, refine the microstructure, and thus reduce the carrier scattering caused by the crystal boundary and defects. In addition, the introduction of cerium oxide effectively compensates for the lattice distortion caused by other doped elements, relieves internal stress, balances the lattice structure, and thus enhances the overall structural stability of the material. The synergistic effect of the multi-doped system introduced in the raw material can make the prepared ceramic target material have excellent characteristics such as high density, low resistivity and uniform composition distribution.