54 results about "Dangling bond" patented technology

The invention provides a method for improving metal-semiconductor contact based on a silane coupling agent and application. The method comprises the steps that a semiconductor device is provided, the semiconductor device comprises a metal-semiconductor contact structure, the metal-semiconductor contact structure is Schottky contact, and a semiconductor material, in contact with a metal material, contained in the metal-semiconductor contact structure comprises a two-dimensional semiconductor material with hydroxyl on the surface; the semiconductor device is in contact with a silane coupling agent solution, so that the silane coupling agent reacts with hydroxyl on the surface of the two-dimensional semiconductor material, a molecular passivation layer is formed on the surface of the two-dimensional semiconductor material, and Schottky contact is converted into ohmic contact. According to the method provided by the invention, the molecular passivation layer is constructed on the surface of the two-dimensional semiconductor material by adopting the silane coupling agent, so that a surface dangling bond and an interface state in the metal-semiconductor contact structure are effectively eliminated, the metal-semiconductor contact structure is converted from Schottky contact to ohmic contact, and the stability and the reliability of a semiconductor device are improved.

This invention discloses a TOPCon cell structure and its fabrication method, belonging to the field of photovoltaic technology. The TOPCon cell structure includes a boron-doped emitter, a first-phase Al2O3 amorphous layer, a second-phase γ-Al2O3 metastable layer, and a gradient composite film layer sequentially disposed on the surface of an N-type silicon substrate. In the TOPCon cell obtained by this invention, the first-phase Al2O3 amorphous state exhibits long-range disorder, non-periodic atomic arrangement, and contains numerous dangling bonds and structural defects. The second-phase γ-Al2O3 metastable state possesses high specific surface area and good thermal stability, enabling the synergistic formation of a high-density fixed negative charge. These charges effectively repel minority carriers, reducing surface recombination. The long-range disordered Al2O3 amorphous state and the partially ordered γ-Al2O3 form a metastable combination, which facilitates the formation of numerous dangling bonds at the alumina-silicon interface. These dangling bonds, with the assistance of hydrogen, effectively fix the negative charge, thereby achieving an extremely low surface recombination rate and exhibiting excellent passivation effects.

The present invention provides a phase shifter that can be manufactured using a CMOS process, exhibits low optical propagation loss, can maintain refractive index changes without power supply, and allows for the resetting of those refractive index changes. [Solution] The phase shifter 100 of the present invention comprises an optical waveguide 101 composed of a core 105 and a cladding 106 surrounding the core 105, a substrate 102 on which the optical waveguide 101 is mounted, a heating means 103 for heating the core 105, and an ultraviolet irradiation means 104 for irradiating the core 105 with ultraviolet U, wherein the core 105 mainly contains silicon nitride, and the density of silicon dangling bonds of silicon nitride is 10 in terms of spin density 18 cm -3 The above 10 20 cm -3 The following applies:

The application belongs to the technical field of display, and particularly relates to an IGZO thin film transistor based on gradient gallium doping and hydrogen plasma treatment and a preparation method thereof. The application adopts ALD technology to construct a three-section linear gradient Ga-doped active layer, the bottom low Ga area ensures efficient carrier transport, the migration rate can reach 58.7 cm 2 Vs, the top high Ga area uses the high electronegativity of Ga-O bond and the wide band gap characteristics to inhibit the back channel defects, the Delta Vth under NBITS test is as low as 2.2 V, and the stability is improved by more than 5 times compared with the undoped device. In-situ hydrogen / oxygen plasma composite treatment is carried out in the ALD chamber, the saturation dangling bond is compensated, the interface state density is controlled to be ≤10 12 cm ‑2 eV ‑1 , and the sub-threshold swing is optimized. Periodic pauses are introduced in the active layer deposition, the film surface roughness is ≤0.5 nm; a two-step method is used for contact hole etching, and the top high Ga layer is ≥5 nm. The comprehensive performance meets the high-end application requirements such as high-resolution display and flexible display, and the application value and market competitiveness are remarkable.

The invention discloses a photovoltaic cell, a photovoltaic module and a processing method of the photovoltaic cell, the surface of the photovoltaic cell is provided with an antireflection layer, and the antireflection layer has a saturated bond; when the anti-reflection layer on the surface of the photovoltaic cell is characterized by adopting a Raman scattering spectrum analysis test, a Raman spectrum chart obtained by the anti-reflection layer has a characteristic peak A, and the ratio range of the peak intensity of the characteristic peak A to the half-peak width is 1-25. According to the photovoltaic cell, a Raman spectrum chart in the antireflection layer has a characteristic peak A at the position, the ratio range of peak intensity to half-peak width is 1-25, the characteristic peak A is relatively sharp, intermolecular acting force in a molecular structure of the characteristic peak A is high, chemical bonds are not prone to breakage, and therefore the characteristic peak A at the position is the characteristic peak corresponding to a saturated bond; therefore, a large number of saturated bonds exist in the antireflection layer, and only a small number of unsaturated bonds or dangling bonds exist in the antireflection layer, so that the stability and passivation effect of the antireflection layer are ensured, and the photovoltaic cell is further ensured to have relatively good power generation efficiency.

The invention provides a direct bonding method based on laser surface activation and repair. The direct bonding method comprises the steps of wafer cleaning, high-energy laser processing, low-energy laser processing and wafer bonding. According to the method, atoms on a wafer bonding interface are activated by using high-energy laser, diffusion of the atoms is promoted, surface dangling bonds are opened, and favorable conditions are created for the subsequent bonding process. Then, a low-energy laser is used to repair an amorphized or lattice damaged layer of the bonding interface. The invention provides a bonding method which can be carried out at room temperature and can realize lattice repair while activating. According to the method, additional annealing treatment is not needed, laser treatment only acts on the surface of the wafer, meanwhile, the specific rapid temperature rising and falling characteristic of laser processing is fully utilized, the influence on the wafer is strictly limited to the extremely shallow surface layer of the wafer, the overall thermal budget is reduced, meanwhile, thermal damage to the wafer body is avoided, and the wafer quality is improved. The method is especially suitable for high-quality bonding preparation of heat-sensitive devices. Besides, the method has excellent compatibility, and can be combined with the prior art of plasma activation, surface activation bonding and the like to improve the flexibility of the bonding process and the product quality.

The application discloses a power device and a preparation method thereof and electronic equipment, and relates to the technical field of electronic components. The power device comprises a semiconductor substrate and a two-dimensional metal material layer on the surface of the semiconductor substrate. In the application, the two-dimensional metal material layer is in contact with the semiconductor substrate to form an electrode contact. Since the two-dimensional layered metal material forming the two-dimensional metal material layer has an atomically flat surface without dangling bonds, the two-dimensional layered metal material can provide a uniform and low-wrinkle surface for the interface between the metal and the semiconductor substrate, which is beneficial to improving the contact quality, reducing the influence of the rough surface of the semiconductor substrate, improving the transport efficiency of the carriers, and further improving the performance of the semiconductor power device.

The invention provides a quantum dot patterning preparation method based on a corner two-dimensional material, and relates to the technical field of quantum dot growth. The method comprises the following steps: preparing two-dimensional materials with Van der Waals layered structures on at least two substrates respectively; detecting the crystal orientation of each two-dimensional material, and under the condition of determining that the crystal orientations of at least two two-dimensional materials are consistent, taking one two-dimensional material as a reference, and superposing the other two-dimensional material on the two-dimensional material as the reference at a preset corner to generate a corner two-dimensional material Moire superlattice; the corner two-dimensional material Moire superlattice serves as an epitaxial substrate, a quantum dot material grows in a Van der Waals epitaxy mode, and the growth face of the epitaxial substrate represents the Van der Waals surface, without dangling bonds, of the corner two-dimensional material Moire superlattice; and based on the periodic surface potential of the Moire superlattice of the corner two-dimensional material, controlling the quantum dots to be periodically arranged on the growth surface of the epitaxial substrate, and finally preparing a regular quantum dot array structure.

The invention provides a wafer bonding structure and a forming method thereof, and the method comprises the steps: providing a first wafer structure which comprises a first wafer and a first bonding layer; doping ion implantation is carried out on the surface of the first bonding layer, so that a second bonding layer is formed on the surface of the first bonding layer; performing hydrogen ion implantation on the surface of the second bonding layer to form a hydrogen ion layer on the surface of the second bonding layer; performing plasma bombardment on the hydrogen ion layer and the second bonding layer so as to form dangling bonds of the doped ions in the hydrogen ion layer and the second bonding layer; providing a hydroxyl source, and enabling the surface of the dangling bond to adsorb hydroxyl; aligning the hydrogen ion layers in the two first wafer structures, and performing pre-bonding; and carrying out second annealing treatment to realize bonding of the two first wafer structures. According to the bonding method, the bonding strength is improved.

The invention discloses a laser crystal bonding method based on excimer laser surface activation, and belongs to the technical field of laser crystal surface modification and bonding. The activation method comprises the following steps: carrying out precise polishing and cleaning treatment on the surface of a laser crystal to be bonded; and carrying out irradiation activation treatment on the treated crystal surface by adopting excimer laser. The bonding method comprises the following steps of: activating the surfaces of the crystals by adopting the activating method, and laminating the surfaces of the two crystals subjected to activating treatment at room temperature to form an initial optical cement interface; and carrying out heat treatment annealing on the crystal assembly subjected to optical cement. High-energy ultraviolet photons of short-wavelength excimer laser are utilized to initiate surface chemical bond breakage, high-activity sites such as dangling bonds are formed, and the surface energy and the surface activity of the crystal are remarkably improved. The method does not need to introduce a chemical reagent, is small in heat influence, remarkably improves the bonding strength after activation, and is suitable for large-size crystal treatment.

The invention discloses a method for improving efficiency of PE-back film substrate surface ammonia ionization pretreatment, and relates to the technical field of back film silicon nitride deposition. Aiming at the problems of high Si-H bond dangling bond defect on the surface of a silicon wafer, insufficient nitrogen content of a nitride interface, large refractive index fluctuation of a silicon nitride film and the like existing in the conventional PECVD (Plasma Enhanced Chemical Vapor Deposition) method for preparing back film silicon nitride, NH3 plasma pretreatment is carried out on the surface of SiOx / poly-Si; by means of implantation of active nitrogen free radicals, Si dangling bond defects are repaired in situ, a transition layer is formed, the synergistic effect of stress matching is enhanced, and the passivation performance is improved. The specific process comprises the steps of boat entering, constant-temperature heating, vacuumizing, leak detection, ammonia gas pretreatment (10000-flow ammonia gas is introduced, a radio-frequency power supply discharges 10000 W, the pressure is 1800 mtorr, and the time is 200 s), silicon nitride coating and the like. Experiments show that by means of the method, the efficiency can be improved by 0.10% or above, the yield is not affected, coating particle impurity abnormity can be reduced, and the EL yield is improved.

A semiconductor structure includes: a semiconductor material layer; a metal material layer; and an ultrathin film layer formed at the interface between the semiconductor material layer and the metal material layer, comprising amorphous fluorinated carbon having a dielectric constant of at least 10. The amorphous fluorinated carbon film further includes hydrogen trapped in dangling bonds in the amorphous carbon film.

The application provides a solar cell and a preparation method thereof. The method comprises the following steps: providing a substrate. The substrate has a light-receiving surface and a back surface. A first passivation layer is formed on the light-receiving surface of the substrate. The first passivation layer is used for oxygen passivation of the light-receiving surface of the substrate. A second passivation layer is formed on the side of the first passivation layer away from the substrate. The second passivation layer comprises doped amorphous oxygen-doped silicon nitride, and the doping type of the second passivation layer is the same as the doping type of the substrate. The preparation temperature of the first passivation layer and the second passivation layer is lower than the crystallization temperature of amorphous silicon. An anti-reflection layer is formed on the side of the second passivation layer away from the first passivation layer. The anti-reflection layer can reduce the decrease of passivation performance caused by bond breakage and the occurrence of ultraviolet-induced decay phenomenon. The second passivation layer can also maintain a relatively stable passivation effect under different working conditions, provide continuous and stable performance support for field passivation, and further reduce the formation of surface dangling bonds and improve the passivation performance.

The invention discloses a wide-spectrum high-uniformity black silicon integrated nanogold quadrant detector and a preparation method thereof, the wide-spectrum high-uniformity black silicon integrated nanogold quadrant detector comprises a substrate base material, a micro-nano conical B-Si structure is etched on the substrate base material, gold nanoparticles are deposited and covered on the surface of the micro-nano conical B-Si structure, the photoelectric detector is a double-four-quadrant photoelectric detector, and the thickness of the double-four-quadrant photoelectric detector is larger than that of the micro-nano conical B-Si structure. And the boundary area of the double four quadrants is electrically isolated by etching deep grooves and filling oxygen-silicon compounds to form isolation grooves. The gold nanoparticles are compounded on the surface of B-Si, hot electrons can be excited through a localized surface plasma resonance mechanism and injected into a black silicon conduction band to participate in the photoelectric conversion process, the band gap limitation of the B-Si material is broken through, wide spectral response is achieved, the response capability in a near-infrared region is improved, and the photoelectric conversion efficiency is improved. And meanwhile, a silicon oxide and silicon nitride passivation film is introduced to the surface of the black silicon and gold nanoparticle composite structure, and a surface carrier recombination process is inhibited by filling dangling bonds and defect states on the surface of the black silicon pointed cone structure, so that the dark current level of the device is reduced.

The invention relates to a metal interconnection layer and a preparation method thereof. The preparation method comprises the following steps: providing a substrate; the dielectric laminations and the initial metal wires are alternately arranged on the substrate along a first direction parallel to the first surface; the side wall of the initial metal wire comprises a protruding part, and the protruding part is embedded in the dielectric lamination layer along the first direction; etching the dielectric laminated layer, forming a groove between the adjacent initial metal wires, and then forming a liner oxide layer covering the inner surface of the groove and the top surfaces of the initial metal wires; the bottom face of the groove is lower than the bottom face of the protruding part. Performing a surface treatment process on the exposed surface of the liner oxide layer, and at least adding a target dangling bond for increasing the coating rate on the inner surface of the groove not lower than the convex part; after an oxide layer is formed in the groove, removing the rest of the film layer with the top surface higher than the top surface of the protruding part to obtain a target metal wire; an air gap structure is arranged in the oxide layer. The technological process of the air gap structure in the metal interconnection layer can be simplified.

Semiconductor devices and corresponding manufacturing methods are disclosed. The method includes: forming a first layer on a first substrate; treating the first layer with a nitrogen-based plasma to form a first type of dangling bond; treating the first layer with an oxygen-based plasma to convert the first type of dangling bonds to a second type of dangling bonds; and treating the first layer with water to convert the second type of dangling bond to a third type of dangling bond.

A method for preparing a surface for bonding utilizes multiple processing techniques to increase bonding strength. The method can include performing a first processing technique on a surface of a material using a first plasma process to promote diffusion into a first surface of a diffusion layer deposited after the first processing technique, where the first processing technique uses a capacitively coupled plasma (CCP) or a combination of both CCP and inductively coupled plasma (ICP); forming the diffusion layer on the surface of the material; performing a second processing technique to increase diffusion of the diffusion layer into the surface of the material using a second plasma process, where the second processing technique uses CCP; and performing a third processing technique to form dangling bonds on the diffusion layer using a third plasma process, where the third processing technique uses ICP or a combination of both CCP and ICP.

The invention relates to a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure comprises the steps of providing a substrate; the substrate includes a first region and a second region. Forming a first gate dielectric layer on the top surface of the substrate in the first region, and forming a second gate dielectric layer on the top surface of the substrate in the second region; and the size of the first gate dielectric layer in the second direction is greater than that of the second gate dielectric layer in the second direction. And forming a first initial dangling bond repair layer in the first gate dielectric layer and forming a second initial dangling bond repair layer in the second gate dielectric layer by adopting a first target process. Adopting a second target process to enable the first initial dangling key repair layer and the second initial dangling key repair layer to move to the target interface and to be mutually bordered so as to form a dangling key repair layer; the target interface is an interface of the gate dielectric layer and the substrate. According to the invention, the dangling bond at the target interface can be accurately and fully repaired on the premise that the gate dielectric layer is not damaged.

This invention discloses a photochemical reaction and shear thickening composite polishing method applicable to diamond workpieces. The method involves processing the diamond workpiece using a specific shear thickening polishing fluid. During polishing, ultraviolet light is continuously irradiated into the polishing fluid. The photocatalyst microparticles in the polishing fluid absorb the energy of the ultraviolet light, generating photogenerated holes to form hydroxyl radicals. On one hand, the hydroxyl radicals combine with the Si dangling bonds on the surface of nano-silica to form -Si-OH groups. On the other hand, the hydroxyl radicals in the shear thickening polishing fluid contact the rough surface of the workpiece, forming a large number of -OH functional groups on its surface. During polishing, the friction between the workpiece surface and the shear thickening polishing fluid causes a local temperature increase in the fluid, promoting a condensation reaction to form C-O-Si chemical bonds. Then, under the action of strong shear force, the C-C back bonds on the surface of the diamond workpiece are broken, removing the C-O-Si chemical bonds and achieving efficient and high-quality polishing.

This invention relates to the field of light-emitting diode (LED) technology and discloses an epitaxial wafer for an LED and its fabrication method. The fabrication method includes the following steps: (1) providing a substrate; (2) depositing an epitaxial layer on the substrate; (3) dry etching the epitaxial layer to form a patterned structure with etched sidewalls; (4) forming a passivation layer in situ on the etched sidewalls of the patterned structure; wherein, forming the passivation layer in situ includes: maintaining a gas atmosphere of N2 and / or NH3 under conditions of 300℃-600℃ and 50mbar-500mbar, introducing a boron source and a phosphorus source for plasma treatment, and generating the passivation layer in situ at the sidewalls. By implementing this application, the formed passivation layer can replenish nitrogen vacancies, significantly reduce carrier trap concentration, passivate residual Ga dangling bonds, wrap the repair layer surface, reduce defect stress, and prevent the re-adsorption of oxygen or water vapor in the atmosphere.

The application discloses a tin-based perovskite film based on stress regulation, a preparation method thereof and a photoelectric device, wherein the preparation method comprises the following steps: placing a tin-based perovskite liquid film and a ligand solution in a same chamber, stopping air extraction after the chamber is vacuumized to be lower than 1000 Pa through air extraction, wherein the ligand solution is a solution containing an amine group or a mercapto functional group; maintaining a closed state of the chamber, tin-based perovskite is complexed with a solvent to form an intermediate phase solid film with heat stress impact resistance, and the ligand solution continuously volatilizes to fill the chamber to form a ligand atmosphere, the ligand is combined with uncoordinated tin in the intermediate phase solid film to reduce surface defects; and taking out the intermediate phase solid film and then annealing. Through two-step regulation of stress impact and grasping the opportunity of defect treatment, the ligand is combined with uncoordinated tin in the intermediate phase solid film in vacuum drying, and dangling bonds and defects on the surface of the perovskite are weakened. Then, annealing treatment is performed, lattice distortion caused during annealing is reduced, and finally the quality of the tin-based perovskite film is improved.

The application discloses a preparation method of a boron aluminum nitride / nitrogen terminal diamond two-dimensional electron gas heterojunction structure which improves lattice mismatch, and comprises the following steps: obtaining a 111 plane monocrystalline silicon substrate; epitaxially growing a monocrystalline boron nitride transition layer on the 111 plane monocrystalline silicon substrate; growing a diamond epitaxial layer on the surface of the monocrystalline boron nitride transition layer; performing nitrogen terminal treatment on the surface of the diamond epitaxial layer to form a nitrogen terminal surface; epitaxially growing monocrystalline boron aluminum nitride with an Al plane polar wurtzite structure and a donor impurity on the nitrogen terminal surface to form a boron aluminum nitride epitaxial layer, so as to form a boron aluminum nitride / nitrogen terminal diamond two-dimensional electron gas heterojunction. The preparation method breaks through the size limitation of a high-quality diamond substrate, effectively alleviates the lattice distortion of boron aluminum nitride on diamond in the epitaxial process, reduces the surface state and the dangling bond at the formed heterojunction interface, and improves the quality of the diamond heterojunction.

Disclosed in the present application are a silicon-nitride charge-trapping memristor and a preparation method therefor. The memristor has three functional layers, wherein the upper functional layer and the lower functional layer are made of SiO2, and the intermediate functional layer is made of SiNX. The memristor is treated by a low-temperature annealing process, such that SiNX in the functional layers forms silicon dangling bonds, which are traps for capturing and releasing charges. The memristor realizes a change in resistance by using the mechanism of capturing and releasing charges in the SiNX traps. The memristor provided in the present application does not have the non-uniformity problem caused by the random growth of conductive filaments, and does not require a high-voltage forming process, thereby achieving a relatively high uniformity and a relatively wide application prospect. Moreover, the memristor can achieve reliable multi-level storage and pulsed synaptic characteristics. In addition, by using silicon nitride as a core resistive-switching material, the advantages of low cost, ease of availability, and enhanced compatibility with CMOS processes are achieved.

The invention discloses a two-dimensional ferroelectric material and a preparation method and application thereof. The component of the two-dimensional ferroelectric material is two-dimensional indium selenide, and a structure constructed by indium selenide wrinkles is arranged on the surface of the two-dimensional indium selenide. The two-dimensional ferroelectric material provided by the invention is two-dimensional indium selenide, a structure constructed by indium selenide wrinkles is arranged on the surface of the two-dimensional indium selenide, the two-dimensional ferroelectric material of the strain network superstructure formed by the wrinkles is relatively large in size, has Van der Waals acting force in the material, has no dangling bonds on the surface of the material, and has relatively large coercive voltage; and the method has a good application prospect in the fields of chip calculation, storage and the like.

The present application relates to a kind of full van der waals transfer single crystal dielectric memristor and its preparation method, the single crystal dielectric memristor includes substrate, lower electrode, antimony trioxide dielectric layer and upper electrode from bottom to top;The lower electrode, antimony trioxide dielectric layer and upper electrode form MIM structure.The surface of dielectric layer material of the present application has no dangling bond, reduces the defect with electrode interface;The dielectric material is easy to prepare, maintains higher thickness uniformity;When the dielectric material is deposited on germanium-based graphene, single crystal of out-of-plane 111 orientation is formed, which is beneficial to improve the performance of memristor.The preparation process of the present application is integrated by van der waals force (physical stacking) rather than chemical bonding, which can construct a pure interface theoretically without defects, diffusion and reaction;The process is transferred at room temperature throughout, compatible with flexible substrate, providing a new path for flexible electronics and three-dimensional integration.

A method of fabricating sample wafers includes forming silver particles on a surface of a wafer, forming nanowires on the wafer, removing the silver particles, and terminating dangling bond sites from surfaces of the nanowires with deuterium.

A method for autonomously applying a dangling bond pattern to a substrate for atom scale device fabrication includes inputting the pattern, initiating a patterning process, scanning the substrate using a scanning probe microscope (SPM) to generate an SPM image of the substrate, feeding the SPM image into a trained convolution neural network (CNN), analyzing the SPM image using the CNN to identify substrate defects, determining a defect free substrate area for pattern application; and applying the pattern to the substrate in that area. An atom scale electronic component includes functional patches on a substrate and wires electrically connecting the functional patches. Training a CNN includes recording a Scanning Tunneling Microscope (STM) image of the substrate, extracting images of defects from the STM image, labeling pixel-wise the defect images, and feeding the extracted and labeled images of defects into a CNN to train the CNN for semantic segmentation.

The application relates to a two-dimensional JFET device and a manufacturing method thereof. The two-dimensional JFET device comprises an insulating substrate, a few-layer two-dimensional ferroelectric semiconductor thin film located on the surface of the insulating substrate, a two-dimensional semimetal thin film located on the middle region of the surface of the few-layer two-dimensional ferroelectric semiconductor thin film, and a metal electrode, which is divided into a source electrode, a drain electrode and a gate electrode. The source electrode and the drain electrode are respectively located on the surface of the few-layer two-dimensional ferroelectric semiconductor thin film on the two sides of the two-dimensional semimetal thin film, and the gate electrode is located on the surface of the two-dimensional semimetal thin film. The two-dimensional JFET device utilizes the high conductivity of the two-dimensional semimetal, the spontaneous polarization, the adjustable control characteristics, the low work function and the absence of dangling bonds of the two-dimensional ferroelectric semiconductor material, reduces the Schottky barrier height of the junction region and the working voltage range of the device, avoids the sharing pressure drop phenomenon, and realizes the nearly ideal sub-threshold swing and the accurate control of the channel conductance.

The application relates to the technical field of semiconductor nanomaterials, and in particular to a surface pre-passivation method of indium phosphide quantum dots and a preparation method of core-shell structure quantum dots of the indium phosphide quantum dots. − F − ions generated by hydrolysis under reaction conditions, specifically bind with surface uncoordinated indium sites (dangling bonds) to form In-F bonds, effectively solving the indium defects that cannot be solved by traditional cation passivation strategies. The pre-passivation treatment creates a clean, low-defect InP core surface, reducing the interface defects generated by interface lattice mismatch and heterogeneous nucleation during the subsequent ZnSe / ZnS shell epitaxial growth, and the photoluminescence quantum yield of the prepared InP / ZnSe / ZnS core-shell quantum dots is significantly improved.

The invention relates to the technical field of semiconductor photocatalytic materials, in particular to a preparation method of crystal face controllable nano titanium dioxide, which comprises the following steps: establishing an anatase type TiO2 model; one or more external atom sources selected from a C atom source, an N atom source, a Fe atom source, a Co atom source, a Ni atom source, a Cu atom source, a Zn atom source, a Mo atom source, a Sn atom source and a W atom source are introduced into crystal lattices of the TiO2 model according to the doping proportions of the different external atom sources, the specific positions of the different external atom sources in the crystal lattices and the like. Foreign atoms are introduced into TiO2 crystal lattices and surfaces, the crystal lattice structure, electron cloud distribution, the surface dangling bond state and vacancy defects of the TiO2 crystal lattices are changed, the surface energy of the {101} crystal face and the {001} crystal face is regulated and controlled fundamentally, and accurate regulation and control of the exposure proportion of the crystal faces can be achieved without depending on a traditional fluorine ion additive.