3results about How to "Improve channel mobility" patented technology

This disclosure provides a junction field-effect transistor (JFET) device, its fabrication method, and an electronic device. The p-type gate region is formed by implantation ions on the side of the n-drift layer away from the n+ substrate. Therefore, it eliminates the need for high-energy p-type ion deep implantation to achieve the p-type gate region, thereby improving production efficiency. The n-type channel layer can be formed using homoepitaxial growth, which improves device design flexibility and channel mobility. Therefore, compared to Figure 1, this disclosure avoids using deep p-type ion implantation to form the bottom p-type gate region and deep n-type ion implantation to form the n-type channel layer, thus improving device design flexibility, production efficiency, and channel mobility.

The present application relates to a kind of trench forming method and device with one side of sidewall inclined.The method comprises: preparing the required trench in the SiC substrate;The trench protection mask is filled in the above-mentioned trench, and the trench protection mask on the front main surface of SiC substrate is selectively masked and etched to obtain the inclined sidewall etching window located at one outer side of trench;The above-mentioned SiC substrate is inclined and placed on the inclined body, and the front main surface of SiC substrate is dry etched using inclined sidewall etching window to obtain the inclined sidewall formed by the trench after etching, and the trench protection mask is removed, wherein, after removing the trench protection mask, the sidewall of the trench protected by the trench protection film is vertical surface, and the other sidewall of the trench is the inclined sidewall.The present application can effectively prepare the trench with one side of sidewall inclined on SiC substrate, improve the channel mobility of SiC device, and is compatible with existing process.

The application provides a low-loss trench gate silicon carbide MOSFET device and a manufacturing method, and the device structure comprises an N+ substrate, an N- epitaxial layer, an N+ buffer layer, a P-type well region, an N+ source region, a P+ shielding region, a polysilicon gate, a source metal and a drain metal. The application is based on an asymmetric trench gate silicon carbide MOSFET device, which has a channel on one side of a silicon carbide trench and is wrapped by P+ on the other side. The integrated FinFET structure increases the channel density, and at the same time, the extremely narrow Fin-shaped mesa reduces the electric field intensity at the channel and the interface scattering, so that the mobility of the channel in the Fin-shaped mesa is increased. In addition, the P+ structure wrapping the gate trench reduces the gate oxide electric field at the trench corner, so that the gate oxide electric field intensity of the device after the introduction of the FinFET structure is in the safe working range.