518 results about "Sic substrate" patented technology

The invention discloses a thermal / environmental barrier coating with high thermal insulation, thermal shock resistance and CMAS corrosion resistance as well as a preparation method and application of the thermal / environmental barrier coating. The SiCf / SiC composite material is prepared on the surface of a SiCf / SiC substrate by adopting a plasma spraying-physical vapor deposition technology, and comprises a Si-HfO2 bonding layer, a double-middle layer of Yb2Si2O7 and Yb2SiO5 and a (Dy0.2 Ho0.2 Er0.2 Tm0.2 Lu0.2) 2Hf2O7 top layer from bottom to top, the molar ratio of Si to HfO2 is 15: 85, and the double-middle layer is composed of Yb2Si2O7 and Yb2SiO5. The Si-HfO2 bonding layer provided by the invention has excellent high-temperature performance while providing good bonding force; the Yb2Si2O7 intermediate layer relieves the problem of thermal expansion mismatch between the upper coating and the lower substrate, and further expansion of cracks is hindered through plastic deformation; the Yb2SiO5 middle layer is excellent in water and oxygen corrosion resistance; the (Dy0. 2Ho0. 2Er0. 2Tm0. 2Lu0. 2) 2Hf2O7 top layer provides excellent CMAS corrosion resistance and is excellent in heat insulation performance, and the service temperature can be further increased. The coating has relatively high density and uniformity, presents good mechanical combination with a matrix, can bear thermal shock performance at 1500 DEG C and resist CMAS corrosion, and can be used as a protective coating of a hot end part of an aero-engine.

To provide: a method for depositing a single crystal SiC epitaxial growth film including a high quality epitaxial film having an epitaxial growth surface less in defects; a method for manufacturing a semiconductor device; a composite substrate; and a semiconductor device.SOLUTION: A method for depositing a single crystal SiC epitaxial growth film comprises: an introduction step of introducing reducing gas to put a bonded substrate including a polycrystal SiC substrate and a single crystal SiC film into a reducing gas atmosphere; and a film deposition step of depositing a single crystal SiC epitaxial growth film at a film deposition temperature held in the reducing gas atmosphere on the surface to be deposited of the single crystal SiC film of the bonded substrate. The film deposition temperature is less than 1500°C, and an etching amount obtained by etching the surface to be deposited of the single crystal SiC film with the reducing gas is 0.1 μm.SELECTED DRAWING: Figure 1

The invention provides a heterogeneous composite substrate and a manufacturing method thereof, and the manufacturing method comprises the steps: (1) carrying out the O ion implantation of a Si substrate, forming an O implantation layer, carrying out the C ion implantation, forming a C implantation layer on the O implantation layer, and obtaining a composite substrate precursor; (2) annealing and repairing the composite substrate precursor to convert the O injection layer into a SiO2 layer and convert the C injection layer into a SiC layer at the same time, and then performing post-processing to obtain a composite substrate; the composite substrate comprises a Si layer, a SiO2 layer and a SiC layer which are stacked in sequence; and (3) bonding the surface of one side, far away from the SiO2 layer, of the SiC layer in the composite substrate with the to-be-bonded surface of the SiC substrate to obtain the heterogeneous composite substrate. By adopting the method provided by the invention, the bonding strength of the heterogeneous composite substrate can be improved, and the quality of the heterogeneous composite substrate can be improved.

The invention provides a 3C-SiC epitaxial layer, a preparation method thereof and a semiconductor device. The preparation method of the 3C-SiC epitaxial layer comprises the following steps: placing a SiC substrate in a reaction chamber; raising the temperature of the reaction chamber from the initial temperature to the etching temperature; the surface of the SiC substrate is etched at the etching temperature; raising the temperature of the reaction chamber from the etching temperature to a first growth temperature; carrying out homoepitaxial growth on the surface of the etched SiC substrate at a first growth temperature to obtain a first buffer layer; reducing the temperature of the reaction chamber from the first growth temperature to a second growth temperature, and introducing a carbon source into the reaction chamber; at a second growth temperature, performing heteroepitaxial growth on the surface, far away from the SiC substrate, of the first buffer layer to obtain a 3C-SiC buffer layer; and performing epitaxial growth on the surface, far away from the SiC substrate, of the 3C-SiC buffer layer at the second growth temperature to obtain a 3C-SiC epitaxial layer. And the epitaxial layer has high crystal quality and few surface defects.

The invention discloses a monometallic waveguide GaN-based terahertz quantum cascade laser, which is characterized in that the bottommost layer of the structure is a substrate, an n-type highly-doped n + + layer, a QCL active region and an n-type doped layer are sequentially arranged on the substrate, a cathode electrode layer is arranged on the n-type highly-doped n + + layer, an anode electrode layer is arranged on the n-type doped layer, and an anode electrode layer is arranged on the anode electrode layer. Wherein the substrate is a GaN substrate, an AlN substrate or a SiC substrate. The invention also discloses a preparation method. On the basis of systematic research on refractive index related parameters of GaN under THz frequency, absorption of single-metal waveguide structure parameters on QCL light field limiting factors and free carriers is analyzed, and QCL with high light field limiting factors and low loss of different substrates is designed. Besides, according to the designed active region structure, the gain can reach 88 / cm at 10K and can reach 34 / cm at 280K, the corresponding wavelength is 6.6 THz, and the frequency which cannot be achieved by a traditional GaAs system is achieved.

To provide a SiC ingot easily processed during laser processing.SOLUTION: A SiC ingot has a facet surrounded with the minimum area when setting a diameter to D and plan-viewed from a crystal growth direction. When setting the length of the first side of a virtual rectangle having a first side parallel to a <11-20>direction and a second side parallel to a <1-100>direction to Lx, Lx / D<0.3 is satisfied in a first end being an end in the crystal growth direction.SELECTED DRAWING: Figure 3

The invention discloses a gallium nitride heterojunction material structure and a growth method thereof, and relates to the technical field of semiconductor single crystal films, the material structure comprises a SiC substrate, an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer, an AlN insertion layer, a gradient component AlGaN barrier layer and a GaN cap layer from bottom to top; the material is prepared on a substrate in an epitaxial mode through a metal organic matter chemical vapor deposition method. AlGaN with gradually-changed Al components is adopted as the barrier layer, so that the electric field intensity of the barrier is reduced, the voltage endurance capability of the device is improved, and the power density and the reliability of the device are improved.

The purpose of the present invention is to provide: a SiC single-crystal ingot from which a large number of SiC substrates can be efficiently obtained; a method for producing a SiC single-crystal ingot; and a method for producing a SiC substrate. The SiC single crystal block according to the present embodiment includes, in a cut plane orthogonal to the crystal growth direction, a portion in which the length of a line segment that passes through the center of the largest inscribed circle enclosed by the cut plane and connects a first outer peripheral point and a second outer peripheral point of the cut plane is 211-221 mm.

The invention discloses a wide-spectrum response pin high-temperature ultraviolet detector, which belongs to the technical field of microelectronics and comprises a 4H-SiC substrate, a 4H-SiC epitaxial layer arranged on the 4H-SiC substrate, a 4H-SiC absorption layer and a beta-Ga2O3 absorption layer which are arranged on the left side and the right side of the upper surface of the 4H-SiC epitaxial layer, a 4H-SiC contact layer arranged on the 4H-SiC absorption layer and a beta-Ga2O3 contact layer arranged on the beta-Ga2O3 absorption layer. The left side of the 4H-SiC contact layer, the left side of the 4H-SiC absorption layer and the left side of the 4H-SiC epitaxial layer are respectively provided with a left half dip angle mesa structure. The right sides of the beta-Ga2O3 contact layer, the beta-Ga2O3 absorption layer and the 4H-SiC epitaxial layer are provided with right half part inclined table-board structures; the N / P-type ohmic contact metal is arranged on the upper / lower mesa of the inclined mesa structure. The detector is high in light response capability and wide in detection wavelength range.

An objective of the present invention is to provide a SiC epitaxial wafer with a large diameter, a low triangular defect density, and high carrier concentration uniformity. According to the present invention, a SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer. The SiC substrate has a diameter of 195 mm or more. The SiC epitaxial layer has a triangular defect density of 0.2 pieces / cm2 or less and a carrier concentration variation of 20% or less.

The invention relates to the technical field of chip processing, and discloses an intelligent temperature control heating platform based on a SiC substrate and a chip processing method. The method comprises the following steps: modeling SiC substrate temperature distribution characteristics to obtain a three-dimensional temperature field distribution model; performing temperature parameter analysis to obtain a SiC substrate surface temperature distribution parameter set; performing hot area analysis to obtain a heating unit contribution degree coefficient matrix and a target hot area distribution map; calculating a power distribution value to obtain a heating power setting matrix; performing four-stage hierarchical control on the heating power setting matrix to obtain a stable transition control curve; according to the method, stable transition from the room temperature to the process temperature is achieved, extra preheating equipment is not needed, a stable processing temperature environment is provided for the SiC substrate, energy consumption is reduced, and efficient utilization of energy in the processing process of the SiC substrate chip is achieved.

A machining process for a SiC substrate includes polishing the SiC substrate while an acidic polishing solution containing an aqueous solution of dissolved permanganate salt is applied to one side of the SiC substrate, and cleaning that side. Cleaning that side of the SiC substrate involves applying a reducing rinsing solution, capable of reducing a metal oxide and permanganate ions, to that side of the SiC substrate while the rotary table is rotated and the other side of the SiC substrate is held on the rotary table. The process then stops the application of the reducing rinsing solution and subsequently applies pure water to that side of the SiC substrate while the rotary table is rotated and the other side of the SiC substrate is held on it.

The present invention relates to an aluminum oxide CMP polishing solution for a SIC substrate and a preparation method therefor. The polishing solution comprises the following raw materials in parts by weight: 8-10 parts of aluminum oxide powder, 8-10 parts of a suspending agent, 8.5-10 parts of a dispersant, 4-5 parts of a pH regulator, 5-6 parts of an oxidizing agent, 4-5 parts of a defoamer, and 75-80 parts of deionized water. The dispersant is one or a mixture of fatty alcohol ether phosphate, fatty alcohol ether phosphate potassium salt, isotridecyl phosphate, polyethylene glycol stearate, polyethylene glycol monolaurate, and polyethylene glycol monooleate. In the present invention, full dispersion and stable suspension of aluminum oxide micropowder can be achieved without any agglomeration, such that abnormal scratches can be prevented from being generated in a grinding process and then affecting the polishing quality; in addition, the use of an alkaline polishing solution can effectively protect devices from damage, prolong the service life of the devices, and increase the machining precision.

A SiC substrate includes a main body, a first power connection, and a second power connection. The main body has a length that extends between the first power connection and the second power connection. The first power connection is configured to conduct power into the main body for heating the main body. The second power connection is configured to conduct electric power conducted via the first power connection into the main body out of the main body. The main body forms a surface for deposition of SiC for growing a SiC crust. The main body is configured to resist forces generated during growth of the SiC crust having a minimal thickness for preventing cracking of the main body due to the generated forces at least in a volume section of the main body. The volume section is formed between a first plane and a second plane.

To provide an SiC ingot capable of realizing both of high quality and workability.SOLUTION: This SiC ingot has a step-flow growth region, and a facet. On a cross section passing through a center in a <11-20> direction, an inside boundary between the facet and the step flow growth region has: a first slope inclined in a [-1-120] direction with respect to a crystal growth direction; and a second slope inclined in a [11-20] direction with respect to the crystal growth direction. An inflection point between the first and second slopes is nearer a first end on a Si face side than a center position of ingot length.SELECTED DRAWING: Figure 1

The invention discloses a low-defect-stress SiC crystal and a SiC substrate, and belongs to the technical field of SiC material preparation. A plurality of SiC substrates are prepared from the SiC crystal, high-pass signals and low-pass signals are distinguished on the basis of the Laplacian pyramid principle, and under the high-pass signals, the overall optical path difference of any SiC substrate is lt; 6 nm, the maximum value of the optical path difference is lt; the standard deviation of the optical path difference is lt; and 3nm. The optical path difference between the SiC crystal and the SiC substrate is small and uniform under a high pass signal, the number of defects in SiC is small, stress concentration caused by in-plane defects is small, and the crystal quality of SiC is more uniform.

To provide an SiC epitaxial wafer with large diameter, thin thickness, and high uniformity of carrier concentration.SOLUTION: An SiC epitaxial wafer according to the present embodiment has an SiC substrate and an SiC epitaxial layer. The SiC substrate has a diameter of 195 mm or more and a thickness of 460 μm or less. The SiC epitaxial layer has a carrier concentration variation of 20% or less.SELECTED DRAWING: Figure 1

To suppress expansion of a BPD to an SSF.SOLUTION: In an SiC wafer forming an SiC substrate 11 formed of an n-type SiC doped with an n-type impurity, an SiC substrate 11 includes B in the concentration of at least 9.0×1016 / cm3.SELECTED DRAWING: Figure 1

To provide an SiC ingot easy to be laser-processed.SOLUTION: This SiC ingot is made of an SiC single crystal inclined by an offset angle from a (0001) face and crystal-grown from a first end toward a second end, and has a step-flow growth region, and a facet. On a cross section passing through a center in a <11-20> direction, an angle θ1 formed by an inside boundary between the facet and the step flow growth region and a crystal growth direction is 56° or less.SELECTED DRAWING: Figure 1

The invention provides a SiC epitaxial wafer and a preparation method thereof, relates to the technical field of semiconductor chips, and aims to reduce the defect density of the SiC epitaxial wafer, and the SiC epitaxial wafer comprises a SiC substrate and an epitaxial layer arranged on one side of the SiC substrate. The epitaxial layer comprises a C surface and a Si surface which are oppositely arranged, any one of the C surface and the Si surface is close to the SiC substrate, the thickness range of the epitaxial layer is 50-500 microns, and the defect density range of the epitaxial layer is 0.02 / cm < 2 >-1 / cm < 2 >.

The invention relates to the technical field of silicon carbide semiconductor devices, in particular to an integrally-formed equal-depth double-groove SiC MOSFET structure and a preparation method thereof. According to the structure, an N + buffer layer and an N-drift layer are sequentially formed on an N-type SiC substrate, and a main groove and an auxiliary groove which are consistent in depth are formed in the surface of the N-type SiC substrate; a gate oxide layer and a polycrystalline silicon gate are sequentially formed in the main groove, and the auxiliary groove is filled with a SiC epitaxial material which is doped with the drift layer in the same type, so that a charge compensation and electric field regulation and control unit is formed; the P-type body region surrounds the trench structure and forms an N + source region, and the drain electrode is formed through a back metallization process. Through the collaborative design of the equal-depth double grooves, the uniformization of electric field distribution is realized, the on-resistance and the switching loss are effectively reduced, the thermal stability and the reliability of the device are improved, the integrated process is adopted for integration, the process is simplified, the production efficiency and the yield are improved, and the semiconductor device is suitable for high-frequency and high-voltage application scenes and has a wide industrialization prospect.

A SiC epitaxial wafer including: a SiC substrate; and a SiC epitaxial layer stacked on one surface of the SiC substrate, wherein a diameter of the SiC substrate is 195 mm or more, and a warp is 50 μm or less.

The present application belongs to the technical field of SiC production and processing. Disclosed are an SiC substrate having uniform stress distribution in a three-dimensional direction, and an SiC crystal. The SiC substrate comprises a first surface layer, a second surface layer and an intermediate layer, wherein on the same axis, at any plane parallel to a first main surface or a second main surface in the first surface layer, Smax1 represents the maximum value of an absolute value of a radial stress in the first surface layer, Smax2 represents the maximum value of an absolute value of a radial stress in the intermediate layer, Smax3 represents the maximum value of an absolute value of a radial stress in the second surface layer, ΔS1=Smax2-Smax1, ΔS2=Smax2-Smax3, -15 MPa≤ΔS1≤10 MPa, and -15 MPa≤ΔS2≤10 MPa. The radial stresses in the SiC substrate in all of the first surface layer, the second surface layer and the intermediate layer are relatively low, the stress distribution uniformity among the layers is good, so that the quality of the SiC substrate can be improved, the usage range of the SiC substrate is expanded, and the production and processing of downstream epitaxial wafers and crystals are facilitated.

The invention discloses a vertical 4H-SiC photoconductive switch, which comprises a SiC substrate, a front electrode, a passivation layer and a back electrode, and is characterized in that the front electrode is located on the upper surface of the SiC substrate, and the passivation layer is located on the upper surface of the SiC substrate and is arranged at the edge of the front electrode; the back electrode is located on the lower surface of the SiC substrate; wherein the front electrode comprises an annular electrode and a mesh electrode, and the mesh electrode is arranged in the inner circle of the annular electrode and connected with the annular electrode; a plurality of concentric terminal protection rings are also arranged in the SiC substrate below the outer side of the front electrode, and the circle centers of the longitudinal projections of the plurality of terminal protection rings coincide with the circle centers of the longitudinal projections of the annular electrodes. According to the structural design, the electric field concentration effect near the electrode caused by non-uniform distribution of the electric field on the surface of the photoconductive switch is relieved, premature breakdown of the device is avoided, and the voltage endurance capability of the photoconductive switch is doubled; and meanwhile, the uniformity of current distribution in the photoconductive switch is improved.

The embodiment of the invention provides a semiconductor substrate, an epitaxial wafer and a semiconductor device. The semiconductor substrate comprises a silicon carbide substrate layer, a transition layer arranged on the carbon surface of the silicon carbide substrate layer, and a stress regulation and control layer arranged on the side, away from the silicon carbide substrate layer, of the transition layer. The transition layer comprises a two-dimensional material layer, and the stress regulation layer comprises a 3C-SiC layer; or the transition layer comprises a polycrystalline 3C-SiC layer, and the stress regulation layer comprises a single crystal 3C-SiC layer. According to the semiconductor substrate provided by the embodiment of the invention, the transition layer and the stress regulation and control layer are arranged on the silicon carbide substrate layer, so that the surface type of the SiC substrate can be effectively improved, and the problem of non-uniform thickness distribution of the epitaxial layer caused by an overlarge bow value of the substrate in a SiC epitaxial process is solved to a certain extent, thereby improving the manufacturing yield of an epitaxial wafer, and improving the yield of the epitaxial wafer. Manufacturing cost is reduced, and semiconductor device performance is improved.

A heterogeneous epitaxial structure formed on a SiC (silicon carbide) substrate. An intermediate layer comprising AlN is formed overlying the SiC substrate. The surface of the intermediate layer comprises AlN formed by lateral epitaxial growth. The lateral epitaxial growth merges to form the surface comprising a MELO layer (merged epitaxial lateral overgrowth). The intermediate layer includes a carbon layer underlying the MELO layer. At least one device layer comprising GaN (gallium nitride) is formed overlying the surface of the intermediate layer in which one or more semiconductor devices are formed. The carbon layer is heated to fracture portions of the intermediate layer to separate the SiC substrate from the intermediate layer. The SiC substrate is not consumed by the separation thereby allowing perpetual reuse in semiconductor wafer processing.

A SiC epitaxial wafer includes a SiC substrate and an epitaxial layer laminated on the SiC substrate, wherein the epitaxial layer contains an impurity element which determines the conductivity type of the epitaxial layer and boron which has a conductivity type different from the conductivity type of the impurity element, and the concentration of boron is less than 1.0×1014 cm−3 at any position in the plane of the epitaxial layer.

The invention discloses a high-quality silicon carbide homoepitaxial wafer and a preparation method thereof, the epitaxial wafer comprises an epitaxial layer, a SiC substrate and a regulation and control layer, the regulation and control layer is located outside the back surface of the substrate or inside the back surface of the substrate, and the epitaxial layer is located on the front surface of the substrate; wherein the lattice mismatch degree between the regulation and control layer and the substrate has the same sign as the lattice mismatch degree between the epitaxial layer and the substrate, but the absolute value is larger; the preparation method comprises the following steps: preparing the regulation and control layer on the back surface of the SiC substrate; front deposition and surface scratch of the substrate caused by the previous step are eliminated through chemical mechanical polishing; growing an epitaxial layer on the front surface of the substrate through epitaxial deposition; and finally, chemically and mechanically polishing to eliminate micro pits and step coalescence morphology on the surface of the epitaxial layer to obtain the epitaxial wafer. The regulation and control layer is introduced to the back surface of the substrate, lattice mismatch between the epitaxial layer and the substrate is weakened through the regulation and control layer, dislocation proliferation and slippage are reduced, and the high-quality silicon carbide homoepitaxial wafer with low defect density and small deformation is prepared.

The invention relates to silicon carbide powder as well as a preparation method and application thereof. Comprising the following steps: mixing silicon powder with negative charges and graphite powder with positive charges to obtain a mixture; and heating the mixture to enable the silicon powder with the negative charges and the graphite powder with the positive charges to react, so as to prepare the silicon carbide powder. The relatively compact and uniform structure formed by electrostatic self-assembly of the positively charged silicon powder and the negatively charged graphite powder is beneficial to self-propagating reaction synthesis of silicon carbide, so that the reaction is more sufficient, the carbon wrapping of the silicon carbide powder is reduced, and a foundation is laid for subsequent preparation of high-quality SiC substrate wafers or SiC-based devices.

The invention relates to the technical field of semiconductor cleaning agents, and particularly discloses an etching solution for SiC surface silicon and a preparation method of the etching solution. The etching solution for SiC surface silicon comprises an aqueous solution of a component A and an aqueous solution of a component B. The component A comprises the following raw materials in parts by weight: 3-8 parts of nitric acid, 1-2 parts of hydrofluoric acid, 0.5-1 part of a complexing agent and 0.1-1 part of a surfactant; the raw materials of the component B comprise modified citric acid and citric acid in a mass ratio of (2.2-5.7): (1-1.8), and the modified citric acid is obtained by modifying a dihydroxy compound. The etching solution for the SiC surface silicon has higher selectivity on the SiC substrate surface silicon and other impurities, the etching effect and the etching rate of the etching solution on the SiC surface silicon are effectively improved, the loss of the SiC substrate is reduced, and the problem of environmental pollution is also reduced.