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9 results about "Stacking fault" patented technology

In crystallography, a stacking fault is a type of defect which characterizes the disordering of crystallographic planes. It is thus considered a planar defect. The most common example of stacking faults is found in close-packed crystal structures. Face-centered cubic (fcc) structures differ from hexagonal close packed (hcp) structures only in stacking order: both structures have close-packed atomic planes with sixfold symmetry — the atoms form equilateral triangles. When stacking one of these layers on top of another, the atoms are not directly on top of one another. The first two layers are identical for hcp and fcc, and labelled AB. If the third layer is placed so that its atoms are directly above those of the first layer, the stacking will be ABA — this is the hcp structure, and it continues ABABABAB. However, there is another possible location for the third layer, such that its atoms are not above the first layer. Instead, it is the atoms in the fourth layer that are directly above the first layer. This produces the stacking ABCABCABC, which is actually along the [111] direction of a cubic crystal structure. In this context, a stacking fault is a local deviation from one of the close-packed stacking sequences to the other one. Usually, only one- two- or three-layer interruptions in the stacking sequence are referred to as stacking faults. An example for the fcc structure is the sequence ABCABABCAB.

A method for preparing a low surface defect epitaxial wafer on a high COP silicon single crystal substrate

PendingCN122249030AStacking faultPhysical chemistry
This invention relates to a method for preparing low-surface-defect epitaxial wafers on high-COP silicon single-crystal substrates, comprising the following steps: S1, substrate preparation: selecting a high-COP silicon single-crystal substrate; S2, single-sided polishing: polishing the high-COP silicon single-crystal substrate using conventional single-sided polishing equipment to remove the mechanical damage layer on the substrate surface and obtain a preliminarily planarized surface; S3, improved polishing and cleaning process; S4, epitaxial growth of qualified substrate: performing epitaxial growth on the qualified substrate to prepare a low-surface-defect epitaxial wafer. This invention improves the polishing and cleaning processes, thoroughly removing residues within COP voids and suppressing the generation of epitaxial stacking faults, thereby achieving the preparation of high-quality, low-surface-defect epitaxial wafers.
Owner:QL ELECTRONICS (QUZHOU) CO LTD

Silicon carbide crystal growth device

This invention discloses a silicon carbide crystal growth apparatus, comprising: a crucible, a seed crystal holder, silicon carbide powder, a filter plate, and a crucible lid. The crucible has a mouth; the seed crystal holder is disposed inside the crucible, with a seed crystal disposed on the side of the seed crystal holder facing away from the mouth; the silicon carbide powder is disposed inside the crucible and located below the seed crystal, with a powder evaporation zone formed on the side of the silicon carbide powder facing the seed crystal, the diameter ratio of the powder evaporation zone to the seed crystal being D, wherein 1.4 ≤ D ≤ 1.6; the filter plate is disposed inside the crucible and located between the silicon carbide powder and the seed crystal; and the crucible lid is disposed on the mouth of the crucible. This silicon carbide crystal growth apparatus can improve the growth rate of large-size silicon carbide single crystals and control defects such as dislocation density and stacking faults to a low level, thereby meeting the demand for large-size and high-quality silicon carbide single crystals in high-end applications.
Owner:JIANG SU JI XIN XIAN JIN CAI LIAO YOU XIAN GONG SI

An apparatus and method for reducing the density of threading dislocation defects in silicon carbide crystals

This application provides an apparatus and method for reducing the density of through-type dislocation defects in silicon carbide crystals. The apparatus includes an insulation component formed by an upper insulation layer, a first outer insulation layer, and a lower insulation layer. The insulation component is provided with gas exchange channels. By placing a crucible containing a silicon carbide seed crystal and silicon carbide raw material into the insulation component and placing them together into a single crystal growth furnace, silicon carbide crystal is grown according to the parameters set for each growth stage to obtain an N-type silicon carbide crystal. When in the isothermal section, N2 is introduced into the single crystal growth furnace in a cycle of n periods according to a first flow rate state and a second flow rate state. Nitrogen is intentionally doped into the silicon carbide crystal during the growth process through the gas exchange channels to increase the conversion probability and ejection probability of through-type dislocations to basal plane dislocations and stacking faults in the N-type silicon carbide crystal. This solves the problem of high dislocation density in SiC single crystals grown by the current PVT method.
Owner:GUANGZHOU SUMMIT CRYSTAL SEMICON CO LTD

An ultrahigh-strength pure metal and a method for producing the same

ActiveCN119973103BTransportation and packagingMetal-working apparatusGrain Boundary SlidingStacking fault
The application provides an ultrahigh-strength pure metal and a preparation method thereof, and relates to the technical field of high-performance metal materials. The preparation method of the ultrahigh-strength pure metal provided by the application takes a nano pure metal powder as an initial raw material, and then forms a small block with a size of dozens of microns through high-pressure welding to form a dense pure metal without adding any alloy element. The pressure is a very pure regulation and control means, which can realize extreme strengthening of the nano metal without introducing any impurities. The pressure can effectively inhibit the grain boundary sliding of the nanocrystalline, can compact the nano metal powder to a certain extent, and can avoid grain coarsening, so that the deformation mechanism of the metal itself is activated, including various crystal defects such as full dislocation, partial dislocation, twinning, stacking fault and the like. The multiple types of defects interact with each other, generate strain fields and superimpose on each other, hinder the movement of dislocations, and then bring about strong work hardening and extreme strengthening, so that the pure metal finally realizes ultrahigh strength.
Owner:HARBIN INSTITUTE OF TECHNOLOGY (SHENZHEN) (INSTITUTE OF SCIENCE AND TECHNOLOGY INNOVATION HARBIN INSTITUTE OF TECHNOLOGY SHENZHEN) +1

Method for eliminating small stacking faults of silicon carbide based on high temperature oxidation

The application belongs to the technical field of third-generation semiconductor material defect control. A method for eliminating small-scale stacking faults of silicon carbide based on high-temperature oxidation is proposed. The silicon carbide substrate is scanned and characterized by photoluminescence, and the target small-scale stacking fault is accurately identified and positioned. Then, the substrate is cleaned to remove surface impurities, and high-temperature oxidation treatment is carried out in a dry oxygen atmosphere, and an oxidation layer is controlled to grow. The mismatch of the thermal expansion coefficient between the oxidation layer and the substrate and the reaction molar volume expansion are used to construct a composite interface stress field at the interface, drive the directional reconstruction of the atomic arrangement of the target stacking fault, and convert it into the standard sequence of the matrix. Finally, nitric oxide assisted annealing is carried out, and the nitrogen passivation effect is used to solidify the lattice configuration after reconstruction. The application has the advantages of simple process, strong compatibility, efficient and stable elimination of small-scale stacking faults, and significantly improved crystal quality of silicon carbide substrate, which provides a guarantee for the preparation of high-reliability power devices.
Owner:SHANDONG UNIV

Calibration bodies and methods for their manufacture

PendingDE102024133569A1HydrogenTransportation and packagingHydrogen concentrationStacking fault
The invention relates to the fields of materials science and measurement technology and concerns calibration objects, such as those that can be used in analytical spectroscopy. The object of the present invention is therefore to produce electrically conductive calibration blocks, in particular for the calibration of hydrogen measuring instruments. The calibration blocks can be provided in large quantities, simply and cost-effectively. The problem is solved by calibration bodies, in particular for the calibration of hydrogen measuring instruments, consisting at least of an electrically conductive, porous sintered body with a substantially homogeneous distribution of pores and / or defects, such as dislocations, stacking faults and / or twins, in the sintered body, in which an adjustable hydrogen concentration is present depending on the number and size of the pores and / or defects in the sintered body, wherein the hydrogen is physically and / or chemically bound in and / or on the surface of the pores and / or defects, and wherein the set hydrogen concentration in the calibration body decreases in a specified amount over time.
Owner:TECH UNIV BERGAKADEMIE FREIBERG KORPERSCHAFT DES OFFENTLICHEN RECHTS

A NiAl alloy full-lamellar microstructure and its preparation method

PendingCN122128648AHigh densityStacking fault
This invention belongs to the field of non-equilibrium solidification technology, specifically relating to a NiAl alloy full-lamellar microstructure and its preparation method. The method includes the following steps: (1) preparing a NiAl-based alloy ingot; (2) constructing the NiAl-based alloy ingot into a high-pressure assembly; (3) placing the high-pressure assembly in a heating chamber and performing high-pressure solidification treatment using a press to obtain a NiAl alloy full-lamellar microstructure containing high-density twins and stacking faults; the pressure of the high-pressure solidification treatment is 6-8 GPa, and the temperature of the high-pressure solidification treatment is 1500-1650℃. This invention achieves the construction of a full-lamellar microstructure and the introduction of high-density crystal defects simultaneously in a one-step process through high-pressure solidification. The resulting lamellar structure is rich in nanotwins and stacking faults at the interior and interface. These substructures can effectively hinder dislocation movement, passivate crack propagation, and significantly improve the toughness and deformation capacity of NiAl alloy while enhancing the material strength.
Owner:QUZHOU UNIV

A high-performance magnesium alloy suitable for stirred additive manufacturing and a preparation and processing method thereof

PendingCN122327046ASolution treatmentStacking fault
This invention discloses a high-performance magnesium alloy suitable for stir additive manufacturing and its preparation and processing method. The magnesium alloy has the following composition: Gd 8.5-9.5wt%; Y 2.8-3.2wt%; Zn 1.3-1.7wt%; Ca 0.9-1.3wt%; Mn 0.4-0.8wt%; Sn 1.8-2.2wt%; with the balance being Mg and unavoidable impurities. The preparation and processing method of this magnesium alloy adopts a full-sequence processing technology of "melting → filtrationcastingingot heating → extrusion blanking → solution treatment → cooling to build stacking faults → secondary extrusion molding → combined residual stress elimination → finishing". This invention achieves the synergistic goals of "eliminating LPSO structural phases, building stacking fault structures, reducing residual stress, controlling intragranular precipitates, and improving oxidation resistance" by precisely controlling the alloy composition range and element ratios and optimizing the entire process, thus obtaining soft raw material bars suitable for solid-state additive manufacturing.
Owner:GRIMAT ENG INST CO LTD

A method for predicting steady-state creep rate of multi-element precious metal-based high-temperature alloy based on multi-scale integrated calculation

PendingCN122117133AChemical property predictionComputational theoretical chemistryShear modulusStacking fault
The present application relates to the technical field of multi-element precious metal-based high-temperature alloy, and discloses a multi-element precious metal-based high-temperature alloy steady-state creep rate prediction method based on multi-scale integrated calculation, which comprises the following steps: S1: crystal structures of the multi-element precious metal-based high-temperature alloy and intermetallic compounds are respectively constructed to obtain thermal physical properties of lattice constants, shear moduli, Poisson's ratios, stacking fault energies, diffusion activation energies and diffusion pre-exponential factors; S2: according to the CALPHAD method, the composition-dependent elastic moduli, stacking fault energies and lattice constant thermal physical properties of the multi-element precious metal-based high-temperature alloy are calculated; S3: the thermal physical properties of the multi-element precious metal-based high-temperature alloy single-phase fixed component in S1 and the composition-dependent thermal physical properties in S2 are respectively substituted into a steady-state creep rate model to respectively predict the steady-state creep rates of the multi-element precious metal-based high-temperature alloy changing with temperature and changing with composition. The present application can shorten the research and development cycle of the alloy and reduce experimental costs.
Owner:KUNMING UNIV OF SCI & TECH +1