4332 results about "Epiwafer" patented technology

Provided is a susceptor 13 for manufacturing an epitaxial wafer, comprising a mesh-like groove 13b on a mount face on which a silicon substrate W is to be mounted, wherein a coating H of silicon carbide is formed on the mount face, and the coating has a surface roughness of 1 μm or more in centerline average roughness Ra and a maximum height of a protrusion 13p generated in forming the coating H of 5 μm or less. Thus, defects such as warping and slip as well as adhesion of the silicon substrate to the susceptor are prevented.

In a method for fabricating a flip-chip light emitting diode device, epitaxial layers (14, 114) are deposited on a growth substrate (16, 116) to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die (10, 110). The device die (10, 110) is flip chip bonded to a mount (12, 112). The flip chip bonding includes securing the device die (10, 110) to the mount (12, 112) by bonding at least one electrode (20, 22, 120) of the device die (10, 110) to at least one bonding pad (26, 28, 126) of the mount (12, 112). Subsequent to the flip chip bonding, a thickness of the growth substrate (16, 116) of the device die (10, 110) is reduced.

There is disclosed a method of recycling a delaminated wafer produced as a by-product in producing an SOI wafer according to a hydrogen ion delaminating method by reprocessing it for reuse as a silicon wafer, wherein at least polishing of the delaminated wafer for removing of a step in the peripheral part of the delaminated wafer and heat treatment in a reducing atmosphere containing hydrogen are conducted as the reprocessing. There are provided a method of appropriately reprocessing a delaminated wafer produced as a by-product in a hydrogen ion delaminating method to reuse it as a silicon wafer actually, and particularly, a method of reprocessing an expensive wafer such as an epitaxial wafer many times for reuse, to improve productivity of SOI wafer having a high quality SOI layer, and to reduce producing cost.

A new method for manufacturing a Group III metal nitride epitaxial wafer comprises providing a first nitrogen-contained gas source, providing a second Group III metal trichloride-containing gas source, and causing said first gas to react with second gas in a heating region, thereby forming a Group III metal nitride epitaxial layer on a substrate. The formed epitaxial wafer can serve as a substrate of a laser diode.

According to the present invention, there is provided an SiC epitaxial wafer which reduces triangular defects and stacking faults, which is highly uniform in carrier concentration and film thickness, and which is free of step bunching, and its method of manufacture. The SiC epitaxial wafer of the present invention is an SiC epitaxial wafer in which an SiC epitaxial layer is formed on a 4H—SiC single crystal substrate that is tilted at an off angle of 0.4°-5°, wherein the density of triangular-shaped defects of said SiC epitaxial layer is 1 defect/cm² or less.

A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.

The invention discloses a method for enhancing the antistatic ability of GaN-based light-emitting diode. The epitaxial wafer structure of the light-emitting diode sequentially comprises an underlay, alow-temperature buffer layer, an unadulterated GaN high-temperature buffer layer, an aluminum gallium nitride/ GaN superlattice structure, the unadulterated GaN high-temperature buffer layer, an N type contact layer, an N type GaN conductive layer, a light-emitting layer multiple quantum well structure MQW, a P type aluminum gallium nitride electric barrier layer, a P type GaN conductive layer and a P type contact layer in a sequence from down to up. In the invention, the aluminum gallium nitride/ GaN superlattice periodic structure is inserted in the unalloyed GaN high temperature buffer layer. The insertion of the aluminum gallium nitride/ GaN superlattice periodic structure can effectively improve crystal quality of materials, thereby enhancing the antistatic ability of the GaN-based light-emitting diode and improving the reliability and the stability of devices.

The invention discloses a method for improving the LED external quantum efficiency. The growth mode of a P-shaped layer in an LED epitaxial wafer structure adopts the following novel coarsening method: improving the doping concentration of Mg in the P-shaped layer so as to reach the effect of coarsening the surface of the epitaxial wafer. The coarsened layer can be any layer or any multiple layersin the P-shaped composite layer, or a certain area in a certain layer. The method not only ensures a higher hole concentration, but also provides a coarsened surface. The LED surface coarsened layercan change the direction of light rays meeting a total reflection law, break down the total reflection of the light rays inside the LED, improve the light emission efficiency, and consequently improvethe external quantum efficiency.

A wafer having heterostructure therein is formed using a substrate with recesses formed within a dielectric layer. A magnetized magnetic layer or a polarized electret material is formed at the bottom of each recess. The magnetized magnetic layer or a polarized electret material provides a predetermined magnetic or electrical field pattern. A plurality of heterostructures is formed from on an epitaxial wafer wherein each heterostructure has formed thereon a non-magnetized magnetic layer that is attracted to the magnetized magnetic layer formed at the bottom of each recess or dielectric layer that is attracted to the polarized electret material formed at the bottom of each recess. The plurality of heterostructures is etched from the epitaxial wafer to form a plurality of heterostructure pills. The plurality of heterostructure pills is slurried over the surface of the dielectric layer so that individual heterostructure pills can fall into a recess and be retained therein due to the strong short-range magnetic or electrical attractive force between the magnetized magnetic layer in the recess and the non-magnetized magnetic layer on the heterostructure pill or between the polarized electret material in the recess and the dielectric on the heterostructure pill. Any excess heterostructure pills that are not retained in a recess formed within the dielectric layer are removed and an overcoat is applied to form a substantial planar surface.

The invention relates to a single-mode high-power vertical cavity surface emitting laser (VCSEL), which belongs to the field of semiconductor photoelectronics. The laser is characterized by comprisinga P-type electrode (1), a P-type Si substrate (2), a metal bonding layer (3), a P-type distributed Bragg reflector (DBR) (4), an oxide limiting layer (5), an active area (6), an N-type DBR (7), a SiO2 mask (8), polymide or benzocyclobutene (BCB) (9), an N electrode (10), a photonic crystal (11) and a light-exiting window (12). The introduction of the photonic crystal into the vertical cavity surface emitting laser with the structure can enlarge an oxidation aperture and improve the single-mode output power; and at the same time, the transfer of the conventional VCSEL epitaxial wafer to the Sisubstrate by adopting bonding technology and the adoption of a design of exiting light at the bottom are convenient for narrowing the distance between a VCSEL epitaxial wafer active area and the Si substrate, improving the thermal characteristics of devices and further improving the single-mode output power.

The invention discloses a device for controlling the delivery and the uniform distribution of reaction gas in a MOCVD reaction chamber. By respectively controlling the flow of gas passages non-uniformly distributed radially on a front gas homogenizing plate and input passages at different positions, at least two reaction gases are respectively introduced into two paths which are radially and axially crossed on a spray header, and can be secondarily distributed by nozzles in different shapes, so the uniformly distributed boundary layer concentration, speed and temperature required are achieved on the surface of a rotary epitaxial wafer, the quality of massively produced epitaxial films and the finished product ratio of massively produced epitaxial wafers are improved, the consumption of expensive reaction gases can be effectively controlled and the epitaxial production cost is reduced. By properly increasing the distance between the surface of the spray header and the epitaxial wafer, deposits generated on the surface of the spray header and the nozzles in the epitaxial growth are reduced, the cleaning period is prolonged, and the production efficiency and system capacity are improved. The device also can reduce the processing difficulty and manufacturing cost of the nozzles of the spray header and cooling medium passages.

The invention discloses a method for enhancing the luminous efficiency of a multiquantum well of a semiconductor diode. A novel gradient growth method is adopted as a multiquantum well growth manner of an epitaxial wafer structure of a light emitting diode; in the multiquantum well structure, InGaN components in the first several periods are gradually increased, so that the stress generated in the growth process of suddenly transferring GaN to InGaN with high In components is eased, and thus the polarization effect is reduced, the crystal quality of the quantum well is improved, and the compounding possibility is increased. In addition, the thicknesses of barrier layers in the first several periods are gradually reduced, the speed of electrons and the traversing possibility of electrons can be reduced by the barrier layers with larger thickness, the traversing possibility of electron holes can be increased by the barrier layers with smaller thickness, so that the electrons and the electron holes are distributed more uniformly and the problem of the reduced efficiency under high current injection is avoided, and therefore the luminous efficiency of the multiquantum well is improved.

The invention relates to a production device for LED lamps, in particular to an epitaxial wafer cleaning device for the production of LED lamps. The technical problem to be solved by the present invention is to provide an epitaxial wafer cleaning device for the production of LED lamps that can save time and effort, improve cleaning efficiency, and protect workers' health. In order to solve the above technical problems, the present invention provides such an epitaxial wafer cleaning device for the production of LED lamps, which includes a workbench, legs, a first air pipe, a vacuum suction cup, a recovery tank, a return pipe, a solution tank, and a water pump. , water outlet pipe, support plate, vacuum pump, etc.; the bottom of the workbench is connected with outriggers by means of bolt connection. The present invention cleans more epitaxial wafers at one time by making the nozzle spray out the cleaning solution and moving the nozzle left and right, thereby saving time and labor and improving cleaning efficiency.

The invention discloses an LED (light emitting diode) epitaxy structure and a preparation method thereof. The LED epitaxy structure successively comprises a substrate, a GaN nucleating layer, multiple pairs of superlattice buffer layers, an n-GaN layer, an MQW luminescent layer, a p-GaN layer and a p-type contact layer from bottom to top, wherein each superlattice buffer layer is formed by an AlGaN/n-GaN alternately stacked structure. The LED epitaxy structure is characterized in that Al(n) is defined to represent an Al component value in the nth pair of AlGaN/n-GaN superlattice buffer layer; N(n) represents the n-type impurity concentration value in the nth pair of AlGaN/n-GaN superlattice buffer layer; the variation trend of Al(n) is gradually lowered after being gradually raised; and the variation trend of N(n) is gradually lowered after being gradually raised. According to the LED epitaxy structure provided by the invention, lattice stress caused by lattice mismatch due to that a sapphire substrate and the GaN lattice are not matched can be effectively and fully released on a bottom layer growth section so as to greatly lower the warping of an epitaxial wafer in the whole high-temperature growth process and improve the wavelength concentricity and yield of the epitaxial wafer. Meanwhile, the GaN lattice quality is effectively improved, the lattice dislocation density is reduced, and the optical-electrical characteristic of the device is more stable.

The invention provides a light-emitting diode with a distributed electric conducting hole structure and a manufacturing method of the light-emitting diode, and belongs to the technical field of photoelectrons. According to the method, a mirror surface reflecting layer is manufactured on an epitaxial wafer, a substrate is bonded on the mirror surface reflecting layer, a base plate, a buffering layer and a cut-off layer on the epitaxial wafer are removed, an N-GaAs ohmic contact layer is exposed, and then a graphical N-GaAs ohmic contact layer, an extension electrode, a main electrode and a back electrode are manufactured. According to the light-emitting diode, the mirror surface reflecting layer is formed by all through holes in a SiO2 electric conducting hole layer and the mirror surface layer, and AuZn in a SiO2 hole and a P-GaP current extension layer form good electricity contact; as no electric conducting holes are formed in a cutting channel and schottky junctions are formed below the electrodes, ineffective injection of currents is reduced, and the light-emitting efficiency is improved.

A flip-chip LED fabrication method includes the steps of (a) providing a GaN epitaxial wafer, (b) forming a first groove in the GaN epitaxial layer, (c) forming a second groove in the GaN epitaxial layer to expose a part of the N-type GaN ohmic contact layer of the GaN epitaxial layer, (d) forming a translucent conducting layer on the epitaxial layer, (e) forming a P-type electrode pad and an N-type electrode pad on the translucent conducting layer, (f) forming a first isolation protection layer on the P-type electrode pad, the N-type electrode pad, the first groove and the second groove, (g) forming a metallic reflection layer on the first isolation protection layer, (h) forming a second isolation protection layer on the first isolation protection layer and the metallic reflection layer, (i) forming a third groove to expose one lateral side of the N-type electrode pad, (j) separating the processed GaN epitaxial wafer into individual GaN LED chips, and (k) bonding at least one individual GaN LED chip thus obtained to a thermal substrate with a conducting material.

A manufacturing method of an LED comprises attaching an LED epitaxial wafer (LED wafer) to an expanding tape, dicing the LED wafer on the expanding tape longitudinally and laterally to a certain element size to divide into a plurality of LED elements, expanding the expanding tape to a certain size to form an enlarged expanding tape, placing respective pairs of element electrodes of the plurality of LED elements that are attached to the enlarged expanding tape on respective pairs of electrodes on a printed-circuit board assembly collectively to perform a bonding, and removing the enlarged expanding tape from the plurality of the LED elements.

The method for producing an SiC epitaxial wafer according to the present invention includes: a step of vacuum baking a coated carbon-based material member at a degree of vacuum of 2.0×10⁻³ Pa or less in a dedicated vacuum baking furnace; a step of installing the coated carbon-based material member in an epitaxial wafer manufacturing apparatus; and a step of placing an SiC substrate in the epitaxial wafer manufacturing apparatus and epitaxially growing an SiC epitaxial film on the SiC substrate.