390 results about "Basal plane" patented technology

A functionalised graphene oxide and a method of making a functionalised graphene oxide comprising: (i) oxidizing graphite to form graphite oxide wherein the graphene sheets which make up the graphite independently of each other have a basal plane fraction of carbon atoms in the sp²-hybridised state between 0.1 and 0.9, wherein the remainder fraction comprises sp³-hybridised carbon atoms which are bonded to oxygen groups selected from hydroxyl and/or epoxy and/or carboxylic acid; and (ii) exfoliating and in-situ functionalizing the graphite oxide surface with one or more functional groups such that functionalisation of the surface is effected at a concentration greater than one functional group per 100 carbon atoms and less than one functional group per six carbon atoms. The functionalised graphene oxide is dispersible at high concentrations in appropriate solvents without aggregating or precipitating over extended periods at room temperature.

The invention relates to an optical component comprising a dispersion of layered minute particulate materials in a binder, the layered materials having a layer thickness, a concentration of particulate in the binder, and a basal plane spacing sufficient to provide a component having a light transmissivity of at least 50%.

An object of the present invention is to improve, in a group III nitride semiconductor device, the productivity, heat radiation characteristic and performance in the element high speed operation; upon a sapphire substrate in which an A plane (an (11-20) plane) is set to be the basal plane, an epitaxial growth layer of a group III nitride semiconductor is formed and, thereon, a gate electrode 16, a source electrode 15 and a drain electrode 17 are formed; these electrodes are disposed in such a way that a direction along which they are laid makes an angle within 20° with respect to a C axis of sapphire.

A process for manufacturing a bipolar type semiconductor device in which at least a part of a region where an electron and a hole are recombined during current flowing is formed with a silicon carbide epitaxial layer that has been grown from the surface of a silicon carbide substrate, is characterized by that the surface of the silicon carbide substrate is treated by hydrogen etching and the epitaxial layer is then formed by the epitaxial growth of silicon carbide from the treated surface. A propagation of a basal plane dislocation to the epitaxial layer can be further reduced by treating the surface of the silicon carbide substrate by using chemical mechanical polishing and hydrogen etching in this order.

A method is disclosed for preparing a substrate and epilayer for reducing stacking fault nucleation and reducing forward voltage (V_f) drift in silicon carbide-based bipolar devices. The method includes the steps of etching the surface of a silicon carbide substrate with a nonselective etch to remove both surface and sub-surface damage, thereafter etching the same surface with a selective etch to thereby develop etch-generated structures from at least any basal plane dislocation reaching the substrate surface that will thereafter tend to either terminate or propagate as threading defects during subsequent epilayer growth on the substrate surface, and thereafter growing a first epitaxial layer of silicon carbide on the twice-etched surface.

A manufacturing method is provided for a silicon carbide semiconductor substrate adapted for reduced basal plane dislocations in a silicon carbide epitaxial layer. Between a silicon carbide epitaxial layer for device fabrication (i.e., a drift layer) and a base substrate formed of a silicon carbide single-crystal wafer, a highly efficient dislocation conversion layer through which any basal plane dislocations in the silicon carbide single-crystal wafer are converted into threading edge dislocations very efficiently when the dislocations propagate into the layer epitaxially grown is provided by epitaxial growth. Assigning to the dislocation conversion layer a donor concentration lower than that of the drift layer, therefore, allows the above conversion of a larger number of basal plane dislocations than the case where the drift layer exists alone (without the dislocation conversion layer).

A buffer layer configured of the same conductive semiconductor layers of two or more layers as a drift layer is installed by epitaxial growth between a first semiconductor layer configuring the drift layer that is a layer in which components of the semiconductor device are made and a base substrate including a silicon carbide single crystal wafer. A step of donor concentration is provided at an interface between the drift layer and the buffer layer, an interface between the semiconductor layers configuring the buffer layer, and an interface between the buffer layer and the base substrate and the donor concentration of the drift layer side is lower than that of the base substrate side, thereby making it possible to convert most basal plane dislocations into threading edge dislocations as compared to the drift layer having one layer or the buffer layer configured of one layer.

A group-III nitride light-emitting device is provided. An active layer having a quantum well structure is grown on a basal plane of a gallium nitride based semiconductor region. The quantum well structure is formed in such a way as to have an emission peak wavelength of 410 nm or more. The thickness of a well layer is 4 nm or more, and 10 nm or less. The well layer is composed of In_XGa_1-XN (0.15≦X<1, where X is a strained composition). The basal plane of the gallium nitride based semiconductor region is inclined at an inclination angle within the range of 15 degrees or more, and 85 degrees or less with reference to a {0001} plane or a {000-1} plane of a hexagonal system group III nitride. The basal plane in this range is a semipolar plane.

The invention discloses a single-component water-cured polyurethane waterproof coating. The single-component coating is a NCO group terminated prepolymer obtained by the reaction of polyether polyol and polyisocyanate after the polyether polyol is hydrated in vacuum; and the weight ratio of the polyether polyol to the polyisocyanate is (2-10): 1. The coating is ecological and environment-friendly, has excellent mechanical property, good high and low temperature resistance and good solvent resistance and corrosion resistance, can be constructed on moist basal planes, does not affect adhesive property, and has high cost performance, low specific weight, low consumption in unit area and low comprehensive manufacturing cost.

The present invention relates to a graphene-nanoparticle composite having a structure in which nanoparticles are crystallized at a high density in a carbon-based material, for example, graphene, and, more particularly, to a graphene-nanoparticle composite capable of remarkably improving physical properties such as contact characteristics between basal planes of graphene and conductivity since nanoparticles are included as a large amount of 20 to 50% by weight, based on 100% by weight of graphene, and a method of preparing the same.

A scratch erasure resistant perpendicular magnetic recording medium comprises a non-magnetic substrate having a surface, and a layer stack formed over the surface and comprising: (i) at least one magnetically hard perpendicular magnetic recording layer; and (ii) at least one low shear modulus layer comprising at least one material having a shear modulus not greater than about 30 GPa. Preferably, the at least one magnetically hard perpendicular magnetic recording layer includes at least a first layer comprised of a magnetic material having a hexagonal close packed (hcp) crystal structure and <0001> preferred basal plane crystallographic orientation with c-axis perpendicular to a surface thereof.

At least one graphene layer is formed to laterally surround a tube so that the basal plane of each graphene layer is tangential to the local surface of the tube on which the graphene layer is formed. An electrically conductive path is provided around the tube for providing high conductivity electrical path provided by the basal plane of each graphene layer. The high conductivity path can be employed for high frequency applications such as coupling coils for wireless power transmission to overcome skin depth effects and proximity effects prevalent in high frequency alternating current paths.

The invention discloses an installing and positioning method of a linear guide rail. The method comprises the following steps of: first determining a reference guide rail and an installation reference surface of the guide rail, flatly placing the guide rail on the installation reference surface of a base so that the guide rail corresponds to the installation reference surface of the base; installing a guide rail screw and enabling the guide rail to be slightly screwed up, and tightly screwing up the guide rail after correcting to ensure that the precision of the guide rail is in a required range; at one side of the guide rail, injecting positioning glue into a gap between the vertical-side reference surface of the base and the corresponding basal plane at the guide rail side to fill the gap; after the positioning glue is cured, placing a wedge block in a positioning groove at the other side of the guide rail and tightly screwing up a welding block screw to compress the guide rail; and regulating and fixing the other linear guide rail according to the same method. The installing and positioning method disclosed by the invention completely replaces the traditional installing and positioning method of the linear guide rail; and by means of the installing and positioning method disclosed by the invention, the requirement for the precision in the process of machining the base reference surface is met, the installation and regulation time of the guide rail is shortened to half a day from original three months, and the requirements on the linear guide rail for all precision levels can be completely met.

The present invention relates to a graphene-nanoparticle composite having a structure in which nanoparticles are crystallized in a carbon-based material, for example, graphene, at a high density, and, more particularly, to a graphene-nanoparticle composite capable of remarkably improving physical properties such as contact characteristics between basal planes of graphene and conductivity, wherein nanoparticles are included as a large amount of 30% by weight or more, based on 100% by weight of graphene, and crystallized nanoparticles have an average particle diameter of 200 nm or more, and a method of preparing the same.

The invention relates to the technical field of rolling of metal composite plates, specifically relates to a method for preparing an aluminum-magnesium-aluminum three-layer metal composite plate by prefabricating a crossed corrugated interface, and aims to solve the technical problems of low composite plate bonding strength and serious texture of a magnesium plate basal plane in a conventional method for preparing the aluminum-magnesium-aluminum three-layer metal plate. According to the technical scheme, the method comprises the following steps: rolling a magnesium plate into a double-faced crossed corrugated shape; then covering two layers of aluminum plates on the upper surface and the lower surface of the magnesium plate; flatly rolling the three layers of plates together; and processing to obtain the three-layer metal composite plate with the upper surface and the lower surface being planes and the middle bonding surface being crossed corrugated. With the adoption of the method, the basal plane texture of a magnesium plate can be effectively weakened, and the bonding strength can be improved. Magnesium with uniform mechanical property can be obtained when the texture strength is obviously reduced, and because a weak and dispersed basal plane texture is obtained, basal plane slippage and twin crystal formation are facilitated during stretching, so that the forming property of the plate is improved.

The invention discloses an adjustable sizing block device. The adjustable sizing block device comprises a seat body, wherein a basal plane is machined on the seat body; a left wedge block and a right wedge block which are symmetrical are arranged on the basal plane; a pushing mechanism is arranged between the left wedge block and the right wedge block; and a supporting block is arranged on an inclined plane above each of the left wedge block and the right wedge block. When the device is mounted, the seat body is arranged on the basal plane, supporting legs below the device is arranged on the supporting blocks, and the number of the device is the same as the supporting legs below the device, namely each supporting leg is provided with the sizing block device. An adjusting bolt is rotated through a tool, and the adjusting bolt is opposite to the spiral direction of threaded connection between a connecting block and the left wedge block; when the adjusting bolt is rotated, the connecting block and the left wedge block are separated or approach each other, the left wedge block and the right wedge block are relatively separated or approach each other, the supporting blocks move upwards or downwards, and the aim of adjusting the height of the supporting position of the device is fulfilled. The device is simple in integral structure, convenient to operate, easy to control, suitable for micro adjustment, time-saving and labor-saving, lightens the labor intensity and improves the working efficiency.

Provided are a defect classifying method and an inspection apparatus which are capable of classifying a defect by distinguishing a basal plane dislocation, which is a killer defect in bipolar high-voltage elements, from other defects. The defect classifying method according to the present invention includes: projecting an illumination beam toward a silicon carbide substrate and forming a reflection image and a photoluminescence image; a first inspection step of detecting a defect image from the reflection image formed; a second inspection step of detecting a defect image from the photoluminescence image formed; and a defect classification step of classifying detected defects based on whether or not the defect image is detected and the shape of the detected defect image.

A method of manufacturing a silicon carbide semiconductor substrate is disclosed in which the density of basal plane dislocations (BPDs) in particular is reduced in an SiC crystal substrate. Irregularities in the surface of the substrate due to this reduction also can be flattened. A method of manufacturing a silicon carbide semiconductor substrate is disclosed in which, prior to forming an epitaxial growth layer on a silicon carbide substrate with an off-axis angle of 1° to 8°, parallel line-shape irregularities, which have an irregularity cross-sectional aspect ratio equal to or greater than the tangent of the off-axis angle of the silicon carbide substrate, are formed in the substrate surface. The irregularites have a height between 0.25 μm and 5 μm.

This invention relates to a technique for ceramic packing the transistor resonator, particularly the ceramic package component used for SMD transistor resonator. It is composed of: the co-sintered ceramic layer and the ceramic cover. Said co-sintered ceramic layer comprises the coincided No.1 ceramic layer and No.2 ceramic layer. Over the No.2 layer is the ceramic cover; on the upper surface of the No.1 layer is the printed convex platform, which is used for supporting transistors and guiding the electrodes, through the holes, to the basal plane soldering plate. The advantages are: simple sintering process, low production cost, reducing shielding gas protective soldering, low kovar frame material requirement, low gold-plated area, and short leading wire.