27 results about "Oxygen precipitates" patented technology

The invention relates to a method for controlling BMD of a heavily boron-doped substrate and a lightly boron-doped epitaxial wafer through RTP, which belongs to the technical field of silicon wafer processing, and comprises the following operation steps of: 1, drawing a single crystal by adopting a Czochralski method, and doping Bo metal during crystal drawing; and 2, slicing, grinding and thinning, polishing, cleaning and epitaxy processes are carried out. Step 3, dividing the silicon wafers after completion into three groups A, B and C for annealing treatment; and meanwhile, a group of reference silicon wafers without RTP annealing treatment are manufactured. And 4, carrying out low-temperature heat treatment, wherein the low-temperature treatment is used for promoting nucleation of oxygen precipitation. And 5, performing high-temperature heat treatment which is used for promoting the growth of an oxygen precipitation nucleation center in the silicon wafer body so as to form high-density oxygen precipitation and induced defects thereof in the silicon wafer body. The method improves the yield of silicon wafers, greatly shortens the time consumed in the annealing process in the manufacturing of an integrated circuit, meets the actual requirement for low temperature in the manufacturing process of the integrated circuit, reduces the technological process, and saves the cost.

The invention relates to a silicon wafer defect detection method. The method comprises the following steps: providing a silicon wafer sample with oxygen concentration lower than 9ppma; carrying out first heat treatment on the silicon wafer sample under a first preset condition so as to generate oxygen evolution nucleation in a P-band region, a B-band region and / or an IDP region; performing secondary heat treatment on the silicon wafer sample under a second preset condition to generate oxygen evolution nucleation in a VDP region; performing third-time heat treatment on the silicon wafer sample under a third preset condition, so that oxygen evolution nuclei generated in the first-time heat treatment and the second-time heat treatment grow; and carrying out minority carrier lifetime test on the silicon wafer sample. Through a three-section heat treatment method, the oxygen precipitation amount of a part of crystal characteristic areas is increased, so that crystal characteristic area boundary distinguishing can be clearly carried out on a silicon wafer with the oxygen concentration below 9ppma.

The invention discloses a CZ method semiconductor monocrystalline silicon crystal pulling growth stripe detection method comprising the following steps: before growth stripe detection, determining the interstitial oxygen content and defect type of a monocrystalline silicon sample, carrying out heat treatment on the sample according to the interstitial oxygen content and defect type to generate oxygen precipitate in a silicon wafer, and then etching the sample wafer to enable the oxygen precipitation corrosion pits to appear to form crystal pulling growth stripes. The method is characterized in that different heat treatment methods are adopted for different defect types and different interstitial oxygen contents to form oxygen precipitates, so that crystal pulling growth stripes can be clearly detected.

The invention relates to the technical field of semiconductor processing, in particular to an oxidation induced fault suppression system for a monocrystalline silicon rapid heat treatment process, comprising: an RTP reaction chamber having an outer reaction chamber and a quartz reaction chamber arranged therein; the heating unit is provided with an upper heating unit and a lower heating unit which are respectively positioned at the top and the bottom of the quartz reaction cavity; the gas path structure is provided with an upper-layer process gas pipeline and a lower-layer process gas pipeline which are connected to the interior of the quartz reaction cavity, high-purity argon is introduced into the upper layer, nitrogen-hydrogen mixed gas is injected into the lower layer, and oxygen readsorption is inhibited through gas layering; the in-situ monitoring module is arranged on the lower side of the quartz reaction cavity and is used for monitoring the crystal temperature gradient and the oxygen precipitation density.

The invention belongs to the technical field of semiconductor material processing, and particularly relates to a method for improving an OISF defect of an 8-inch light phosphorus-doped single crystal and a product thereof, and the method comprises the following steps: in the crystal pulling process, reducing the pulling speed, flattening a solid-liquid interface, balancing the growth rate and the release of thermal stress, so as to reduce the thermal stress and inhibit the formation of the OISF defect; the liquid opening distance is increased, the increase of the liquid opening distance enables the crystal to experience a slower cooling rate in the growth process so as to reduce the accumulation of thermal stress, so that the dislocation defect in the crystal is reduced, dislocation is a potential nucleation point of OISF, and therefore, the increase of the liquid opening distance can inhibit the formation of the OISF defect; after the crystal growth is finished, the cooling rate is increased, so that a crystal bar quickly passes through a temperature interval, the generation of O2V is reduced, the generation of OISF defects is avoided, oxygen atoms are in a solid solution state in the silicon crystal at high temperature, and the higher cooling rate can inhibit the diffusion and aggregation of oxygen, reduce the formation of oxygen precipitates, reduce the density of the OISF defects and also avoid the generation of the OISF defects; therefore, the OISF defect of the 8-inch light phosphorus-doped single crystal is reduced, and the electrical property of the 8-inch light phosphorus-doped single crystal is improved.

The present application discloses a silicon wafer processing method and a silicon wafer. The silicon wafer processing method is used to process a silicon wafer to be processed, and the silicon wafer processing method includes: performing a first annealing treatment on the silicon wafer, the first annealing treatment having a first annealing temperature T1 and a first annealing time t1; performing a second annealing treatment on the silicon wafer that has undergone the first annealing treatment, the second annealing treatment having a second annealing temperature T2 and a second annealing time t2; satisfying: T1≥T2, t2>t1. By performing two annealing treatments on the silicon wafer to be processed during the silicon wafer processing process and controlling the temperature of the first annealing treatment to be greater than or equal to the temperature of the second annealing treatment and the time of the first annealing treatment to be less than the time of the second annealing treatment, the influence of the thermal history of the head and tail of the silicon wafer can be eliminated, and the oxygen precipitation of the silicon wafer can be controlled within a certain range under the condition of little difference in oxygen content.

This invention discloses a method for preparing high sheet resistance shallow pn junction single-crystal silicon wafers based on rapid boron diffusion, comprising the following steps: S1: depositing a boron-containing precursor on the textured silicon wafer surface; S2: depositing a low-temperature oxide layer on the surface of the boron-containing precursor; S3: placing the silicon wafer with the deposited low-temperature oxide layer in a rapid thermal processing device, rapidly heating it to 1050-1350℃ at a heating rate of 5-200℃ / s, holding it at this temperature for 20-600s, and then rapidly cooling it to complete the diffusion and activation of boron atoms in the silicon wafer. This invention employs a combination of low-temperature deposition and rapid boron diffusion, which can significantly shorten the boron diffusion time, reduce energy consumption, and shorten the high-temperature processing time. It also suppresses the formation of oxygen precipitate defects at the source, eliminating problems such as black cores and black rings in batteries, and significantly improving carrier lifetime and material electrical performance.

Methods for detecting oxygen precipitation induced defects during a polishing sequence. The methods are suited for detecting oxygen precipitates in heavily doped boron single crystal silicon wafers or in lightly doped wafers that are COP-free. The methods may involve inspecting a silicon wafer for LLS defects after a thermal anneal followed by a polishing sequence.

The application discloses a chain type pretreatment and efficiency improving equipment for TOPCon cell raw material silicon wafers. The equipment has a heating cavity with a silicon wafer conveying roller, and a temperature sensor and gas inlet and outlet pipelines are arranged in the heating cavity; heating, gas circulation and alarm functions of a central computer control device are provided. The core of the equipment is that the high temperature set in the furnace cavity can be reached, and the stability and uniformity of the temperature in the cavity are ensured; through the high temperature above 1100 DEG C and the oxygen atmosphere, the oxygen precipitation and vacancy defects in the photovoltaic N-type silicon are ablated and repaired, the recombination center in the material body is reduced, the bulk lifetime of the silicon is increased, and thus the cell efficiency is improved; the time required for pretreatment is greatly shortened, and the equipment is favorable for large-scale industrial application.

The invention provides a manufacturing method of a bonded wafer. The manufacturing method comprises the following steps: presetting an oxidation temperature of a device wafer according to an interstitial oxygen concentration of the device wafer; then executing an oxidation process according to a preset oxidation temperature of the device wafer so as to form an oxide layer on the surface of the device wafer, and longitudinally diffusing interstitial silicon atoms on the surface of the device wafer; and bonding the device wafer and the support wafer to form a bonded wafer, wherein the oxide layer is located between the device wafer and the support wafer. The device wafer has the interstitial oxygen concentration in a given range, and the oxidation temperature of the device wafer is preset according to the interstitial oxygen concentration of the device wafer in the process of executing the oxidation process, so that interstitial silicon atoms on the surface of the device wafer can be longitudinally diffused in the process of executing the oxidation process; therefore, the compound can be compounded with vacancies in crystal lattices of the device wafer, so that nucleation points of interstitial oxygen in the device wafer in the oxidation process are reduced or eliminated, and oxygen precipitates are reduced or avoided in the manufacturing process of the bonded wafer.

Methods for detecting oxygen precipitation induced defects during a polishing sequence. The methods are suited for detecting oxygen precipitates in heavily doped boron single crystal silicon wafers or in lightly doped wafers that are COP-free. The methods may involve inspecting a silicon wafer for LLS defects after a thermal anneal followed by a polishing sequence.

Nitrogen-doped CZ silicon crystal ingots and wafers sliced therefrom are disclosed that provide for post epitaxial thermally treated wafers having oxygen precipitate density and size that are substantially uniformly distributed radially and exhibit the lack of a significant edge effect. Methods for producing such CZ silicon crystal ingots are also provided by controlling the pull rate from molten silicon, the temperature gradient and the nitrogen concentration. Methods for simulating the radial bulk micro defect size distribution, radial bulk micro defect density distribution and oxygen precipitation density distribution of post epitaxial thermally treated wafers sliced from nitrogen-doped CZ silicon crystals are also provided.

The invention provides a heating device, a single crystal furnace, a method for improving oxygen precipitation in monocrystalline silicon and monocrystalline silicon. The heating device comprises a plurality of heating pieces arranged around the monocrystalline silicon at intervals, the tops of the heating pieces are connected through a first connecting part, and the bottoms of the heating pieces are connected through a second connecting part; the first connecting part and the second connecting part are both of an annular structure; the heating sheet comprises a first sub-heating part, a second sub-heating part and a third sub-heating part which are sequentially connected from top to bottom, the first sub-heating part is connected with the first connecting part, the third sub-heating part is connected with the second connecting part, and the condition that S1 < 1gt > is met; s2gt; and S3. The heating device is used for heating the monocrystalline silicon in the growth process of the monocrystalline silicon rod, the thermal history of the monocrystalline silicon can be improved, so that primary oxygen precipitation in the monocrystalline silicon is reduced, meanwhile, the monocrystalline silicon can be uniformly heated in the single crystal furnace by controlling the heat transfer area of the heating piece from top to bottom to be gradually reduced, and the quality of the monocrystalline silicon is improved. And the radial uniformity of oxygen precipitation is improved.

The present invention relates to a method for measuring the size of oxygen precipitates in a silicon wafer. The method comprises obtaining the LSE size of defects on the surface of the silicon wafer, dividing the defects into a first defect group and a second defect group based on the LSE size, and calculating the size of the oxygen precipitates in the silicon wafer according to the LSE size. The method for measuring oxygen precipitates of the present invention can quickly and accurately obtain the actual size of the oxygen precipitates on a silicon wafer to be tested containing a large amount of oxygen precipitates, thereby saving time and reducing costs.

The invention relates to the technical field of semiconductor materials, in particular to a heavily-doped silicon single crystal oxygen precipitation detection method which comprises the following steps: S1, pickling a complete silicon wafer; s2, spraying the atomized transition metal salt solution on the surface of the silicon wafer; s3, placing the silicon wafer in a nitrogen atmosphere of 750-900 DEG C, and keeping the temperature constant for 30-60 minutes; s4, cooling the silicon wafer to room temperature at a cooling rate of 10-20 DEG C / s; s5, removing an interference layer on the surface of the silicon wafer; s6, observing the metal decoration pattern on the surface of the silicon wafer to judge the oxygen precipitation concentration; thus, through cooperative control of the temperature and the cooling rate, the metal ions are selectively deposited only at the oxygen precipitation and the induced defects of the oxygen precipitation, so that the concentration of the oxygen precipitation is accurately and reliably revealed; meanwhile, the oxygen precipitation concentration is measured by performing metal decoration on the surface of the complete silicon wafer, so that the influence of artificial damage caused by cutting the sample on the detection result can be avoided, and the accuracy of the oxygen precipitation concentration detection result is remarkably improved.

The invention relates to an efficient gettering method for a heterojunction solar cell and a silicon wafer, and belongs to the technical field of silicon wafer manufacturing, and the method comprises the following steps: S1, adding a carbon dopant into a polycrystalline silicon raw material, and growing a high-carbon-concentration monocrystalline silicon rod by using a czochralski method; s2, cutting the monocrystalline silicon rod in the step S1 to obtain a silicon wafer; and S3, carrying out phosphorus diffusion gettering treatment on the silicon wafer in the step S2 at the set temperature and time. According to the gettering method, the size of the original oxygen precipitate of the grown silicon wafer is reduced, the inner gettering capacity of the oxygen precipitate is weakened, metal impurities in the silicon wafer are more effectively removed through outer gettering, the minority carrier lifetime of the silicon wafer is prolonged, and therefore the battery efficiency is improved.

The application relates to the technical field of semiconductor material manufacturing, and discloses an N-type monocrystalline silicon wafer diffusion impurity absorption optimization method, which comprises the following steps: removing surface contaminants and tiny defects by pretreating an N-type monocrystalline silicon wafer; forming an impurity absorption layer on at least one surface of the pretreated N-type monocrystalline silicon wafer; performing diffusion annealing treatment on the N-type monocrystalline silicon wafer with the formed impurity absorption layer, and removing the impurity absorption layer material on the N-type monocrystalline silicon wafer after the diffusion annealing treatment; and completing the N-type monocrystalline silicon wafer diffusion impurity absorption optimization work. The impurity absorption layer formed on the surface of the silicon wafer can effectively capture and fix heavy metal impurities and defects, such as oxygen precipitation and metal precipitation, which may be generated in the subsequent process of the silicon wafer, so as to prevent the impurities and defects from causing adverse effects on the performance of the silicon wafer. The diffusion annealing treatment further promotes the diffusion of the impurities and the impurity absorption capacity of the impurity absorption layer, and ensures the effective removal of the impurities.

To propose a method for evaluating the intrinsic gettering capacity in a silicon wafer more precisely.SOLUTION: The method for evaluating the gettering capacity in a silicon wafer uses the product R (the diameter of the sphere of an oxygen precipitated material in the silicon wafer)×δ (the strain around the oxygen precipitated material).SELECTED DRAWING: Figure 2

The invention discloses an interstitial oxygen content detection method for a heavily-doped silicon single crystal, which comprises the following steps: carrying out heat treatment at a target temperature on a heavily-doped silicon single crystal to be detected and a reference sample in an inert gas atmosphere, interstitial oxygen in the heavily doped silicon single crystal to be detected is converted into oxygen precipitation; respectively carrying out infrared spectrum measurement on the to-be-measured heavily-doped silicon single crystal and the reference sample which are subjected to heat treatment to obtain first infrared spectrum data of the heavily-doped silicon single crystal and second infrared spectrum data of the reference sample; performing differential processing on the first infrared spectrum data and the second infrared spectrum data; and determining the interstitial oxygen content corresponding to the characteristic absorption peak intensity from a preset standard model. Therefore, the measurement accuracy of the interstitial oxygen content is improved.

The present application discloses a silicon wafer and a processing method thereof. The silicon wafer processing method comprises: polishing the silicon wafer to be processed; performing a first annealing treatment on the silicon wafer after the polishing treatment; performing a second annealing treatment on the silicon wafer after the first annealing treatment; wherein the first annealing treatment has a first annealing temperature T1 and a first annealing time t1, and the second annealing treatment has a second annealing temperature T2 and a second annealing time t2, satisfying: T1 ≥ T2, t2 ≥ t1. The present application eliminates the native oxygen precipitation of the silicon wafer by performing two annealing treatments after polishing the silicon wafer, and satisfies: T1 ≥ T2, t2 ≥ t1, thereby ensuring the uniformity of the radial nucleation and growth of oxygen precipitation during the annealing process, reducing the thermal stress effect on the contact position between the silicon wafer and the silicon carbide (SiC) boat teeth during the second annealing treatment, thereby avoiding the generation of slip lines at the contact position.

The invention relates to an in-situ heat treatment method of a monocrystalline silicon crystal bar. The in-situ heat treatment method of the monocrystalline silicon crystal bar comprises the following steps: providing a monocrystalline silicon crystal bar which finishes growing, wherein the monocrystalline silicon crystal bar is positioned in a single crystal furnace; the rotating speed of the monocrystalline silicon crystal bar is adjusted to a first rotating speed, the power of the main heater is adjusted, the temperature of the monocrystalline silicon crystal bar is kept within the temperature range of 650-950 DEG C for a preset time, and the first rotating speed is lower than the rotating speed in the growth process of the monocrystalline silicon crystal bar; the rotating speed of the monocrystalline silicon crystal bar is adjusted to a second rotating speed, the monocrystalline silicon crystal bar is pulled upwards, the temperature of the monocrystalline silicon crystal bar is reduced to 650 DEG C, and the second rotating speed is larger than the first rotating speed. By controlling the heat preservation time of the monocrystalline silicon crystal bar within the temperature range of 650-950 DEG C and the cooling rate within the temperature range of 650-950 DEG C, accurate regulation and control of the size and density of the oxygen precipitated phase are realized.

A donor structure for use in preparing silicon-on-insulator structures includes a donor substrate made of single crystal silicon and a dielectric layer formed on a front surface of the donor substrate. The donor substrate has an interstitial oxygen concentration of less than 7.5x1017 atoms / cm3 and includes a denuded zone extending from the front surface of the donor substrate a denuded zone depth of at least 25 µm. The denuded zone is characterized by non-detectable oxygen precipitates measured by light scattering tomography. The denuded zone depth enables the donor structure to be reclaimed for preparing multiple silicon-on-insulator structures.

The present application relates to a single-crystalline silicon wafer comprising two major parallel surfaces, one being a front surface and the other being a back surface, a central plane between the front surface and the back surface, a circumferential edge connecting the front surface and the back surface, a front layer having a depth D measured from the front surface towards the central plane, and wherein a bulk region is between the front layer and the central plane, wherein: the bulk region contains oxygen precipitates having a density of at least about 1×10<supgt;7< / supgt> cm<supgt;‑3< / supgt> and a peak density of oxygen precipitates of at least about 1×10<supgt;9< / supgt> cm<supgt;‑3< / supgt>, wherein the peak density is between the front layer and the central plane; the front layer contains oxygen precipitates having a density less than about 1×10<supgt;7< / supgt> cm<supgt;‑3< / supgt>, wherein the depth D of the front layer is between about 1 micron and about 40 microns; and the front surface does not have a band of crystal defects associated with a gate oxide integrity pattern.

The present application discloses a silicon wafer and a processing method thereof. The silicon wafer processing method is used for processing a silicon wafer to be processed, and includes: thinning the silicon wafer; annealing the thinned silicon wafer; edge-polishing the annealed silicon wafer, where the annealing time t0 and the annealing temperature T0 satisfy: 3.6 °C / min < T0 / t0 < 5.6 °C / min. Since during the process of CZ silicon crystal growing and cooling to room temperature, due to the growth zone temperature being higher than the nucleation zone, the amount of as-grown oxygen precipitates generated is very small, and most of the oxygen exists in the interstitial state. During the device preparation process, the silicon wafer will experience different times in various different temperature ranges, and the interstitial oxygen in the crystal gradually reaches an equilibrium state, and the supersaturated interstitial oxygen atoms aggregate to form oxygen precipitates. The silicon wafer processing method provided by the present application can increase the density of bulk microdefects in the silicon wafer by annealing the thinned silicon wafer.

The present application relates to an electrolyte and method for rapid diameter reduction of metal wires, and relates to the technical field of metal wire diameter reduction; the electrolyte comprises 20% to 25% ferrous sulfate, 0% to 5% polyhydroxy compounds, and 0% to 0.5% activator, and ferrous sulfate improves the conductivity of the solution and participates in the electrolysis reaction. The hydroxyl groups in the polyhydroxy compounds combine with water molecules to form stable hydrogen bonds, resulting in reduced H2O activity and inhibiting the anode oxygen evolution reaction. The activator promotes the diffusion rate of metal ions in the solution, preventing the anode Fe 2+ The concentration is too high; at the same time, the surface tension of the solution is reduced, and the oxygen released from the anode will form high-concentration oxygen bubbles in the solution and on the surface of the solution, increasing the solubility of oxygen molecules, further inhibiting the anode oxygen evolution reaction, promoting the oxidation of the anode iron, and increasing the anode dissolution rate. This application is applicable to nickel-based, nickel-iron-based, and iron-based alloy wires, and can achieve a wire diameter reduction rate of more than 12% within 10 seconds. It has a wide range of applications, does not add acid or alkali substances, is pollution-free, and meets the current green ecological development requirements.

The application provides a carrier device and a heat treatment device for a heat treatment chamber, comprising: a carrier vehicle, the carrier vehicle comprising a base and wheels, the wheels being connected to the base and located below the base; a support seat, the support seat being arranged on the base and used for placing a semiconductor workpiece; a partition plate, the partition plate being arranged on the base and being perpendicular to the running direction of the carrier vehicle and used for partitioning the heat treatment chamber; and a rotary drive, the rotary drive being arranged below the base and connected to the support seat to drive the support seat to rotate about the axis thereof. The carrier device of the application comprises the carrier vehicle, the support seat, the partition plate and the rotary drive, when the carrier device carries a crystal bar through the heat treatment chamber, the partition plate is used for partitioning the heat treatment chamber, and the rotary drive drives the support seat to rotate so that the crystal bar is uniformly heated, the crystal bar is less likely to be polluted and deformed due to the small contact area and uniform heating, the number and size of oxygen precipitates are regulated, and the performance of the device is improved.

A donor structure for use in preparing silicon-on-insulator structures includes a donor substrate made of single crystal silicon and a dielectric layer formed on a front surface of the donor substrate. The donor substrate has an interstitial oxygen concentration of less than 7.5×1017 atoms / cm3 and includes a denuded zone extending from the front surface of the donor substrate a denuded zone depth of at least 25 μm. The denuded zone is characterized by non-detectable oxygen precipitates measured by light scattering tomography. The denuded zone depth enables the donor structure to be reclaimed for preparing multiple silicon-on-insulator structures.