4 results about "N type silicon" patented technology

The utility model discloses a novel TOPCon cell structure and a photovoltaic assembly thereof, which belong to the technical field of solar cells, and comprise an N-type silicon substrate, the front surface of the N-type silicon substrate is sequentially provided with a front surface suede, a boron diffusion layer, a first front surface passivation layer, a second front surface passivation layer and a front surface conductive metal electrode from inside to outside, the back surface of the N-type silicon substrate comprises a metal region and a non-metal region which are of a planar structure, and the metal region is sequentially provided with a back surface tunneling oxide layer, a phosphorus-doped polycrystalline silicon layer, a first back surface passivation layer, a second back surface passivation layer and a back surface conductive metal electrode from inside to outside; the non-metal area is sequentially provided with a back suede, a first back passivation layer and a second back passivation layer from inside to outside. The technology of removing the superposed polycrystalline silicon layer in the back non-metallization area and growing the suede reduces the optical parasitic absorption of the polycrystalline silicon layer, increases the light absorption of the back of the cell, and effectively improves the double-sided rate of the cell.

The utility model discloses a TBC battery piece comprising an N-type silicon substrate, a first ozone oxidation layer and a first passivation layer are stacked on the front surface of the N-type silicon substrate from inside to outside, and a plurality of P-type areas and a plurality of N-type areas are alternately arranged on the back surface of the N-type silicon substrate. The P-type region comprises a tunneling oxide layer, a P + doping layer, a second ozone oxide layer and a second passivation layer which are sequentially stacked from inside to outside, and the N-type region comprises a tunneling oxide layer, an N + doping layer, a second ozone oxide layer and a second passivation layer which are sequentially stacked from inside to outside. The front surface and the back surface of the TBC battery piece are provided with the ozone oxidation layers and the oxygen oxidation layers which can isolate environmental influence, when an aluminum oxide film is prepared on the surface of a silicon wafer, the influence of temperature, humidity, cleanliness, in-process preparation time and the like on the silicon wafer is reduced, meanwhile, the oxygen oxidation layers further improve the passivation effect, and therefore the power generation efficiency of the battery piece is improved.

The present application relates to the technical field of semiconductor, and relates to a TMBS device and a preparation method thereof, and the present application comprises an N+ type silicon substrate, an N type silicon epitaxial layer, a barrier alloy and a back metal, the N type silicon epitaxial layer is arranged above the N+ type silicon substrate, a plurality of grooves are arranged on the upper portion of the N type silicon epitaxial layer, the grooves comprise uniformly spaced and staggered shallow grooves and deep grooves, the sidewall of the deep groove is provided with an N+ enhancement region, the inner wall of the groove is provided with a silicon oxide layer, the groove is filled with conductive polysilicon, the barrier alloy is arranged above the N type silicon epitaxial layer, and the back metal is arranged below the N+ type silicon substrate.

The utility model relates to photovoltaic manufacturing technical field, concretely is N type silicon wafer gettering with auxiliary tool, including N type silicon wafer annealing gettering's annealing gettering auxiliary jar, the top of annealing gettering auxiliary jar is installed with atomization mixing chamber, and the both sides outer wall symmetry of atomization mixing chamber is installed with inlet pipe and mixed discharge pipe. The utility model discloses the annealing gettering auxiliary jar of setting is used as the core container of N type silicon wafer annealing gettering process, provides stable processing space for silicon wafer;Its top installation atomization mixing chamber, by the inlet pipe and mixed discharge pipe of both sides outer wall symmetry setting, realize the orderly input, mixing and output of gas, guarantee the circulation and reaction of gas in the process;The ultrasonic atomizer of atomization mixing chamber bottom surface inlaying, cooperate the sponge liquid suction pipe of bottom connection and passing through atomization mixing chamber bottom and extending to the inside of annealing gettering auxiliary jar, can effectively atomize the liquid in the jar and participate in gas mixing, enhance the uniformity and efficiency of reaction.