35 results about "Silicon detector" patented technology

The invention provides a front-end readout electronics circuit for a silicon PIN detector. The front-end readout electronics circuit solves the technical problems that an existing front-end readout circuit cannot meet the requirements for quick response, dynamic adjustment of the dynamic range and small nonlinearity error. The charge sensitive amplifier comprises a charge sensitive amplifier and a forming module connected with the charge sensitive amplifier, and the charge sensitive amplifier receives an analog charge signal of the silicon PIN detector and converts the analog charge signal into an analog voltage signal according to a certain gain; the gain is controlled by a feedback capacitor which is dynamically controlled by a register; the reset module is connected in parallel to two ends of the charge sensitive amplifier and is used for releasing the accumulated charge quantity of the charge sensitive amplifier; the forming module performs filtering forming on the analog voltage signal to obtain a Gaussian-like waveform; the forming module comprises a fast forming unit and a slow forming unit, and the fast forming unit is sequentially connected with a comparator and a digital-to-analog converter; the slow forming unit is sequentially connected with the sampling hold circuit, the digital control center module and the analog-to-digital converter. The method can be widely applied to the technical field of particle detection.

The present invention relates to a miniaturized spaceborne high-energy particle detection device and method based on a silicon detector module. The detection device comprises a silicon detector module, a trigger circuit, a differential amplifier circuit, an ADC sampling circuit, an FPGA processor, a data storage unit, a data communication interface, a power conversion circuit, and a sensor bias circuit. The silicon detector module comprises a silicon semiconductor detector and a front-end preprocessing circuit arranged on the same printed circuit board. The silicon semiconductor detector converts received space charged particles into charge signals reflecting particle deposition energy, and the front-end preprocessing circuit converts the charge signals into fast and slow forming pulse signals. The trigger converts the fast forming pulse signal into a trigger signal. The differential amplifier converts the slow forming pulse signal into a differential signal. The ADC collector converts the differential signal output by the differential amplifier into a digital signal. The FPGA processor processes the digital signal output by the ADC collector and converts it into space particle energy spectrum and flux information.

The utility model provides a spectral responsivity calibration device, and relates to the technical field of optical metrology. The device comprises a light source module, a light path module, a detection module, a control system and a packaging box, wherein the control system is respectively in communication connection with a light source, a light path and the detection module; the light source module is a direct-current voltage-stabilizing light source combined by a deuterium lamp and a halogen lamp; the light path module comprises an adjustable grating, a monochromator, a reflector and a lock-in amplifier, and the light path module is of a double-light-path design; the detection module comprises a reference detector, a standard detector and a detected detector. The standard detector is composed of a standard silicon detector, a standard indium gallium arsenic detector, a standard germanium detector and a standard lead sulfide detector. The device can be used for calibrating the spectral responsivity of ultraviolet, visible and near infrared detectors, and can be used for measuring and calibrating the spectral responsivity of the detected detector through a comparison method by arranging standard detectors such as silicon, germanium, indium gallium arsenic, lead sulfide and the like.

The invention discloses a monitoring system and method for the cross state of in-loop reaction beam targets, and relates to the technical field of particle physical experiments. The system comprises a signal source module which is used for taking delta electrons generated by collision of a medium-high energy ion beam and a gas inner target as a signal source for monitoring a beam-target crossing state; the detection equipment module is used for adopting a customized ultrahigh vacuum compatible silicon detector as delta electron detection equipment; and the monitoring module is used for tracking the delta electronic normalization counting rate and monitoring the cross state of the reaction beam target in the ring in real time. The technical scheme has universality, real-time performance, safety and accuracy, and adapts to various beam target combinations.

The application discloses a thin film thickness measuring device and method based on a pixel array type silicon detector, and relates to the technical field of thin film thickness detection.The thin film thickness measuring device based on the pixel array type silicon detector comprises an X-ray generator, a thin film fixing module, a pixel array type silicon detector, readout electronics and an upper computer.The thin film fixing module is used for fixing a to-be-detected thin film.The X-ray generator is used for generating X-rays.The X-rays pass through the to-be-detected thin film and irradiate on the pixel array type silicon detector.The pixel array type silicon detector is used for converting the X-rays into electric signals.The readout electronics is used for conditioning the electric signals to obtain conditioned signals.The upper computer is used for determining a corresponding X-ray energy spectrum according to the conditioned signals, and determining the thickness distribution of each thin film in the to-be-detected thin film according to the X-ray energy spectrum.The application can realize high-precision measurement of the thin film thickness in a simple and fast manner.

The invention discloses a three-dimensional silicon detector airtight packaging structure integrating thermoelectric refrigeration and efficient heat dissipation, and relates to the technical field of detectors, and the three-dimensional silicon detector airtight packaging structure comprises a TO tube cap, an X-ray incidence window, a first limiting ring, a second limiting ring, a TO tube seat, a detector chip and an interconnection lead, and a refrigerating mechanism for refrigerating is arranged at the top end of the vapor chamber. Through phase change circulation of a liquid working medium on the vapor chamber and pressure driving of the vapor chamber, rapid and uniform distribution and efficient diffusion of heat are achieved, formation of local hot spots is effectively eliminated, the integrated capillary structure and the multi-cavity design of the vapor chamber exert excellent heat conduction performance in a limited space, the thermal resistance of the system is remarkably reduced, the dynamic response capability is improved, and the service life of the vapor chamber is prolonged. Therefore, the stability of the working temperature of the thermoelectric refrigeration element is guaranteed, and the heat dissipation reliability and the overall performance of the detector in long-term operation are enhanced.

The invention relates to a nonlinear correction device and method for a spectrum acquisition system, and belongs to the technical field of spectrum detection, the spectrum acquisition system is controlled to start spectrum acquisition from the integration time corresponding to saturated energy, and the integration time is gradually reduced by a preset step length until the full-pixel energy is lower than dark noise, so that the spectrum acquisition efficiency is improved. Obtaining spectral data corresponding to each pixel at different integration times; performing normalization processing on the spectral data corresponding to each pixel at different integration times to obtain a normalization coefficient corresponding to each pixel under different energies; fitting a four-parameter logarithmic function equation based on the energy of each pixel and the normalization coefficient corresponding to the energy, and performing nonlinear correction on the spectrum acquisition system based on the four-parameter logarithmic function equation obtained by fitting; the problem of nonlinearity of absorbance caused by the silicon detector can be systematically corrected; meanwhile, the nonlinear fitting precision is high, the nonlinear correction device is low in cost, and the method is simple, convenient and high in efficiency.

The present invention provides a silicon-based integrated optical chip integrating a silicon-based optical modulator and a germanium-silicon detector and a preparation method thereof. A position and dimension of a silicon nitride waveguide are defined by a slot formed by using an etching process, then surplus silicon nitride is removed by means of chemico-mechanical polishing, and an optical waveguide is formed by the silicon nitride in the slot. Therefore, the preparation of the silicon nitride waveguide according to the present invention can be compatible with a process for preparing the silicon-based integrated optical chip including the silicon-based optical modulator and the germanium-silicon detector, and a distance between the silicon nitride waveguide and the silicon waveguide may be controlled flexibly, so that controllable coupling strength and coupling loss between the silicon waveguide and the silicon nitride waveguide are implemented; and the silicon waveguide at a bottom layer and the silicon nitride waveguide at an upper layer may be used to design in combination various passive devices with better performance, for example, a coupler with lower coupling loss and a waveguide with lower transmission loss.

A stacked focal planar array (FPA) device and method of fabrication. The method can include forming photodetectors or FPAs by heteroepitaxial growth of III-V PINs, APDs, or other photodetector devices that are bonded to a Si-based read-out integrated circuit (ROIC) wafer in a stacked configuration. In a single-color device example, a wavelength configuring buffer layer and photodetector are grown on a first substrate using compound semiconductor materials to enable infrared detection at desired wavelength(s). Depending on the application, this growth can be done on a graded compliant buffer layer and / or a selectively transparent buffer layer. And, silicon detectors can be incorporated to detect visible and NIR wavelengths in a dual-color device example. Further, the resulting devices can be bonded overlying the ROIC device in a flipped orientation and configured as pixels in a sensor array device coupled to the ROIC device.

The application provides a preparation method of a flat femtosecond laser oversaturated doping device, a method and a detector, and belongs to the technical field of photoelectricity, comprising a femtosecond laser, an electro-optic shutter, a second half-wave plate, a second Gartai Taylor prism, a focusing lens and a closed processing cavity arranged in sequence, sulfur film is plated on the surface of silicon as a dopant by using a thermal evaporation method, and the number of processing pulses is accurately controlled by using the electro-optic shutter, so that arbitrary pulse number processing is realized, and uncontrollable random influences caused by surface energy localization and hatching effect are inhibited. The surface of the flat oversaturated doping silicon material prepared by the application is compatible with modern semiconductor industrial technology, is beneficial to the development of silicon-based series photoelectric devices and promotes the development of CCD and CMOS focus plane devices. In addition, the light responsivity of the flat oversaturated doping silicon detector prepared by the application exceeds 1A / W in the 350-1200nm wave band, and ultraviolet enhancement and sub-bandgap infrared detection are simultaneously realized.

The present application relates to a kind of space particle detector based on silicon detector module and its detection method, comprising: silicon detector module, main amplifier, ADC collector and FPGA processor;Wherein, the silicon detector module includes: a piece of silicon semiconductor detector and ASIC device mounted on the same printed board;The ASIC device includes: charge preamplification module, fast shaping circuit and slow shaping circuit.The detection device of the present application adopts silicon detector module, and integrates silicon semiconductor detector and ASIC device, with charge signal amplification, fast / slow voltage pulse signal shaping function;It can also measure the energy spectrum and flux of charged particles;And, through ASIC module and differential amplifier circuit, the consistency of voltage signal input / output linearity is improved;When used for space charged particle measurement, through the high integration and shielding structure design of silicon detector module, the low noise, high integration requirement of space particle detector is reached, and the signal-to-noise ratio is improved.

The utility model relates to the field of sample placing racks related to silicon detection, in particular to an automatic sample rack for a silicon detector. The automatic sample holder for the silicon detector comprises a sample disc, an upper fixing frame, a lower fixing frame and a sample disc guide rail connecting the upper fixing frame and the lower fixing frame, at least one side face of the lower fixing frame is provided with a sample disc clamping mechanism, and the sample disc clamping mechanism comprises a clamping jaw and a reset spring. The reset spring is arranged on the rotating shaft of the clamping jaw in a sleeving mode. Positioning grooves corresponding to the clamping jaws are formed in the sample disc; in the initial state, the front end of the clamping jaw is located in the positioning groove under the acting force of the reset spring. According to the utility model, the sample plate rack can be directly placed into the sample rack without being limited by the sequence, so that the test efficiency is improved.

The utility model provides a double-side-etched double-side-filled groove electrode silicon detector, which comprises a cubic silicon substrate, a groove electrode, a first electrode, a second electrode, a third electrode and a fourth electrode, central anodes are arranged on two sides of the center of the silicon substrate along the vertical direction; trench cathodes are arranged on the two sides of the silicon substrate; the adjacent silicon substrates share the same groove cathode; an anode aluminum electrode contact layer covers the lower part of the central anode; a cathode aluminum electrode contact layer covers the outer side of the upper part of the trench cathode; a lower surface SiO2 layer is covered on the lower surface of the silicon substrate except for the positions which are not covered by the anode aluminum electrode contact layers on the two sides of the trench cathode; and an upper surface SiO2 layer is covered on the upper surface of the silicon substrate except the part which is not covered by the cathode aluminum electrode contact layer on the upper part of the central anode. The problems that a traditional silicon detector cannot eliminate a dead zone and is poor in stability are solved, electrode penetrability is achieved, and the performance is excellent.

The preparation method comprises the following steps: taking silicon as a substrate layer, growing Si3N4 passivation layers on the upper surface and the lower surface of the silicon substrate by adopting a chemical vapor deposition technology, spin-coating a negative photoresist layer on the Si3N4 passivation layer on one surface by utilizing a spin coater, exposing and developing the negative photoresist layer, and repeating the steps on the other surface, thereby obtaining the radiation-resistant ultrafast response silicon detector. Hole patterns formed after photoetching of the front face and the back face are mutually nested, photoresist is washed away through photoresist removing liquid after the exposed part of the Si3N4 passivation layer is removed, then the silicon substrate is soaked in etching liquid to be subjected to constant-temperature and ultrasonic treatment, the silicon substrate is etched to form a three-dimensional hole structure, the residual Si3N4 passivation layer on the surface is removed, and the three-dimensional hole structure is obtained. And finally depositing metal electrodes on the front and back surfaces of the sample respectively. According to the three-dimensional rhombic hole structure provided by the invention, the radiation resistance and ultrafast response capability of the silicon detector can be effectively improved, the selective wet etching quality is high, and the etching cost is low.

The invention relates to a silicon SPAD detector of an integrated waveguide and a manufacturing method of the silicon SPAD detector, and belongs to the field of photoelectric detector chips. The device sequentially comprises a second dielectric layer, a lower electrode, a first dielectric layer, an n + contact region, an avalanche region, a p-absorption region, a p + contact region, a third dielectric layer, a fourth dielectric layer, an upper electrode and a waveguide from bottom to top, wherein the upper electrode and the waveguide are located above the fourth dielectric layer. The lower electrode is connected with the n + contact region through the contact hole of the first dielectric layer; the waveguide is arranged above the fourth dielectric layer and extends to an area corresponding to the third dielectric layer, and the refractive index of the waveguide is larger than that of the third dielectric layer and that of the fourth dielectric layer; and the upper electrode is connected with the p + contact region through the contact hole of the fourth dielectric layer. According to the invention, through integration of the silicon SPAD detector and the waveguide, the coupling loss generated by connecting the photonic integrated chip and the silicon SPAD through the optical fiber is reduced, and the detection efficiency of the device is improved.

This invention relates to the field of silicon detector technology, specifically disclosing a silicon drift detector and a simplified pressurization method for a silicon drift detector array. The silicon drift detector includes: a substrate, a hexagonal anode, a floating cathode concentric ring, and a switching resistor chain. The bottom layer of the substrate is entirely cathode and covered with a first electrode contact layer. The hexagonal anode is located at the center of the top layer of the substrate and covered with a second electrode contact layer. Multiple concentric rings of the floating cathode are arranged around the hexagonal anode. A third electrode contact layer covers the inner end of the switching resistor chain and connects to the innermost concentric ring of the floating cathode. A fourth electrode contact layer covers the outer end of the switching resistor chain and connects to the outermost concentric ring of the floating cathode. This invention can improve the performance of silicon drift detectors and simplify the pressurization method for large-area silicon drift detector arrays.

The invention relates to the technical field of charged particle environment detection, in particular to a micro-gap anti-coincidence detector which comprises a shell, an upper anti-coincidence cup, a lower anti-coincidence cup, a silicon detector, an E detector and a detector support. The upper anticoincidence cup is arranged on the inner wall of the shell in a surrounding mode, and the bottom of the upper anticoincidence cup is arranged on the fixed bottom plate. The lower anti-conforming cup is arranged on the fixed bottom plate and integrally nested at the bottom of the upper anti-conforming cup, and a gap between the lower anti-conforming cup and the lower anti-conforming cup is smaller than 1mm; the detector support is arranged in the center of the interior of the shell. The silicon detector is arranged above the detector support, and the E detector is arranged below the detector support. The anti-coincidence detector is suitable for a deep space compact type space charged particle analyzer, the upper anti-coincidence cup and the lower anti-coincidence cup are installed in an embedded mode, installation of tiny gaps of the anti-coincidence detector is achieved, and false triggering and dispersion events can be effectively removed.

The utility model discloses a refrigeration structure and a packaging structure of a two-dimensional array type silicon detector. The refrigeration structure comprises a silicon-based bottom plate, a silicon-based splitter plate, a cover plate and two water receiving pipes. A first layer of micro-channel is formed between the silicon-based bottom plate and the silicon-based splitter plate through a silicon-silicon bonding process; the silicon-based splitter plate and the cover plate form a second-layer micro-channel through anodic bonding, and the second-layer micro-channel is used for distributing the inflow cooling medium and receiving the backflow cooling medium for each channel in the first-layer micro-channel; the two water receiving pipes are connected with the cooling medium input port and the cooling medium output port in the cover plate respectively and used for providing circulating cooling media for the micro-channel radiator. The refrigeration structure aims to reduce detection dead zones among the modules in the detector and realize efficient and uniform refrigeration of the detector modules.

The present invention discloses a low-capacitance silicon pixel detector array chip and a manufacturing method thereof, belonging to the technical field of silicon detectors. The technical problem to be solved is how to improve the energy and position resolution of a soft X-ray or high-energy charged particle detector array chip. It is composed of a pixel unit array. Each pixel unit includes: a substrate, which is a silicon wafer substrate. One side of the substrate serves as a readout surface, and the side opposite to the readout surface serves as a receiving surface; an oxide layer, formed on the readout surface of the substrate and etched with a groove region, and the groove region includes a circular groove region; a cathode electrode, located within the groove region and embedded in the readout surface of the substrate, for serving as a collection electrode; a protection electrode, in a circular ring shape, embedded in the readout surface of the substrate and surrounding the outer periphery of the cathode electrode, for spacing the cathode electrodes between adjacent pixel units; and an anode electrode, embedded in the incident surface of the substrate and covering the entire incident surface of the substrate.

The present invention belongs to the technical field of photoelectric detector chips, and specifically relates to a method for manufacturing a silicon SPAD detector with low after-pulse; the method comprises: providing a clean P-type epitaxial silicon wafer, growing a silicon oxide dielectric layer; preparing a cut-off ring; preparing a guard ring; injecting P-type impurities and N-type impurities to form an avalanche region; preparing N + contact area; forming an upper electrode on the silicon oxide dielectric layer; bonding a glass carrier sheet to the front of a P-type epitaxial silicon wafer; etching part of the P-type substrate by mechanical grinding and self-stop etching; removing the transition zone in the epitaxial layer by wet etching; preparing P + Contact area; in P + A lower electrode is formed below the contact area; the glass carrier sheet on the front side is untied; the invention removes redundant substrate and transition area, has the characteristics of low after-pulse and high practicality.

The present invention discloses a three-dimensional epitaxially implanted hexagonal electrode silicon detector, comprising a silicon detector array composed of a plurality of silicon detector units, wherein the silicon detector unit comprises an N-type lightly doped silicon substrate, a cathode aluminum electrode contact layer, a cathode aluminum electrode contact layer, an upper surface SiO2, an N-type heavily doped anode and a P-type heavily doped cathode, wherein the N-type lightly doped silicon substrate is first grown by an epitaxial process, and then a P-type heavily doped cathode is doped by ion implantation, and the process is repeated 30 times, wherein the outer side of the P-type heavily doped cathode is covered with a cathode aluminum electrode contact layer, and the top of the N-type lightly doped silicon substrate is embedded with an N-type heavily doped anode. The detector array of the present invention adds an anode at the lower connection of the unit, thereby avoiding the existence of a dead zone in terms of structural design, and thus has a more uniform potential and electric field distribution, a higher charge collection rate, and a more stable performance of the detector.

The invention discloses a single-energy neutron fluence rate absolute measurement device based on a 6LiF telescope system, and belongs to the technical field of neutron detection, the single-energy neutron fluence rate absolute measurement device comprises a cylinder, a collimation diaphragm is arranged in the cylinder, the collimation diaphragm comprises a first center hole and a second center hole, the first center hole and the second center hole are coaxially arranged and have the same diameter, and the first center hole is communicated with the second center hole. A first center hole is formed in one end of the cylinder, a composite layered neutron conversion body is mounted at the first center hole and comprises an aluminum substrate, a 6LiF active layer is evaporated on the upper surface of the aluminum substrate, a passivation ion implantation planar silicon detector is arranged behind a second center hole and is provided with an SMA connector, and a rear cover is arranged at the other end of the cylinder. The center of the rear cover is provided with a BNC female base leading-out signal line. Based on the structural design of the invention, the absolute measurement of the single-energy neutron fluence rate in the energy region from 1 keV to 100 keV can be realized. The method can be used for establishing the reference research of the single-energy neutron fluence rate in the energy region from 1 keV to 100 keV, and the traceability and accuracy of the measurement result of the single-energy neutron fluence rate are ensured.

The invention relates to the technical field of silicon detectors, and particularly discloses a silicon drift detector and a silicon drift detector array with a simplified pressurization mode, and the silicon drift detector comprises a substrate, a hexagonal anode, a floating cathode concentric ring, and a break-through resistor chain. The whole surface of the bottom layer of the substrate is a cathode and is covered with a first electrode contact layer; the hexagonal anode is positioned in the center of the top layer of the substrate and is covered with a second electrode contact layer; a plurality of circles of floating cathode concentric rings are arranged around the hexagonal anode; a third electrode contact layer covers the inner end of the break-through resistance chain and is connected with the innermost floating cathode concentric ring; and a fourth electrode contact layer covers the outer end of the break-through resistance chain and is connected with the outermost floating cathode concentric ring. According to the invention, the performance of the silicon drift detector can be improved, and the pressurization mode of the large-area silicon drift detector array can be simplified.

The invention discloses a preparation method of a three-dimensional silicon detector, and relates to the field of detectors, and the preparation method comprises the steps: carrying out the pretreatment of a wafer, so as to enable the wafer to meet the electrode etching requirements; the p-type electrode is etched in stages, each stage comprises a plurality of cyclic etching processes, the cyclic etching parameters of the same stage are the same, and the etching parameters of different stages are gradually changed according to the etching depth; performing thermal diffusion doping on a solid-state source sheet, filling polycrystalline silicon into the hole or the groove of the p-type electrode, and performing high-temperature thermal diffusion doping by using a solid-state diffusion source to realize doping of the hole or the groove; post-processing to form a complete p-type electrode structure; repeating the steps S2-S4 to etch the n-type electrode in stages, and performing thermal diffusion doping and post-processing on the solid-state source sheet to form a complete n-type electrode structure; metal connection of an n-type electrode and wafer surface passivation are carried out; and performing etching windowing and back metal deposition on the back of the wafer so as to realize metal connection of the p-type electrode. According to the invention, high-precision, high-reliability and environment-friendly preparation of the highly doped electrode can be realized.

This invention discloses a method based on 6 The monoenergetic neutron fluence absolute measurement device for the LiF telescope system, belonging to the field of neutron detection technology, includes a cylindrical body. A collimating aperture is installed inside the cylinder, comprising a first central aperture and a second central aperture. The first and second central apertures are coaxially aligned and have the same diameter. A composite layered neutron converter is installed at the first central aperture. The composite layered neutron converter includes an aluminum substrate, and the upper surface of the aluminum substrate is coated with a... 6 A passivated ion-implanted planar silicon detector is positioned behind the second central hole of the LiF active layer. This detector is equipped with an SMA connector. A rear cover is located at the other end of the casing, with a BNC female connector at its center leading out signal lines. Based on this structural design, absolute measurement of monoenergetic neutron fluence in the energy range of 1 keV to 100 keV can be achieved. This contributes to establishing a benchmark study of monoenergetic neutron fluence in the 1 keV to 100 keV energy range, ensuring the traceability and accuracy of monoenergetic neutron fluence measurement results.

This invention discloses a moving target localization method based on single-pixel imaging in complex backgrounds, comprising: a rapidly moving target entering the scene against a complex grayscale background; playing several binarized Fourier substrate patterns using a digital micromirror device; the light field of the target being rapidly modulated and received by a single-point silicon detector, then converted from analog to digital by a high-speed acquisition card and stored in a computer; then using the Fourier slicing theorem to convert some Fourier coefficients into a one-dimensional line integral signal projected along the x and y axes; comparing the difference between the one-dimensional line integral signals with and without the target in the time dimension; and using a threshold division method to determine the coordinates of the target center. This invention addresses the problem that the imaging frame rate in the single-pixel domain cannot meet the high resolution and real-time requirements of object tracking, effectively broadening the application scope of image-free tracking methods and promoting the application of single-pixel imaging in fields such as moving target detection.

The present application relates to a kind of energy spectrum diagram flux measurement method and dead time correction method, it solves the technical problems that when particle flux is too large, capacitor array in ASIC chip is saturated, resulting in obtaining inaccurate energy spectrum flux and the dead time of ASIC chip is too long in the process of measuring signal of existing silicon detector, it will the trigger signal of ASIC chip be separately led out and be counted in the way of timer, judge total signal quantity, can obtain complete energy spectrum in combination with the data in SCA.

This invention relates to a radiation-resistant composite film structure for photonic chips, belonging to the field of optoelectronic integration technology. From bottom to top, the structure includes a silicon substrate, a silicon dioxide cladding layer, an aluminum thin film, a silicon dioxide layer, a silicon strip waveguide / grating / silicon ridge waveguide / modulator / germanium-silicon detector, a silicon dioxide cladding layer, an aluminum thin film, a silicon dioxide layer, and a silicon nitride layer. This invention designs a composite film layer composed of multiple layers of aluminum thin film, silicon dioxide, and silicon nitride around a typical silicon-based optoelectronic chip. This effectively isolates charged particles, non-electron particles, and photons from the cosmic environment, primarily alpha particles, heavy ions, neutrons, X-rays, and gamma rays. It effectively protects passive and active devices within the silicon-based optoelectronic chip, including waveguides, gratings, modulators, and detectors, solving the problem of performance degradation of silicon-based optoelectronic chips due to radiation exposure in the cosmic environment.

The invention belongs to the field of doped glass, and discloses PbS doped glass for solar blind detection as well as a preparation method and application of the PbS doped glass. The PbS-doped glass for solar blind detection comprises matrix glass and PbS, and the molar weight of the PbS accounts for 0.01-5.0% of the total molar weight of the matrix glass and the PbS. After the PbS doped glass absorbs solar blind light, visible light is obtained, and after the visible light is received by a silicon detector, solar blind light detection is achieved. More importantly, the light-emitting central wavelength of the PbS-doped glass corresponds to the wavelength of the excitation light in a one-to-one manner, so that the influence of other light can be effectively eliminated, only solar blind light is detected, and a brand new detection material is provided for preparing a solar blind detector with high anti-interference performance.

The invention provides a flat femtosecond laser supersaturated doping device and method and a preparation method of a detector, and belongs to the technical field of photoelectricity, the flat femtosecond laser supersaturated doping device comprises a femtosecond laser, an electro-optical shutter, a second half-wave plate, a second Glan-Taylor prism, a focusing lens and a closed processing cavity which are arranged in sequence, and a sulfur film is plated on the silicon surface through a thermal evaporation method to serve as a doping agent. And the electro-optical shutter is used for accurately controlling the number of machining pulses, machining of any number of pulses is achieved, and uncontrollable random influences caused by surface energy localization, the incubation effect and the like are restrained. The prepared flat supersaturated doped silicon material surface is compatible with the modern semiconductor industrial technology, development of silicon-based series photoelectric devices is facilitated, and development of focal plane devices such as a CCD (charge coupled device) and a CMOS (complementary metal oxide semiconductor) is promoted. In addition, the light responsivity of the flat supersaturated doped silicon detector prepared by the invention in the wave band of 350-1200nm exceeds 1A / W, and ultraviolet enhancement and sub-band gap infrared detection are realized at the same time.