7 results about "High resistivity silicon" patented technology

The application relates to the technical field of semiconductor etching materials, and provides a method for preparing high-resistivity silicon carbide material and the silicon carbide material. The method comprises the following steps: placing a substrate in a chemical vapor deposition device, vacuumizing the chemical vapor deposition device, and then introducing inert gas; silicon-carbon source gas and carrier gas are injected into the chemical vapor deposition device through a first gas inlet channel, and boron source gas is injected into the chemical vapor deposition device through a second gas inlet channel; silicon carbide is deposited on the surface of the substrate by using a chemical vapor deposition process; after gradient annealing, the substrate is removed; in step 2, the distance between the gas inlet of the first gas inlet channel and the gas inlet of the second gas inlet channel is greater than or equal to 20 cm. By the method, the boron element doping amount in the silicon carbide can be obviously increased, so that the resistivity of the silicon carbide is increased, and the etching resistance of the silicon carbide is improved.

The application discloses a method for preparing ultra-high resistivity silicon substrate by a Czochralski method, and the process flow of the method is as follows: preparing a silicon single crystal by the Czochralski method, rolling and grinding the single crystal rod, multi-wire cutting, edge chamfering, double-side grinding, chemical etching, heat treatment and chemical mechanical polishing; wherein, in the process of preparing the silicon single crystal by the Czochralski method, a horizontal superconducting magnetic field is used in the single crystal growth process, the magnetic field strength is 1000-5000 Gauss, meanwhile, specific crystal rotation speed and crucible rotation speed are matched, the crystal rotation speed is 1-12 rpm, and the crucible rotation speed is 0.1-2 rpm; the heat treatment process is POLY+LTO thin film growth or high-temperature annealing. The method is suitable for preparing P-type silicon substrate with a diameter of 8 inches or above, a resistivity of 3000 ohm*cm or above and oxygen content of 5 ppma or below. The prepared single crystal has an oxygen content of less than 5 ppma, a resistivity of more than 3000 ohm*cm after annealing, an oxygen content uniformity of less than 10%, and a resistivity uniformity of less than 5%.

Methods for maintaining stable resistivity of a high resistivity silicon-on-insulator (HR-SOI) wafer are presented. The HR-SOI wafer includes a HR-Si substrate having a resistivity that is higher than about 1000 ohm. cm and a dopant concentration that is smaller than about 1013×cm-3. Packaging processing steps of the HR-SOI wafer are performed at a peak temperature that is below about 250 degrees centigrade. According to one aspect, a polyimidization processing step according to the present disclosure is performed at a peak temperature that is below about 250 degrees centigrade. According to another aspect, the packaging processing steps do not include the polyimidization processing step.

A fabrication method and associated apparatus is disclosed where an electromechanical resonator made out of lithium niobate is fabricated on the same substrate as a Josephson Junction-based transmon qubit. The starting material may be a high resistivity silicon wafer with a thin layer of lithium niobate (LiNbO¬3). The fabrication method may include removing lithium niobate selectively from the substrate to preserve the quality of the substrate. The selective removal maintains defect free qualities of the silicon surface, thus enabling the fabrication of high performance Josephson Junction-based transmon qubit on the surface.

The application provides a hot tunable broadband achromatic terahertz metasurface lens based on indium antimonide, relates to the field of electromagnetic metasurfaces, and utilizes the dielectric properties of indium antimonide material sensitive to temperature to realize dynamic switching of functions by regulating the working temperature. The metasurface lens is composed of a high-resistivity silicon column layer and an indium antimonide dielectric layer, and the dielectric parameters of indium antimonide continuously change with the continuous change of temperature. Under the incidence of a conventional Gaussian beam, the device exhibits broadband achromatic focusing performance; under the incidence of a vortex beam, the device maintains a stable focal length position and high mode purity. The application integrates the functions of a broadband achromatic superlens and a tunable vortex generator in a single metasurface structure, breaks through the limitation of single function of a traditional metasurface, and significantly improves the flexibility, adaptability and integration of the device in the application in the terahertz wave band.

The present disclosure is suitable for the technical field of solar cells, and provides a silicon substrate, a solar cell, a cell module, and a photovoltaic system. The silicon substrate is simultaneously doped with P-type doping elements and N-type doping elements, the P-type doping elements include at least one of boron, aluminum, gallium, indium and thallium, and the N-type doping elements include at least one of phosphorus, arsenic, antimony, and bismuth. The sum of the doping concentrations of the P-type doping elements and the sum of the doping concentrations of the N-type doping elements are both greater than 1012atoms / cm3, the absolute value of the difference between the sum of the doping concentrations of the P-type doping elements and the sum of the doping concentrations of the N-type doping elements is less than 1014atoms / cm3, and the resistivity of the silicon substrate after thermal donor elimination treatment is greater than 50 ohm·cm. In this way, by simultaneously doping the P-type doping elements and the N-type doping elements having doping concentrations each exceeding 1012atoms / cm3, and controlling the absolute value of the concentration difference between the two types of doping elements to be less than 1014atoms / cm3, compensation doping of the silicon substrate is performed, such that a solar cell can have improved efficiency while using the high-resistivity silicon substrate.

A high-resistivity trap-diffused low-voltage diode and its fabrication method are disclosed. This invention relates to semiconductor devices. The invention involves selective diffusion on a high-resistivity CZ silicon substrate to fabricate a low-resistivity P+ substrate. Deoxidation treatment is performed on both the high-resistivity substrate and the highly doped low-resistivity P+ substrate to reduce the oxygen content of the device substrate and lower the product's IR. High oxygen content in the substrate easily leads to more load centers, resulting in more defects during production and causing high reverse leakage current. Therefore, the oxygen content should be less than 1 x 10⁻⁶. 17 pcs / cm 3 At the same time, by combining the trap technology, the breakdown point of the diode junction under high current is changed from the edge to the central region, thereby improving the overall withstand voltage capability and reliability of the product.