Polishing process for ultrahigh-resistivity silicon polished wafer

A silicon polishing sheet and resistivity technology, which is applied to surface polishing machine tools, grinding/polishing equipment, manufacturing tools, etc., can solve problems such as the difficulty in research and development of ultra-high resistivity silicon polishing sheets, and achieve simplified wax removal and cleaning procedures and Equipment, easy to clean, and the effect of improving flatness
CN101934490AActive Publication Date: 2011-01-05ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD
Publication Date
2011-01-05

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Abstract

The invention relates to a polishing process for an ultrahigh-resistivity zone-melting silicon polished wafer. Wax-free single-surface polishing is adopted in the process and comprises rough polishing and fine polishing; the rough polishing and the fine polishing are respectively carried out according to pressure and time parameters set in four steps; the polishing solution temperature of the rough polishing and the fine polishing is controlled in a range of 30-40 DEG C; and the large disk temperature of a polishing machine is controlled in a range of 40-60 DEG C. In the process, polishing pressure and time suitable for producing an ultrahigh-resistivity silicon wafer are worked out, quality indexes of flatness, and the like of the polished surface of the silicon wafer are improved by adopting wax-free polishing, especially, an wafer adhering agent is discarded, the contamination of organic matter, and the like is reduced to the greatest extent and the polishing wafer is easy to clean, thereby simplifying wax removal cleaning program and equipment, reducing the cost of the polishing silicon wafer and improving the labor productivity.
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Description

technical field

[0001] The invention relates to a manufacturing process for silicon wafers used in the manufacture of new power electronic devices and semiconductor power devices, in particular to a polishing process for ultra-high resistivity silicon polishing wafers. Background technique

[0002] CMP (mechanical-chemical polishing) is a new technology that can provide comprehensive planarization in the manufacturing process of VLSI. This technology is polished with the help of an alkaline solution containing colloidal silicon suspended particles. It is a mechanical A process in which action and chemical action are balanced. Its chemical action is: In this way it is possible to actually planarize the wafer surface.

[0003] In the chemical reaction, the silicon atoms on the surface react with the water molecules and OH- in the polishing liquid, and connect with the hydrogen bonds outside the underlying silicon through hydrogen-oxygen bonds, and then pass through the fric...

Claims

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