463 results about "Phosphorus diffusion" patented technology

The invention discloses an N-type double-sided battery and a manufacturing method thereof. The manufacturing method comprises the following steps that S1, texturing treatment is performed; S2, a boron source is evenly coated on the upper surface of an N-type silicon wafer in a spin coating or silk-screen printing mode, and boron diffusion is conducted in a furnace tube; S3, a mask is manufactured; S4, phosphorus diffusion is conducted on the lower surface of the N-type silicon wafer, and a high-low-junction structure is formed on the lower surface; S5, phosphorosilicate glass and the mask manufactured in the step S3 are removed; S6, a passivation anti-reflection film made from aluminum oxide and silicon nitride is manufactured on the surface of the diffused boron, and a silicon nitride passivation anti-reflection film is manufactured on the surface of the diffused phosphorus; S7, electrodes are manufactured. The manufacturing method of the N-type double-sided battery is simple in process, and the efficiency of the battery is effectively improved. In addition, a passivation layer manufacturing method of the N-type double-sided battery is a low-temperature process, and a PN junction is not damaged.

The invention relates to a high efficiency N-type double-faced solar cell and a preparation method thereof. The structure of the solar cell comprises an N-type silicon slice substrate, a front side boron doping layer, a back side phosphor doping layer, double-faced silicon dioxide passivation layers, doubled-faced silicon nitride antireflection layers and double-faced electrodes. The invention further discloses a preparation method for the solar cell, the preparation method particularly comprises the first step that double-faced texturization is conducted; the second step that front side boron diffusion is conducted; the third step that front side film masking is conducted; the fourth step that back side washing is conducted; the fifth step that back side phosphorus diffusion is conducted; the sixth step that a mask film is removed; the seventh step that double-faced passivation is conducted; the eighth step that double-faced film coating is conducted; the ninth step that the front side electrodes and the back side electrodes are formed; the tenth step that laser edge carving is conducted. According to the high efficiency N-type double-faced solar cell and the preparation method thereof, knots are formed on both the front side and the back side of the N-type silicon slice, the front side and the back side both have high photoelectric converting rates, the output power of an assembly of the high efficiency N-type double-faced solar cell is 20% higher than the output power of a common solar cell, and meanwhile the high efficiency N-type double-faced solar cell is applicable to large-scale industrial production due to the fact that the preparation technology is simple and practical.

The invention discloses a method for manufacturing a selective emitter solar cell from local laser melting phosphorosilicate glass, which comprises the following steps of: texturing the surface of a chip; performing phosphorous diffusion by utilizing thermal diffusion, and generating the phosphorosilicate glass on the surface; diffusing the phosphorous element in the phosphorosilicate glass on a laser scanning part into the chip through local chip-melting; isolating the boundary; removing a damaged layer formed in the laser chip-melting process; removing the residual phosphorosilicate glass; forming a coating on the front surface; plating silver paste on the front surface of the chip in a screen printing mode, and obtaining a front electrode in a laser scanned area; plating the silver paste on a rear surface of the chip to form a back electrode, and plating aluminum paste on the rear surface of the chip in the screen printing mode to form a back electric field; and sintering the chip to make the metal electrode element and silicon in the chip eutectic. Only one diffusion process is present in the whole process, and the process is simple, has no damage to the silicon chip and has good gettering effect.

The invention discloses a process for preparing an n-type solar cell by co-diffusion of boron and phosphorus, which comprises the following steps: making surface texture; screen-printing boron slurry or phosphorus slurry on the surface of a silicon chip, and drying at 100-500°C Dry for 5~30 minutes; according to the self-blocking and out-diffusion characteristics of boron slurry or phosphorus slurry at high temperature, you can choose whether to screen print a layer of barrier layer slurry on it; the active layer is back-to-back for high-temperature boron and phosphorus diffusion; for For n-type silicon wafers printed with boron paste, first diffuse at 880-1100°C for 10-60 minutes, then cool down to 800-950°C, and then inject POCl3 source for phosphorus diffusion for 10-60 minutes; for n-type silicon wafers printed with phosphorous paste BBr3 source was passed into the wafer at a temperature of 880-1100°C for boron-phosphorus co-diffusion for 10-60 minutes; edge isolation and removal of BSG, PSG and barrier layers; double-sided passivation; preparation of electrodes.

Pipe defects in n-type lightly doped drain (NLDD) regions and n-type source / drain (NDS) regions are associated with arsenic implants, while excess diffusion in NLDD and NSD regions is mainly due to phosphorus interstitial movement. Carbon implanatation is commonly used to reduce phosphorus diffusion in the NLDD, but contributes to gated diode leakage (GDL). In high threshold NMOS transistors GDL is commonly a dominant off-state leakage mechanism. This invention provides a method of forming an NMOS transistor in which no carbon is implanted into the NLDD, and the NSD is formed by a pre-amorphizing implant (PAI), a phosphorus implant and a carbon species implant. Use of carbon in the NDS allows a higher concentration of phosphorus, resulting in reduced series resistance and reduced pipe defects. An NMOS transistor with less than 1·1014 cm−2 arsenic in the NSD and a high threshold NMOS transistor formed with the inventive method are also disclosed

It is an object of the present invention to provide a silicon solar cell with n+pp+ BSF structure using solar grade silicon substrate, having a life time close to the initial level of the substrate.The solar cell of the present invention is produced by a back side boron diffusion step for diffusing boron on a back side of the substrate, a front side phosphorus diffusion step for diffusing phosphorus on a front side of the substrate, a low-temperature annealing step for annealing the substrate at 600° C. or lower for 1 hour or more, and an electrode firing step carried out at a peak temperature of 700° C. or lower for 1 minute or less, carried out in this order.

The invention relates to a method for passivating a P-type doping layer of an N-type silicon solar cell and a cell structure. An emitter of a non-metal contact region of a P-type emitter junction at the back of an N-type czochralski silicon matrix forms a floating junction through a phosphorus diffusion layer, the floating junction is isolated from a back metal grid line through a dielectric film, and a passivating film is formed on the surface of the floating junction. An N-type front surface field is formed on the front of the matrix, a pyramid suede structure is formed on the front of the N-type front surface field, a SiNx layer with a passivating N-type surface field is arranged on the surface of the N-type front surface, and metal grid lines are arranged on the front and the back of a battery cell. A boron-doped layer is passivated by using the floating junction, and needs not to be subjected to production line reconstruction compared with a mode of passivating by using Al2O3, thus the method is suitable for massive industrialized production and has an efficiency reaching 19 percent proved by tests.

The invention provides a method for manufacturing a back passivation point contact solar cell of an aluminum slurry burning-through local thin film. The method comprises the steps of damage removing of a silicon wafer, woolen manufacturing, cleaning, phosphorus diffusion, back phosphorosilicate glass removing, back polishing, phosphorosilicate glass removing and cleaning, back aluminum oxide / silicon nitride laminated thin film growing, front silicon nitride antireflection thin film growing, reverse printing of burning-through aluminum paste, drying, reverse printing of a back electrode and an aluminum layer, front printing of a silver grid line, sintering and testing. burning-through type aluminum paste can be adopted by back point contact of the cell, meanwhile, thin film perforating is achieved, aluminum silicon contact is achieved, a local aluminum back field is formed at the contact position, and therefore two processing steps (laser perforating of the thin film, and aluminum paste sintering and silicon contact) are reduced into one step (adopting of aluminum paste of the burning-through thin film, and needing no thin film perforating in advance), investment of laser equipment is saved, idle printing equipment is fully utilized, and the method has the practical significance.

The invention discloses a manufacturing process of a transient voltage suppression diode chip. The manufacturing process of the transient voltage suppression diode chip includes two production processes: a diffusion process and a GPP process. The steps of the diffusion process include original silicon wafer testing, original silicon wafer washing, phosphorus attachment, phosphorus diffusion, phosphorus wafer separation, single side sand blasting, single blasting washing, boron coating, boron diffusion, boron wafer separation, boron side sand blasting, and boron blasting washing, wherein the step of boron diffusion comprises primary boron diffusion and secondary boron diffusion; and the steps of the GPP process sequentially include oxidation, primary photoetching, groove etching, photoresist sintering, groove washing, SIPOS passive film formation, glassivation, secondary photoetching, surface etching, and nickel-gold plating. The manufacturing process of the transient voltage suppression diode chip in the invention reduces defects of the chip, enables voltage distribution to be relatively concentrated, and reduces reverse leakage current at the same time.

The invention discloses a PERC preparation method, which comprises the following steps: 1) carrying out texturing on a silicon wafer; 2) carrying out back-surface boron diffusion and front-surface phosphorus diffusion on the silicon wafer to form a borosilicate glass layer and a phosphorosilicate glass layer; 3) etching the borosilicate glass layer and the phosphorosilicate glass layer; 4) plating a back-surface passivation layer on the back surface of the silicon wafer; 5) plating a front-surface anti-reflection film on the front surface of the silicon wafer; 6) carrying out back-surface laser grooving on the silicon wafer; 7) carrying out grid line aluminum back-surface field silk-screen printing on the back surface of the silicon wafer; and 8) printing a front-surface electrode on the front surface of the silicon wafer and carrying out sintering. By printing a grid line aluminum back-surface field on the back surface, aluminium slurry can be fully extruded and fully fill the whole opening groove body, thereby reducing aluminium silicon cavity proportion, saving aluminium slurry and reducing manufacture cost; and meanwhile, the PERC prepared through double-side diffusion and superposition and printing of the grid line aluminum back-surface field has a double-battery effect, and has a certain power rise for a current novel double-glass assembly.

The invention discloses a PECVD coating and sintering process for protecting a crystalline silicon solar cell against LID and PID, and belongs to the field of crystalline silicon solar cell manufacturing. The process comprises the steps that a silicon wafer is roughly polished, textured, cleaned and then spin-dried, wherein the size of the textured surface of the textured silicon wafer is smaller than or equal to 5 micrometers; high-temperature phosphorus diffusion is carried out, and etching is carried out after an emitter region is formed, wherein the square resistance of the emitter region ranges from 70 ohm / squ to 120 ohm / squ; after secondary cleaning, front surface PECVD coating, back electrode silk-screen printing and sintering and positive electrode silk-screen printing and sintering are carried out, and then manufacturing of the crystalline silicon solar cell is completed. By optimizing the PECVD coating process, the high-temperature sintering process and the regeneration and recovery process and controlling the concentration and diffusive motion of hydrogen atoms in crystalline silicon, suppression and improvement on LID of the crystalline silicon solar cell are achieved; meanwhile, by utilizing an SiOx film formed through deposition or plasma oxidation, PID of the crystalline silicon solar cell is effectively prevented, and the process can be applied to industrial production.

The invention discloses a transition metallic oxide-silicon heterojunction solar cell and a preparation method thereof. The solar cell comprises a metal back electrode, a silicon inverted pyramid array, an N-type silicon substrate, a silicon pyramid array, a hole transport layer and a positive electrode. The hole transport layer is a transition metallic oxide thin film. According to the invention, by using the transition metallic oxide thin film as the hole transport layer, so on one hand, compared with the P-type conjugated organic matters, stability of the solar cell is improved and technical requirements on encapsulation are reduced, thereby reducing manufacturing cost; and on the other hand, compared with a traditional silicon solar cell, technology of high-temperature phosphorus diffusion and diffusion layer removing are not required, so technology is simplified, and manufacturing cost is reduced. In addition, methylation processing is performed on surface of the silicon substrate, so performance of a device is improved and stability in air of the device is also improved.

The invention relates to a fast recovery diode FRD chip and a production process for the same. The process comprises the following steps of: diffusion pre-treatment, boron source pre-deposition, boron source main diffusion, diffusion after-treatment, single-surface back grinding thinning, oxidation pre-treatment, oxidation, photoetching, single-surface oxide layer removal, phosphorus source pre-deposition, phosphorus diffusion, sand blasting, platinum diffusion, N + surface mesa etching, electrophoresis, sintering, oxide layer removal, nickel plating, gold plating and chip cutting, wherein the structure of the obtained chip is P+-N-N+ type. According to the process, the uniformity of the reverse recovery time of the fast recovery diode is improved and controllability is improved, meanwhile, voltage drop is reduced, leakage current is reduced, and voltage-proof stability is improved; the contradiction of mutual condition among the reverse voltage, the positive voltage, the reverse recovery time and the leakage current of the fast recovery diode is solved to enable the various parameters to achieve the optimal matching, thus improving the reliability and switching characteristic of the diode, and reducing power consumption. The fast recovery diode disclosed by the invention breaks through the technical bottleneck of the traditional fast recovery diodes.

The invention provides solar cells and methods of manufacturing solar cells having a Hetero-junction with Intrinsic Thin-layer (HIT) structure using an n-type multicrystalline silicon substrate. An n-type multicrystalline silicon substrate is subjected to a phosphorus diffusion step using a relatively high temperature. The front side diffusion layer is then removed. As a next step, a p-type silicon thin film is deposited at the front side of the substrate. This sequence avoids heating the p-type silicon thin film above its deposition temperature, and maintains the quality of the p-type silicon thin film.

The invention provides a fabrication method of a P-type back-surface tunneling oxide passivation contact solar cell. The method comprises the steps of performing previous process processing on a frontsurface and a back surface of a P-type single-crystal silicon wafer; oxidizing the back surface to form an ultrathin tunneling oxide layer and fabricate a boron-doping silicon thin film layer; performing phosphorus diffusion on the front surface of the single-crystal silicon wafer, and fabricating a selective emitter; and printing metal electrodes on surfaces of a first passivation anti-reflection layer on the back surface and a second passivation anti-reflection layer on the front surface of the single-crystal silicon wafer, and forming favorable contact between the metal electrodes and thesingle-crystal silicon wafer, thereby obtaining P-type back-surface tunneling oxide passivation contact of the solar cell. The invention provides a complete and practical P-type tunneling oxide passivation contact solar fabrication process circuit, a process method of first back-surface boron-doping poly-silicon thin film and then front-surface phosphorus diffusion, secondary phosphorus diffusioncan be effectively prevented, so that a phenomenon that square resistance is not matched is generated, and the operability is high.

The invention discloses a double-sided N-type crystalline silicon cell comprising a front AgAl electrode, a front antireflection film, a boron emitter passivation layer, a boron emitter p+ layer, an N-type silicon wafer, a phosphorus diffusion n+ back surface field layer, a back passivation layer, a back antireflection film, and a back Ag electrode. The front and the back of the cell are textured surfaces, and both sides can receive light and generate electricity. The boron emitter passivation layer and the back passivation layer are prepared at the same time by growing SiO2 layers through thermal oxidation in a low-temperature dry method, which reduces the interface-state density and the rate of interface recombination. A laminated film composed of a borosilicate glass layer and a silicon nitride layer formed in the diffusion process is used as a boron emitter protection layer. Therefore, boron diffusion surface etching and phosphorous diffusion cross contamination caused by chemical solution are prevented effectively, multiple times of etching and mask deposition in the process are reduced, and the technological process is simplified.

The invention provides a novel method for removing a diffusion layer on a single surface, the method is that a front surface on an N-type single crystal silicon wafer substrate is firstly formed with an N<PLUS> layer by phosphorus diffusion, a silicon nitride thin film protection layer is deposited at the front surface, and a back surface uses the strong base corrosion for removing the back surface diffusion layer; the invention can significantly improve the conversion efficiency of an N-type single crystal silicon solar cell and reduce the cost, the process is simple, the operation is convenient; the invention is applicable to large-scale production, particularly simplifies the technology of removing the back N-type diffusion layer, thus greatly improving production efficiency.

A semiconductor component of the invention comprises a semiconductor substrate; a grid stack which is arranged on the semiconductor substrate; a n-type light doped source / drain area which is arranged in the semiconductor and is stacked adjacent the grid, wherein the n-type light doped source / drain area comprises the n-type impurity; a n-type heavy doped source / drain area, wherein the n-type heavy doped source / drain area comprises the n-type impurity; a pre-amorphized implanting area which is arranged in the semiconductor substrate, wherein the pre-amorphized implanting area comprises a back implanting area; and a clearance blocking area, wherein the depth of the clearance blocking area is larger than the depth of the n-type light doped source / drain area but is less than the depth of the back implanting area. As the clearance blocking area of the invention is arranged between the back implanting area and the light doped source / drain area the problem of phosphorus diffusion in the light doped source / drain area can be reduced. Besides as the phosphorus has high activation rate the MOS element has low chip resistor.

The invention discloses an IBC cell manufacturing method. The method comprises the following steps of carrying out texture surface making; depositing a diffusion mask layer; making a back side P+ definition area; carrying out P+ area boron diffusion to form a back junction; removing a residual diffusion mask layer on a silicon chip surface; printing a phosphor doping slurry on an N+ doped area defined on a silicon chip back side; manufacturing a front surface field; under a high temperature condition, using POCL3 to form the front surface field on an upper surface of the silicon chip, wherein the phosphor doping slurry enters into a substrate to form an N+ area under the high temperature condition during a process that the POCL3 is used to carry out phosphorous diffusion so as to form the front surface field; depositing a passivation reduction reflecting layer on a front side and a back side of the silicon chip; and making a metal electrode. In the method, a phosphorus diffusion technology only needs to be performed once and front field and back field areas possessing different doped concentrations can be synchronously manufactured; and a making technology process of an IBC cell is simplified and production cost is reduced, which is convenient for large-scale popularization.

The invention discloses a preparation method of an N-type passivation contact solar cell. The method sequentially comprises the following steps: performing double-sided polishing on an N-type crystalline silicon substrate; sequentially growing a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface; doping the intrinsic amorphous silicon layer; depositing a silicon nitride film on the back surface; performing texturing and boron diffusion on the front surface; removing the front surface and a borosilicate glass layer wound and expanded to the back surface; preparation of a passivation anti-reflection on the front surface; silver paste printing on the back surface; silver-aluminum paste printing on the front surface; and sintering and like so that preparation ofthe N-type passivation contact solar cell is completed. The problem of electric leakage caused by adopting a phosphorus diffusion process in the conventional process is solved, the step of activatingthe back doping source by high-temperature annealing is omitted, damage to the silicon substrate is reduced, process steps are reduced, production cost is reduced, and the silicon nitride passivationfilm is prepared by plate-type PECVD (plasma enhanced chemical vapor deposition) equipment and thus poor appearance caused by texturing of a clamping groove mark position during front texturing is avoided.

The invention discloses a phosphorus diffusion method for manufacturing a refined polycrystalline silicon solar cell. The method comprises the following 5 steps of: thermal treatment, oxidation treatment, phosphorus diffusion, drive-in treatment and heat preservation. Then the phosphorus diffusion treatment of a refined polycrystalline silicon slice is finished. The phosphorus diffusion method can reduce leakage current of the silicon solar cell and improve the reliability of the cell.

The invention discloses a perovskite laminated solar cell and a preparation method thereof. The structure of the perovskite laminated solar cell comprises a perovskite cell (1) and a full back contact type cell (2) from top to bottom, wherein the perovskite cell comprises multiple light absorption layers; the structure of the top-layer perovskite cell is composed of conductive glass, an electron transporting layer, the multiple light absorption layers, a hole transporting layer and a top part conductive layer; and the structure of the bottom-layer full back contact type cell is composed of an antireflection passivation layer, a phosphorus diffusion front field, a back surface passivation layer, p+ diffusion regions, n++ heavily-doped regions, p+ diffusion region electrodes, and n++ heavily-doped region electrodes. The perovskite laminated solar cell is simple in preparation method, low in cost and high in energy conversion efficiency. Since the top-layer perovskite cell comprising the multiple light absorption layers has higher light absorption capability than an ordinary perovskite cell, the front surface of the full back contact type cell is not sheltered by grid lines, and the two cells can achieve higher photon collection capability in a wide spectral range after being laminated, thereby significantly increasing the conversion efficiency.

The invention discloses a method for improving phosphorus diffusion uniformity of a solar cell. The method comprises the following steps of: (1) placing a silicon slice in a diffusion furnace and raising the temperature of each region in the furnace to 700 to 780 DEG C, wherein the environment in the furnace is uniform nitrogen atmosphere, and the flow rate of the nitrogen gas is 8 to 30L / minute; (2) simultaneously introducing phosphorus-carrying source gas at the speed of 0.8 to 2L / minute and dry oxygen at the speed of 0.4 to 2.5L / minute after the temperature is stable, ensuring that the gas environment in the furnace is uniform, and diffusing for 10 to 40 minutes; (3) stopping introduction of the phosphorus-carrying source gas source and the dry oxygen, synchronously and uniformly raising the temperature of each region in the furnace at the rate of below 5 DEG C / minute, raising temperature to 810 to 900 DEG C and diffusing for 10 to 40 minutes; and (4) reducing temperature and discharging out of a boat. Through uniform gas and consistent temperature in the furnace, the phosphorus diffusion uniformity during preparation of the battery plate is improved, and the conversion efficiency of the solar cell is improved to a certain extent.

The invention relates to a method for manufacturing an N-type selective emitter double-sided battery by spin-coating boron source laser doping. The method comprises the following steps: texturing an N-type silicon wafer; adopting a spin-coating method for spin-coating the front surface of an organic boron source and then drying the organic boron source; carrying out diffusion in a diffusion furnace to form a front lightly doped emitter; carrying out front BSG laser doping to form a heavily doped emitter; cleaning the back surface to remove PSG; carrying out back phosphorus diffusion to form aphosphorus back field; carrying out front and back deposition on an anti-reflective passivation film; and printing front and back electrodes to complete the battery production. Compared with the priorart, the boron source is coated on the front surface of the silicon wafer by adopting the spin coating method, and selective laser doping is carried out by using the BSG formed on the front side after diffusion, so that a region below an electrode is heavily doped with boron, thus the contact resistance is effectively reduced; and a non-electrode region adopts lightly doped boron to reduce the composite of the front surface, so that the electrical performance of the battery is effectively improved.

The invention relates to a phosphorus diffusion technology of solar cell silicon wafer. The technology comprises firstly pre-depositing a thin and uniform P2O5 in changing temperatures (750 to 800 DEG C); and then performing a promoted two-step diffusing method in changing temperatures (800 to 850 DEG C). The low-temperature deposition can reduce concentration on the surface of the silicon wafer, decrease dead layer and lower dark current, and can reduce heat damage and heat defect under low temperature conditions in a relatively good way. According to invention, the technology has an open-circuit voltage (Uoc) higher than that of conventional technology. At the same time, the high temperature difference (50 to 80 DEG C) promotion can further improve P activity, and enables generation of more carriers, formation of relatively high-quality PN junctions, and great improvement of Uoc and Isc, thereby improving light conversion efficiency of cells.

The invention discloses a preparation process for a gradient antireflection silicon nitride thin film of a crystalline silicon solar cell. A phosphorus-diffused crystalline silicon chip is selected, and different microwave powers, different temperatures and different gas flow ratios are set in the heading direction of the silicon chip by adopting a plasma enhanced chemical vapor deposition (PECVD) process, so that the gradient antireflection silicon nitride thin film is formed, and the refractivity of the thin film is sequentially decreased from bottom to top, but does not have a remarkable boundary. The silicon nitride thin film prepared by the process has high gradient silicon nitride bottom layer refractivity, and directly contacts the surface of the silicon chip to achieve a good passivation effect; the silicon nitride thin film with the high bottom layer refractivity is thin, so that light absorption loss is low, and influence on the conversion efficiency of the crystalline silicon solar cell is low; and due to the adoption of the silicon nitride thin film with gradient refractivity, the reflection of light is reduced, an antireflection effect is improved, and the conversion efficiency of the crystalline silicon solar cell can be improved.

The invention discloses a low-voltage diffusion furnace-based ultra-low concentration POCl3 high-temperature diffusion method, which comprises the following steps of (1) entering of a boat; (2) phosphorus deposition; (3) heating knotting; (4) cooling oxidation; and (5) discharging out of the boat. Aiming at the technical defects in an existing diffusion technology, comprehensive consideration is carried out from the aspects of carrier gas consumption, sheet resistance uniformity and stability and the like; the overall diffusion technology is optimized; phosphorus diffusion of ultra-low concentration POCl3 is achieved by low-temperature deposition and high-temperature sub-step anaerobic propulsion modes in a low-pressure environment of 50-100mBar; and the concentration of the POCl3 is only 10% of that of a conventional process. The low-voltage diffusion furnace-based ultra-low concentration POCl3 high-temperature diffusion method has the characteristics of low carrier gas consumption, good sheet resistance and junction depth uniformity, few in surface dead layers and the like; the open-circuit voltage Uoc of a battery sheet can be obviously improved; the carrier gas consumption is reduced; the process running time is shortened; and the sheet resistance uniformity and stability are ensured.

The invention discloses a low-cost n-type dual-side solar battery. The front surface of the solar battery is provided with a boron emitter formed by diffusing boron; a passivation layer and an antireflection layer are deposited on the boron emitter; a back electrode contact position on the back surface of the solar battery is a local phosphorus back surface field, and the rest is a non-doped area; a passivation layer is deposited on the non-doped area; the front surface of the non-doped area is provided with a metal front electrode; and the back surface of the non-doped area is provided with a metal back electrode. The invention further discloses a preparation method of the low-cost n-type dual-side solar battery. Compared with the prior art, the low-cost n-type dual-side solar battery has the beneficial effects that a local n<+>-doped area is formed by using a laser-doped phosphorus-containing film or a coated phosphorus source; and meanwhile, a passivation effect is kept, a front surface field and a back surface field can be formed simultaneously without secondary high-temperature phosphorus diffusion or other masking processes, the manufacturing process of the dual-size n-type solar battery is simplified, and the manufacturing cost is lowered.

The invention provides a preparation method of a Topcon structure solar cell. The preparation method comprises the following steps: S1, providing a prefabricated silicon wafer; S2, sequentially manufacturing tunneling silicon oxide, amorphous silicon and silicon oxide on the back surface of the silicon wafer; S3, cleaning the wound amorphous silicon, and then cleaning the front BSG and the back silicon oxide; S4, performing phosphorus diffusion on the amorphous silicon to form an n + layer; S5, cleaning phosphorosilicate glass on the back surface; S6, preparing passivation layers on the frontsurface and the back surface respectively; and S7, manufacturing an electrode.

The invention discloses a phosphorus oxychloride remover for a phosphorus diffusion furnace, which comprises a buffer box and an exhaust tube, wherein the buffer box comprises a square buffer box body; a Teflon coating is applied onto the inner wall of the buffer box; the back side wall of the buffer box body is provided with a furnace tube opening; the front side of the buffer box body is open and is provided with an air-tight door; the right side of the air-tight door is hinged with the buffer box body; a locking structure is arranged between the left side of the air-tight door and the buffer box body; the air-tight door is provided with a diversion structure; the right side wall of the buffer box body is provided with an exhaust tube opening; the exhaust tube is a U tube; one end of the exhaust tube is provided with an air inlet, and the other end of the exhaust tube is provided with an air outlet higher than the air inlet, and connected with an exhaust fan; the furnace tube of the phosphorus diffusion furnace extends into the buffer box through the furnace tube opening; and the air inlet of the exhaust tube is communicated with the buffer box through the exhaust tube opening. The invention can quickly cool exhaust gas discharged from the diffusion furnace tube by using natural air and misty dilute ammonia water so as to avoid melting the Teflon coating of the exhaust tube, and can also quickly liquefy the phosphorus oxychloride in the exhaust tube.