The invention relates to a two-way low-voltage punch-through transient voltage suppression diode which comprises a silicon chip consisting of five areas from bottom to top, wherein metal electrodes are formed at both the front and the back of the silicon chip, and the five areas comprise a first area which is an n+ underlay with the doping of n type, a second area which is a p+ buried layer with the doping of p type, a third area which is a p- epitaxial layer with the doping of p type, a fourth area which is a p+ emitting area with the doping of p type, and a fifth area which is an n+ emitting area with the doping of n type, wherein the second area horizontally overlaps half of the first area; half of the third area is arranged on the first area and the other half of the third area is arranged on the second area; the fourth area horizontally overlaps half of the third area and is opposite to the position of the second area; and half of the fifth area is arranged on the third area and the other half of the fifth area is arranged on the fourth area. The diode has the advantages of low punch-through, voltage and capacitance, large current, excellent clamping performance, surface punch-through resistance and uniform forward and inverse electrical characteristics.