356 results about "Differential line" patented technology

A differential line driver having integrated output termination resistors is disclosed. The termination resistors are a combination of a controlled transistor and a low precision resistor. The transistor calibrates-out the imprecision of the resistor based on a precise electrical reference. In a preferred embodiment the transistor is a CMOS transistor and the resistor is a CMOS resistor. The combination of a CMOS transistor and CMOS resistor features higher linearity and precision than a CMOS transistor alone due to the smaller effective drain-source voltage across the CMOS transistor. Moreover, the present invention discloses independent programmability of the integrated output termination resistor, the output common mode voltage, and the output amplitude. The value of the output termination resistor(s), the value of the output common mode voltage, and the value of the output amplitude are controlled independently and are continuously maintained with respect to a precise electrical reference. As a result, the value of the output termination resistance, the value of the output common mode voltage, and the value of the output amplitude are insensitive to manufacturing process tolerances and variations in temperature and supply voltage.

An apparatus and method for supplying power to the peripheral circuits of a transmitter circuit, especially an HDMI transmitter circuit, is disclosed. In an HDMI transmitter the termination resistors of the output driver are part of the receiver. DC power for the driver is supplied through these termination resistors. In prior art implementations of circuits this power, supplied by the receiver circuit, is wasted in the DC set-up circuit of the differential line driver. It is suggested to use this wasted power from the remote termination to power selected peripheral circuits of the transmitter. The use of this wasted power in the line driver for powering the peripheral circuits reduces the total system power.

A fail-safe circuit for a pair of differential input lines detects when one or both lines are open. Each line has a pull-up of a switched p-channel transistor in series with a resistor or another p-channel transistor that has its effective resistance controlled by a gate bias. The gate of the switched p-channel transistor is driven to ground when power is applied to the gate of a grounding n-channel transistor. When power is off, a p-channel connecting transistor charges the gate node from the differential input line when a positive voltage is applied to the input line, such as during a leakage test. Charging the gate node prevents the switched p-channel transistor from turning on, blocking a leakage current path through the pull-up. An N-well bias circuit can be added, which connects the N-well under p-channel transistors to power or the gate node or the input line.

Includes a stem with a hole, a dielectric sealed into the hole of the stem and including a pair of pin insertion holes, and a pair of high frequency signal pins that penetrate and fit into the pair of pin insertion holes of the dielectric, and constituting differential lines connected to an optical semiconductor element.

A portable information handling system powered through a docking station charges an internal battery based on available power sensed at the docking station and communicated to a charger of the information handling system. A dock sensor on the information handling system selectively interfaces a local power sensor if the information handling system is not docked or a docking station sensor if the information handling system is docked. Available power sensed at the docking station is communicated to a battery charger of the information handling system by a differential wire pair interfaced through a docking connector.

A differential line driver includes a plurality of driver cells. Control logic outputs positive and negative control signals to the driver cells so as to match a combined output impedance of the driver cells at (Vop, Von). Each driver cell includes an input Vip and an input Vin, an output Vop and an output Von, a first PMOS transistor and a first NMOS transistor having gates driven by the input Vip, and a second PMOS transistor and a second NMOS transistor having gates driven by the input Vin. A source of the first PMOS transistor is connected to a source of the second PMOS transistor. A source of the first NMOS transistor is connected to a source of the second NMOS transistor. First and second resistors are connected in series between the first PMOS transistor and the first NMOS transistor, and connected together at Von. Third and fourth resistors are connected in series between the second PMOS transistor and the second NMOS transistor, and connected together at Vop. A first output switch is driven by a corresponding positive control signal and connected between a supply voltage and the sources of the first and second PMOS transistors. A second output switch driven by a corresponding negative control signal and connected between a ground and the sources of the first and second PMOS transistors.

The present invention provides a novel structure that can be used to filter certain selected frequencies of common mode signals. The structure comprises a stub connected in parallel to a transmission line with termination at the end. It is suitable for implementation on printed circuit boards or backplanes, but it can be also used within the chip, either on die or package substrate. The structure can be also used as an equalizer, and can be used in designing an analog equalizer for high-speed circuits.

In order to transmit high-speed digital signals of several tens of GHz through differential lines, a signal transmission system for transmitting digital signals between circuit blocks via signal transmission lines is provided by connecting a ground-referenced differential line to a non-ground-referenced differential line, Each circuit block basically includes a functional circuit, a receiving/transmitting circuit formed separately from the functional circuit, and an impedance-matched transmission line (115) formed between the receiving end and the transmitting end of the receiving/transmitting circuit; reference ground (110) The differential line (105) is drawn from the differential output driver, and a differential signal line is formed symmetrically with respect to the ground (110) in the circuit block. In the signal transmission line (115), there are only differential pair lines that are not referenced to ground (111, 112) extend directly from differential signal lines arranged symmetrically with respect to ground potential.

The invention relates to a base band data transmission installation and its frame synchronization method. It includes framing machine, serializer, deserialiser, deframing machine, synchronizing frame inserting controller. The serializer and the deserialiser are physically connected by low pressure high speed differential line. The framing machine is used to form the user data to user data frame with the same length. Meanwhile, the synchronizing frame inserting controller inserted synchronizing frame to free frame position periodically, the user data frame and the synchronizing frame are formed to parallel data. The serializer transforms the parallel data after framing to serial data by coding, and transforms to differential signal and transmits out by the low pressure high speed differential line. After the deserialiser transforms the received differential signal to single end signal, the serial data will be transformed to parallel data. The deframing machine finds the frame boundary according to the frame synchronization information contained in the received parallel data, then, each of the received frame data will be distributed to the after stage unit to use. The advantage of the installation and method of the invention is that the band width took up is small, the transmission efficiency is high, and the cost of the frame synchronization is reduced.

An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system.

Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present invention further provides a reduction in skew and crosstalk. Embodiments of the present invention also provide the fabrication of improved transmission lines for silicon-based integrated circuits using conventional CMOS fabrication techniques. One method of the present invention provides transmission lines in an integrated circuit. Another method includes forming transmission lines in a memory device. The present invention includes a transmission line circuit, a differential line circuit, a twisted pair circuit as well as systems incorporating these different circuits all formed according to the methods provided in this application.

The present invention includes a first conductor line connected to one end of an optical semiconductor element (20), and supplying an electric signal to this optical semiconductor element (20); a second conductor line connected to the other end of the optical semiconductor element (20), and supplying an electric signal to this optical semiconductor element (20); a first inductance element (21a) connected to the one end of the optical semiconductor element (20), and cutting off the electric signal at a high frequency; and a second inductance element (21b) connected to the other end of the optical semiconductor element (20), and cutting off the electric signal at the high frequency, wherein the first and the second conductor lines constitute differential lines.

An cable assembly (100) includes an insulated housing (1) extending along a front-to-back direction; a plurality of contacts (2) arranged in a row and supported by the insulated housing, said contacts including three grounding contact members spaced by two pair of signal contact members; a cable (4) including two juxtaposed differential wire pairs (41) respectively enclosed by conductive shielding portions (43); a grounding member (3) including a main portion (31), three finger portions (33) extending forwardly from a front side of the main portion and two arm portions (32) formed at lateral sides of a rear segment of the main portion, said grounding member (3) securely engaged with the cable via the two arm portions thereof griping the conductive shielding portions; and the finger portions soldered to the grounding contact members, and inner conductors of the differential pairs soldered to the signal contact members, respectively.

A parallel wiring according to the present invention includes a plurality of differential lines juxtaposed in a reference direction, wherein each differential line includes two wiring lines which are substantially parallel to each other, and the two wiring lines oppose each other obliquely with respect to the reference direction.

The invention discloses a wiring method of a differential signal line and a PCB. The wiring method includes: rectangular fiberglass fabrics are provided, and the fiberglass fabrics are formed by fiberglass mutually woven in a staggered manner and adhesives filled between the fiberglass; the wiring direction of the differential line is determined, and the bundle number of the fiberglass of the fiberglass fabrics in the direction is obtained; the wiring direction comprises the length direction or the width direction of the fiberglass fabrics; the fiberglass fabrics are divided into fiberglass units with the number equal to the bundle number in the wiring direction, the width of the fiberglass units is obtained according to the dimension and the quantity of the fiberglass fabrics in the direction vertical to the wiring direction, and the fiberglass units comprise fiberglass in the wiring direction and the adhesives; the line distance and the line width of the differential signal line are determined according to the width of the fiberglass units; and wiring is performed on a metal layer along the wiring direction according to the line distance and the line width to form the required differential signal line, and the metal layer is pasted on the surface of the fiberglass fabrics. According to the method, the problems of high cost, large occupied wiring space, and long wiring time of the conventional control differential signal delay wiring method are solved.

A differential line driver circuit comprising a plurality of driver stages is described. Each driver stage is operably coupled to at least one output of the line driver circuit and arranged to receive at least one control signal and to drive at least one output signal on the at least one output of the line driver circuit in accordance with the at least one control signal received thereby. The line driver circuit further comprises at least one delay component arranged to receive the at least one control signal, and to sequentially propagate the at least one control signal to the driver stages with time delays between the propagation of the at least one control signal to sequentially adjacent driver stages. The delay component is arranged to sequentially propagate the at least one control signal to the driver stages such that such that the at least one control signal is propagated with at least one of: a progressively increasing time delay between sequentially adjacent driver stages; and a progressively decreasing time delay between sequentially adjacent driver stages.