316 results about "Signal routing" patented technology

The invention relates to a modeling and optimizing method for inter-layer signal crosstalk of a PCB (Printed Circuit Board). Frequency response data of all dielectric layers of the PCB under different temperature and humidity conditions are collected, and a mapping model with the temperature gradient and the humidity diffusion gradient as input and the dielectric constant as output is established. And calculating the dynamic distribution of mutual capacitance and mutual inductance under the environment change by combining the spatial layout parameters of the differential signal pair, and constructing a crosstalk sensitivity evaluation model with coupled frequency, environment and layout. And high-risk areas with crosstalk sensitivity caused by environment change are identified, and the crosstalk change rate of each area is quantified. For a sensitive area, a temperature and humidity compensation medium structure is introduced to stabilize local dielectric characteristics and reduce the influence of the environment on crosstalk. And according to the compensated medium distribution, adjusting a differential signal wiring path and impedance matching by adopting an optimization method with the aim of minimizing the crosstalk change rate, and generating a wiring layout with environmental robustness. According to the invention, the signal integrity and the transmission reliability of the multi-layer PCB in a temperature and humidity changing environment can be effectively improved.

The invention discloses a power grid multi-range intelligent sensing method and system based on MEMS integration, and relates to the technical field of intelligent sensing, and the method comprises the steps: connecting an MEMS sensing unit to three parallel measurement channels, and connecting the MEMS sensing unit to a controllable signal routing module in parallel; after gating, the signals are sent to a successive approximation analog-to-digital converter for digitalization through nonlinear gain amplification and anti-aliasing filtering; determining a measuring range based on a sampling sequence and a sliding window ratio, and automatically switching channels through a threshold value and a hysteresis mechanism; performing baseline correction on the switching data and performing weighted fusion according to sensitivity and bandwidth; and after the laboratory performs segmented calibration and consistency verification on the three channels, calibration parameters are written and stored, and are transmitted to an upper system through an isolation power supply according to a preset protocol. Automatic range switching is achieved through a sliding window and a hysteresis mechanism, baseline drift correction and weighting fusion according to the proportion of sensitivity and bandwidth are adopted after channel switching, and measurement continuity and precision consistency are ensured.

A chip includes a power grid, power switches coupled between the power grid and a circuit, and current sensors configured to generate sense currents based on load currents passing through the power switches. The chip also includes a readout circuit having an input and an output, and signal routing coupling the current sensors to the input of the readout circuit.

Provided is a semiconductor device which includes a 1st source / drain region; and a 1st contact structure on a 1st portion of the 1st source / drain region; and a 2nd contact structure on a 2nd portion of the 1st source / drain region, wherein at least one of the 1st contact structure and the 2nd contact structure is configured to connect the 1st source / drain region to a voltage source or another circuit element for signal routing.

The invention provides a system and a method for generating CAN (Controller Area Network) mailbox configuration and data routing configuration based on a communication matrix table. The method comprises the following steps of: reading a predefined finished automobile CAN communication network signal routing information table; analyzing the whole vehicle CAN communication network signal routing information table to obtain CAN communication configuration parameters of each CAN channel; the number of receiving mailboxes and the number of sending mailboxes of each CAN channel are distributed according to the maximum number of receiving mailboxes and the maximum number of sending mailboxes supported by the whole vehicle CAN communication network hardware for each CAN channel and CAN communication configuration parameters of each CAN channel; and when the number of the messages to be processed of a certain CAN channel exceeds the allocated mailbox number, classifying the messages, and multiplexing the same mailbox by the messages belonging to the same class. According to the method, CAN mailbox resources are used to the greatest extent, and the reliability of data routing is ensured; when the whole vehicle communication network signal routing table is frequently changed, the reliability of the routing function is ensured, and meanwhile, the development efficiency is improved.

The invention discloses a broadband single-pole double-throw switch MMIC, and belongs to the field of radio frequency / microwave. The switch adopts a symmetrical dual-channel structure, each channel comprises an input end series switch circuit, an output end series switch circuit and two parallel switch branches, channel switching is realized through two complementary control voltages, and impedance matching is carried out between the circuits by adopting microstrip lines. According to the technical scheme, switching tubes, resistors and inductors are utilized to form a circuit network, and a signal transmission path is optimized through the resonance effect of the inductors and switching tube cut-off capacitors in parallel branches in combination with a resistor parallel structure and a microstrip line matching technology. According to the invention, the performance of low insertion loss and high isolation in a broadband is achieved, the voltage standing wave ratio of an off-state output port is reduced, the port matching capability is improved, and an efficient and stable solution is provided for signal routing in a radio frequency system.

A magnetless cryogenic circulator is developed that has three identical resonators in three branches. Each branch connects two ports and each resonator has a capacitor connected across a tunable inductor. A set of tunable inductors modulated with modulation signals that have a relative phase of 0°, 120° and 240° provided through a circuit. A microstrip delay line for providing the modulation signal to the three resonators, wherein the resonators are modulated in time such that the degeneracy of the two inherent counter-rotating modes is lifted, achieving a non-reciprocal signal routing. All capacitors and inductors are monolithically integrated and fabricated using a multi-layer Nb-based process with Nb / AlOx / Nb JJs.

Stacked metal-oxide-metal (MoM) capacitor(s) in front side and back side metallization layers of a semiconductor die, and related fabrication methods. The stacked MoM capacitor includes a first, front side, MoM capacitor formed on the front side of the semiconductor layer of a die and in front side metallization layers in a front side interconnect structure. The stacked MoM capacitor also includes a second, back side MoM capacitor formed on the back side of the semiconductor layer in back side metallization layers in a back side interconnect structure. The front side and back side MoM capacitors are coupled to each other through a conducting structure in a second, vertical direction between the front side and back side interconnect structures to form the stacked MoM capacitor. In this manner, capacitance density in the die can be maintained or increase while providing sufficient area in the front side metallization layers for signal routing.

The invention discloses a high-performance dynamic routing circuit for improving S parameter measurement and a multi-port expansion box, and relates to an S parameter test and port expansion technology. The routing circuit applied to the transmitting path comprises four output ends, six transmitting branch port input ends, a transmitting total port input end, four first-stage equalization amplifiers, two first-stage one-to-two switches, two second-stage equalization amplifiers, four first-stage one-to-three switches, a first-stage one-to-four switch and a third-stage equalization amplifier. The internal paths of the circuit are symmetrical, and the transmission path length of signal routing gating is minimized through the arrangement of a total port and branch ports, so that high performance is ensured. The multi-port expansion box comprises a routing circuit applied to a transmitting path, a routing circuit applied to a reference / test receiving path, a transmitting / reference receiving / test receiving standard configuration routing amplification unit, a bi-directional coupler matrix and the like. Port expansion can be flexibly configured and high performance can be ensured.

Aspects disclosed herein include integrated circuit (IC) packages employing capacitor interposer substrates with aligned external interconnects, and related fabrication methods. The IC package includes one or more semiconductor dies ("dies") electrically coupled to a package substrate that supports electrical signal routing to and from the die (s). A capacitor interposer substrate is disposed between the die (s) and the package substrate. The die (s) are coupled to the embedded capacitor (s) in the capacitor interposer substrate through a die interconnect coupled to an external interconnect of the capacitor interposer substrate. In an exemplary aspect, external interconnects on an outer surface of a capacitor interposer substrate are aligned. In this manner, if the die (s) and the package substrate have a pattern of die interconnects and external interconnects designed to align with each other when coupled to each other, the capacitor interposer substrate may remain compatible with the interconnects of the die (s) and the package substrate.

Integrated circuits (ICs) having a separate signal and power distribution network (PDN) interconnect structures for reduced power signal routing congestion and path lengths, and related three-dimensional (3D) ICs (3DICs) and fabrication methods. The IC includes a separate signal interconnect structure providing input / output (I / O) signal routing, and a PDN interconnect structure for providing power distribution signal routing. The signal interconnect structure is disposed on a first side of a semiconductor layer in the IC, and the PDN interconnect structure is disposed on a second side of the semiconductor layer opposite of the first side. In this manner, performance of semiconductor devices in the semiconductor layer can be improved, because power distribution signals do not have to be routed in a shared interconnect structure that is also used for routing I / O signals, which could otherwise congest and increase power distribution signal routing path lengths in the IC.

The invention relates to the technical field of communication, and particularly discloses a front-end communication circuit and a communication method, and the front-end communication circuit comprises a communication chip, a first external change-over switch and a second external change-over switch. The communication chip is provided with a first transceiver interface, a second transceiver interface and a third transceiver interface. The first external change-over switch is configured to selectively route a middle-high frequency band signal to the first transceiving interface or allow the signal to be input through the second transceiving interface or the third transceiving interface; meanwhile, the second external change-over switch is used for switching the MIMO radio frequency signal to the second transceiver interface or the third transceiver interface. All the selected signals are finally input into the communication chip through corresponding interfaces to be processed. According to the scheme, flexible frequency band combination and carrier aggregation configuration can be supported so as to meet the differentiation requirements of global 5G frequency bands. In addition, through dynamic configuration of an external switch and an interface, a single hardware design can be compatible with module schemes of multiple domestic semiconductor manufacturers, and repeated development investment is avoided.

Integrated circuit package having a substrate employing reduced area, added metal pad(s) to metal interconnect(s) to reduce a die to a substrate clearance and related fabrication methods are disclosed. The IC package includes die interconnects coupled to first metal pad(s) of respective metal interconnects of a metallization layer of the substrate to provide support and signal routing paths. To reduce clearance between the die and the substrate and consequently the height of the IC package, a second, additional metal pad(s) having a reduced cross-sectional area from the first metal pad(s) is coupled to the first metal pad(s). Solder is employed to couple the second, additional metal pad(s) to a die interconnect(s) of the die to couple the die to the substrate. When the solder is heated to form the solder joint, the solder flows along the reduced cross-sectional area of the second, additional metal pad(s).

The invention discloses an FIR filter circuit structure, and the structure comprises a path control unit which generates a first control signal and a second control signal according to the number and order of filters which are customized by a user; the routing unit correspondingly transmits the filtering data received by the filtering data channel unit to the multiply-add unit array based on the first control signal; the multiply-add unit array comprises N multiply-add units, and the multiply-add units are connected through data selectors; the path control register unit is connected with a selection port of the data selector, and the path control register unit controls a data path of the multiply-add unit array through the data selector based on a second control signal; and the filtering result operation unit adds the multiplication and addition results of the corresponding multiplication and addition unit to obtain the filtering result of the corresponding filter. According to the invention, the multiplication and addition unit structure of the filter circuit can be customized according to user requirements, and the FIR filter circuit with low circuit resource ratio and high operation speed is configured.

Provided is a semiconductor package comprising a layer stack. The layer stack of the semiconductor package comprises a first plurality of conductive layers forming a plurality of antenna elements of an end-fire antenna array, wherein each antenna element is configured for a first polarization and for a second polarization, and at least one conductive signal routing layer adjacent to the first plurality of conductive layers, the conductive signal routing layer comprising first routing traces for the first polarization and second routing traces for the second polarization.

This disclosure relates to systems and methods for improving routing of an audio output signal from an electronic device to an audio output device. Such a system can include at least one inertial measurement unit (IMU) arranged in the audio output device; and at least one processor configured to: receive data from the at least one IMU, determine a current status of the audio output device from the received data as either worn or unworn, route an audio output signal from the electronic device to the audio output device if the current status of the audio output device is worn, and route the audio output signal to an audio output of the electronic device if the current status of the audio output device is unworn.

Systems, apparatus and methods for defining an impairment profile along a polarization quantum channel such as in terms of modal loss and decoherence. The disclosed impairment profile or characterization methods may be used as part of a tool such as to inform a network operator of a weakest span of the communication channel, thus facilitating optimal signal routing decisions.

The disclosed computer-implemented apparatus for bridge-based packaging with direct power delivery can include an first layer stacked on a second layer. The second layer can include an interposer die and a connection die. The first layer can include a chiplet die positioned above the interposer die and a first-layer bridge die spanning across the interposer die and the connection die. The interposer die can include a set of physical interfaces and a set of routing features configured to route signals from the set of physical interfaces to the first-layer bridge die. Various other apparatuses, systems, and methods of manufacture are also disclosed.

The invention relates to the field of testing, and provides a signal routing testing method and system and electronic equipment, and the method comprises the steps: responding to a received testing instruction, and determining the signal type of a testing signal corresponding to the testing instruction; determining a test signal value corresponding to a test signal according to the signal type, and performing fault injection on the test signal according to the signal type to obtain a target signal value; in response to the fact that the target signal value is the same as the test signal value, determining that the test result is that the signal routing is normal; or, in response to the fact that the target signal value is different from the test signal value, determining that the test result is signal routing abnormity. According to the method and the device, the problem that the test coverage is not comprehensive due to the fact that the test on the signal routing of the vehicle is limited by the whole vehicle environment, only some signal states can be tested generally, and all signal states cannot be tested is solved.

The invention relates to a low-power-consumption vibration signal collecting and processing system and method based on a heterogeneous multi-core system. The system comprises an MCU, an MPU, an SOC in-chip interconnection module, a trigger signal module and a data collecting controller module. The SOC in-chip interconnection module comprises a signal routing module, an interruption interconnection module, a shared data address bus and a shared RAM (Random Access Memory); the MCU comprises a first sleep wake-up module, a first data acquisition module, a first data storage module and an MPU wake-up synchronization module; the MPU comprises a second dormancy awakening module, a second data acquisition module, a second data storage module and an MCU acquisition data carrying module; the invention further provides an acquisition method based on the system, the vibration signal acquisition system can be quickly awakened, and loss of signal data in the whole awakening process can be avoided.

Embodiments herein relate to systems, apparatuses, techniques, or processes for forming a bridge PCB within one or more metal layers of a main PCB. The bridge PCB, which may be manufactured using mSAP techniques, may be formed between the first and the second metal layers of the main PCB and may be used for high speed signal routing between two dies, such as a system-on-chip die and a memory die, that are on the main PCB and coupled by the bridge PCB. Other embodiments may be described and / or claimed.

The invention provides a differential pair ordered escape wiring method based on improved Monte Carlo tree search, and aims to solve the problem of path optimization of differential pair signal wiring in the design of a high-density printed circuit board. According to the method, MCTS and Q-learning reinforcement learning technologies are combined, a wiring intermediate point does not need to be preset, and a wiring path can be dynamically generated under a grid pin array and a staggered pin array. Through multiple times of simulation and backtracking, the method can effectively process complex pin arrangement and blocking areas, ensures wiring length matching and reduces electromagnetic interference. Meanwhile, according to the method, a Q table obtained through one-time Q learning can serve as the basis for simulation of all the nodes of the Monte Carlo tree, all the expansion nodes are simulated in the simulation stage, and the defect that the time of the MCTS simulation part is long is overcome. According to the method, the MCTS search capability and the convergence speed are improved by adopting a gradual widening strategy. The method is suitable for PCB design of high-performance electronic equipment, such as the fields of communication, computers and avionics.

Architectures and techniques relate to ganged and switch combined systems for filters. For example, a system can include a first filter, a second filter, and circuitry configured to receive a signal from an antenna and route the signal to the first filter and the second filter. The circuitry can be implemented in at least one of (i) a ganged configuration in which the first filter and the second filter receive the signal through a common input node or (ii) a switch-combined configuration in which two or more switch arms are configured to be controlled simultaneously to route the signal to the first filter and the second filter.

An integrated circuit structure with buried rails and backside metal is disclosed for routing input signals to and / or output signals from one or more cells of the integrated circuit structure. A port-unjoined connection with the input port and / or from the output port is enabled. Therefore, the flexibility of signal routing is enhanced.

The embodiment of the invention provides a continuous playing method and system for a multimedia data stream, a storage medium and an electronic device, and the method comprises the steps: transmitting a first data packet corresponding to the multimedia data stream to a mobile terminal when a first playing terminal plays the multimedia data stream, the mobile terminal uses the first data packet to generate a continuous playing instruction data packet required by continuous playing of a second playing terminal in the at least two playing terminals; analyzing a continuous playing instruction data packet sent by the mobile terminal to obtain a continuous playing instruction; generating a control signal according to the playing progress of the first playing terminal, cutting off a signal route of the first playing terminal by using the control signal, and obtaining a continuous playing data stream of the multimedia data stream according to the continuous playing address; and performing format conversion on the continuous playing data stream according to the playing format of the second playing terminal to obtain the target data stream, and playing the target data stream on the second playing terminal, thereby solving the problem of how to improve the continuous playing efficiency of the equipment in a multi-equipment switching playing scene in the related technology.

The present application provides a method and device for automatically generating a controller software routing information configuration file based on the Autosar architecture. By quickly identifying the routing relationships in the CAN matrix, it configures the entire frame routing relationships according to the identified routing relationships, configures the signal routing relationships according to the identified routing relationships, and finally outputs the entire frame routing relationships and signal routing relationships to the arxml file to achieve full-automatic configuration of routing information, improving the time efficiency and configuration quality of AUTOSAR configuration.

The embodiment of the invention discloses a storage method and device compatible with multiple protocols and electronic equipment, and relates to the technical field of computer storage architecture.The method comprises the steps that PCIe interface equipment is integrated on a standard board card through physical layer integration, and the standard board card is connected with a CPU through a PCIe physical layer interface; pCIe interface equipment integrated on a board card is segmented by utilizing a PCIe channel segmentation technology, so that the PCIe interface equipment independently works on the same board card and does not interfere with each other; the bandwidth is automatically allocated according to the load type, and the resource allocation between the PCIe interface devices is dynamically adjusted according to the demand of an actual application scene through an intelligent resource scheduling algorithm; a shared power management unit and a radiator are arranged, and efficient signal routing modes such as flyby topology are adopted, so that the capacity and the performance of PCIe interface equipment are expanded. The problems that in the prior art, cost is high, performance is limited, expansibility is poor, and the high-performance requirements of a high-density server and edge computing are difficult to meet are solved.

The invention discloses a reconfigurable parallel reading architecture and a parallel reading method of an image sensor. The objective of the invention is to solve the technical contradiction that the reading frame rate must be sacrificed when noise reduction or HDR is realized by using time serial processing in the prior art. The signal routing MUX is configured to be switched between at least one high-speed mode and one parallel mode. In the high-speed mode, signals of the first pixel unit and the second pixel unit are controlled to be routed to the first column reading circuit and the second column reading circuit respectively. In a parallel mode, a first pixel unit signal is controlled to be routed concurrently to the first and second column readout circuits. In a parallel mode, noise reduction may be achieved by configuring the two column readout circuits to the same gain and applying different Offsets, or by configuring the two column readout circuits to different gains to achieve HDR. According to the method, time serial processing is replaced by space parallel processing, and high speed, noise reduction and HDR functions are efficiently and flexibly realized on the premise that the frame rate is not sacrificed.

The present invention discloses a wiring method between a printed circuit board, a processor and a memory, and an electronic device. The wiring method includes the steps of: (a) allowing the data signal routing path between the processor and the memory to be first from a first signal layer to a second signal layer, and then from the second signal layer to the first signal layer, wherein a first ground layer serving as a reference layer for the first signal layer and the second signal layer is located between the first signal layer and the second signal layer, and the first signal layer and the second signal layer both have a complete projection on the first ground layer; (b) allowing the address signal routing path between the processor and the memory to be first from a fourth signal layer to the second signal layer, and then from the second signal layer to the fourth signal layer, wherein a power supply layer serving as a reference layer for the fourth signal layer is located between the second signal layer and the fourth signal layer, and the fourth signal layer has a complete projection on the power supply layer.

A device comprises a switch circuit and control lines. The switch circuit comprises a plurality of signal input / output ports, and a plurality of switch nodes, each switch node comprising a superconducting loop which comprises a plurality of Josephson junctions arranged in a ring configuration. The control lines are configured to selectively apply flux bias control signals to the switch nodes. The plurality of switch nodes is arranged to selectively configure a signal routing path between any pairwise combination of signal input / output ports of the plurality of signal input / output ports, in response to flux bias control signals selectively applied to the switch nodes.