426results about "Synchronous/start-stop systems" patented technology

The present invention relates to a duobinary signal reception device and method in which: a variable gain amplifier (VGA) amplifies a duobinary signal; a duobinary-to-non return to zero (NRZ) converter restores an NRZ signal on the basis of a differential signal of the amplified duobinary signal and a predetermined reference voltage signal; a digital regulator voltage (DRV) circuit outputs the restored NRZ signal; and the duobinary-to-NRZ converter comprises an exclusive OR (XOR) gate to which the differential signal of the amplified duobinary signal is input, and a comparator to which an output of the XOR gate and the reference voltage signal are input.

The disclosure deals with system and method for discerning the radius maximizing reliability for binary modulation on conjugate-reciprocal zeros (BMOCZ) implemented with both a maximum likelihood (ML) and direct zero-testing (DiZeT) decoder. The optimal radius for BMOCZ is disclosed to be a function of the employed decoder. The radius maximizing the minimum distance between polynomial zeros does not maximize the minimum distance of the final code. While maximizing zero separation offers an almost optimal solution for the DiZeT decoder, the ML decoder outperforms the DiZeT decoder in both additive white Gaussian noise (AWGN) and fading channels when the radius is chosen to maximize codeword separation. Different sequence-to-subcarrier mappings for BMOCZ-based orthogonal frequency division multiplexing (OFDM) are analyzed to highlight a flexible time-frequency mapping approach that avoids distortion introduced by a frequency-selective channel at the expense of higher peak-to-average power ratio (PAPR).

A fiber optic-based communications network includes: a power insertion device, connected to multiple fiber links from a data source, configured to provide power insertion to a hybrid fiber / power cable connected to at least one fiber link of the multiple fiber links; the hybrid fiber / power cable, connecting the power insertion device to a connection interface device, configured to transmit data and power from the power insertion device to the connection interface device; and the connection interface device, configured to provide an interface for connection to an end device via a power over Ethernet (POE)-compatible connection and to provide optical to electrical media conversion for data transmitted from the power insertion device to an end device via the hybrid fiber / power cable and the PoE-compatible connection.

Technology is disclosed for an optical receiver. The optical receiver may include an optical and digital signal processing (ODSP) device. The ODSP device may include a photodiode operable to convert an optical signal to an electrical signal; a digital signal processor operable to generate a digital signal based on the electrical signal; a quantization component operable to generate a quantized output signal based on the digital signal; and a processing device. The processing device may be operable to measure one or more signal statistics of the digital signal; and identify one or more quantization thresholds, wherein the one or more quantization thresholds are computed based on the one or more signal statistics.

An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

Ultra-Wideband (UWB) technology is a wireless technology supporting the transmission of large amounts of digital data over short distances using coded impulses over a wide frequency spectrum with very low power. Enhanced link performance and functionality of such UWB systems is presented exploiting multiple directive antennas for spatially filtering undesired signals and increasing signal strength whilst circuit complexity is reduced by eliminating baluns in prior art solutions. Further enhancements support payloads with flexible encoding schemes, improved channel utilization, reduced processing logic, improved robustness in correlation techniques, versatile synchronisation techniques, improved ranging, as well as providing for improved inter-symbol interference tolerance and detection.

A device may receive signaling that includes a preamble having a first subset of bits of the set of bits and a payload having a second subset of bits. In some examples, the second subset of bits may be encoded according to a Manchester encoding scheme. The second subset of bits may include fewer bits than the first subset of bits. In some examples, less than a threshold quantity of bits of the first subset of bits includes a same bit value, and each bit of the threshold quantity of bits is consecutive. The device may detect the preamble of the received signaling, and decode the payload of the received signaling including the second subset of bits (e.g., Manchester encoded subset of bits) in response to the detected preamble of the received signaling.

This specification describes methods, apparatus, and / or computer programs for selectively utilizing digital pre-distortion in a communication network. According to a first aspect of this specification, there is described a user device including means for transmitting an uplink reference signal to a network device without using digital pre-distortion; means for receiving, from a network device, an indication indicating whether digital pre-distortion is enabled or disabled for performance, by the user device, of subsequent uplink transmissions, wherein the transmitted uplink reference signal is useable for determination of the indication; and means for, when the indication indicates that digital pre-distortion is enabled for performance of subsequent uplink transmissions, performing one or more uplink transmissions using digital pre-distortion, and when the indication indicates that digital pre-distortion is disabled for performance of subsequent uplink transmissions, performing one or more uplink transmissions without using digital pre-distortion.

The embodiment of the invention discloses a communication method and a communication device, and the method comprises the steps: transmitting a lead code, the lead code comprises a start indication part, and a level state sequence corresponding to the start indication part comprises a high level and a low level; wherein the ratio of the duration of the high level to the duration of the low level is smaller than or equal to a first ratio; or, the duration of the starting indication part is the first duration, the duration of the high level is the second duration or is within a duration interval, and the duration interval is determined based on the reference duration of the high level and the adjustment duration parameter. By adopting the embodiment of the invention, through designing the start indication part in the lead code, the recognition rate of the environmental Internet of Things equipment for transmission from the reader to the environmental Internet of Things equipment (reader to device, R2D) can be improved, so that the receiving performance of the environmental Internet of Things equipment for R2D transmission can be improved.

A device may receive signaling that includes a preamble having a first subset of bits of the set of bits and a payload having a second subset of bits. In some examples, the second subset of bits may be encoded according to a Manchester encoding scheme. The second subset of bits may include fewer bits than the first subset of bits. In some examples, less than a threshold quantity of bits of the first subset of bits includes a same bit value, and each bit of the threshold quantity of bits is consecutive. The device may detect the preamble of the received signaling, and decode the payload of the received signaling including the second subset of bits (e.g., Manchester encoded subset of bits) in response to the detected preamble of the received signaling.

An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.

A pulse amplitude modulation 4-level (PAM-4) physical layer (PHY) serializer / deserializer (SerDes) receiver is provided. The receiver may include an analog-front-end (AFE) block to receive a transmit signal, an analog-to-digital converter (ADC) block to convert the transmit signal into a digital signal at sampling intervals defined by a sampling clock signal, a clock and data recovery (CDR) circuit to receive the digital signal from the ADC block and extract a recovered clock signal and a recovered data stream, the recovered data stream containing a sequence of symbols with amplitude values corresponding to four levels of PAM-4, a phase integrator (PI) to generate the sampling clock signal for the ADC block based on the recovered clock signal, and a feedforward phase correction (FFPC) block to receive the recovered data stream and generate a receive signal.

A memory controller in an integrated circuit system includes a receiver circuit that performs oversampling in time and voltage. The receiver circuit receives a data signal modulated with pulse amplitude modulation (PAM) having N signal levels from a memory module over a data lane, N > 2. The receiver circuit generates K samples by sampling the data signal at a sequence of time points in a unit time interval. The receiver circuit uses R voltage comparator blocks to generate R signal level estimates from the same sample out of the K samples. The voltage comparator blocks compare the same sample against (N-1) voltage thresholds with different offsets configured for different voltage comparator blocks. The receiver circuit identifies one of the N signal levels to which the data signal is mapped based on all signal level estimates generated from the K samples, and outputs a symbol corresponding to the identified signal level.

The invention provides a digital pre-distortion coefficient updating method and device for a frequency hopping communication system, and the method comprises the steps: obtaining a corresponding historical digital pre-distortion coefficient when the system hops to a target frequency point, and collecting training data at the initial stage of a current hop; based on the historical digital pre-distortion coefficient and the training data, obtaining an intermediate vector used for representing the change degree of the system through an adaptive filtering algorithm, and determining a change metric based on the intermediate vector; comparing the change measurement with a preset threshold value so as to divide the system state change into different levels, and dynamically triggering a matched updating mode; wherein the updating mode comprises a holding mode, a lightweight tracking mode and a precise reconstruction mode. According to the method, the system state change is divided into different levels by quantitatively evaluating the change measurement of the coefficient update vector, and the update mode which is most matched with the change is dynamically triggered, so that the global optimization of the system performance and the resource overhead is realized.

One approach may include at least partially initializing the mesh of the SE engine based at least in part on predetermined state information about the communication channel associated with the incoming data stream; and processing the incoming data stream via the MLSE engine to further initialize the mesh and decode the incoming data stream.

Examples described herein relate to an Ethernet physical layer transceiver (PHY) circuitry to generate a training signal for transmission for a lane based on a pseudorandom bit sequence (PRBS) polynomial and seed.

A method performed by a computing device formats Interval Usage Codes (IUCs) for enhancing cable service network communications between cable modems and a Cable Modem Termination System (CMTS). The method includes constructing an IUC 13 by implementing a default modulation usable by all cable modems within a communication channel, applying pre-filter to Received Modulation Error Ratio (RxMER) files to exclude files with a threshold number of sub-channels below a defined quality level, excluding FM radio frequencies from this filtering. The method identifies exception frequency zones with impaired conditions based on filtered RxMER data, assigns reduced modulation settings for these zones to ensure reliable communications, and applies a post-filter to verify an average channel bit density of at least 5 bits per Hz per symbol, excluding FM radio frequencies. The IUC 13 is then provided to the CMTS for transmission to cable modems to optimize upstream communication.

This application relates to a predistortion circuit for a wireless transmitter and a method for generating a predistorted baseband signal. Specifically, the invention discloses a predistortion circuit for a wireless transmitter, comprising a signal input configured to receive a baseband signal. Furthermore, the predistortion circuit includes a predistorter configured to generate a predistorted baseband signal using the baseband signal and a selection of a first predistorter configuration and a second predistorter configuration.

Embodiments of this application provide an encoding method, a decoding method, an encoding apparatus, and a decoding apparatus, and relate to the field of chip technologies. A method includes: obtaining a first pulse signal; encoding the first pulse signal to obtain a hidden variable; quantizing the hidden variable, and performing index encoding on a quantized hidden variable to obtain a vector index of the first pulse signal, where the vector index is used by a decoding apparatus to reconstruct the first pulse signal with reference to the hidden variable; and sending the vector index to the decoding apparatus.

A system for clock synchronization, including a quantum control processor (QCP) and digital-analog inter-converters. Each digital-analog inter-converter includes a frequency conversion module and a signal synchronization module. The signal synchronization module includes a D flip-flop (DFF). The QCP generates a signal for global synchronization (Sync_GLB) and reference clock signals (REFCLKs), and the Sync GLB and the corresponding REFCLK to the frequency conversion module, and transmits the Sync GLB to the signal synchronization module. The frequency conversion module performs frequency conversion on the REFCLK to obtain a target clock signal, generates an instruction for signal synchronization according to the signal for global synchronization, and transmits the instruction for signal synchronization and the target clock signal to the signal synchronization module. The signal synchronization module performs signal synchronization on the target clock signal via the DFF, based on the signal for global synchronization. The present disclosure further provides a method for controlling signal synchronization. The DFF relocks the signal for global synchronization to the target clock signal having a low jitter, reducing signal delay and improving precision of signal synchronization.

In an aspect, a method of coding a data stream is provided. In an aspect, the method includes mapping, by a data stream encoder, bits into one or more delimiters for the data stream while limiting a maximum run-length of a same polarity of bits in the data stream to be no more than 5. Each of the one or more delimiters include a zero bit and a one bit appended to an 8b / 10b codeword of one or more 8b / 10b codewords in the data stream. In an aspect, the method further includes transmitting, by a transmitter, the one or more delimiters in the data stream.

A transmitter according to one aspect of the present invention generates a pulse code train by encoding transmission information according to assignment of each of one or more pulse code trains to a respective codeword, and transmits the generated pulse code train. Each of the one or more pulse code trains includes four or more pulses. Each of the one or more pulse code trains is designed so that any pair of the one or more pulse code trains has a maximum of two common pulses under all possible shifts of a discrete number of time slots. This makes it possible to provide a communication technique that can be expected to improve the data rate in data communication by a large number of devices.

A communication system uses a differential edge modulation scheme having one of four or more values and a clock pulse is also encoded in each unit interval. A four-valued encoding may be as follows: prior to each unit interval, two signals are both at the same value; at the start of the unit interval, a first one of the signals is transitioned to indicate a first bit of the symbol; after a selected one of two delay periods that are less than the unit interval, the other signal is transitioned to indicate a second bit of the symbol; after this transition, both signals are again at the same value. The transitioning, at the start of the unit interval, provides an edge that may be extracted and used a timing reference.

Electronic device and operation method for an electronic device are provided. In the electronic device, a plurality of protocol data unit (PDU) blocks is generated to be transmitted on one or more lanes of a link. An advanced line encoding (ALE) frame is further generated based on an ALE scheme. The ALE scheme has an effective data rate larger than an effective data rate of 8b / 10b coding scheme, and the ALE frame includes the plurality of PDU blocks, an error detection portion corresponding to the plurality of PDU blocks, and an error correction portion corresponding to the plurality of PDU blocks and the error detection portion. The ALE frame is transmitted on the one or more lanes of the link to another electronic device.

A node for a ternary modulation communication bus system, the node comprising: a controller; a receiver configured to detect a ternary modulation state on the communication bus; and a signal driver configured to apply a ternary modulation state to a communication bus, wherein the ternary modulation state comprises one of: a first dominant state; a second dominant state; or a recessive state; wherein, during an enumeration process, the controller is configured to: receive an enumeration signal from the communication bus via the receiver; in response to the enumeration signal, control the signal driver to apply a sequence of ternary modulation states at a respective sequence of timeslots to the communication bus to represent a unique identifier of the node according to an enumeration encoding scheme, wherein the enumeration encoding scheme comprises one or more ternary encoding rules comprising: at each time slot the signal driver only applies the recessive state or a predetermined one of the first dominant state and the second dominant state specific to the time slot.

The application is a divisional application of 202610037205.X, and discloses a signal processing method, device, equipment, system, storage medium and product. A to-be-processed signal output by a target signal after passing through a nonlinear device is processed in sections to obtain a plurality of first signal regions; a preset type determination strategy is used to determine region types to which the plurality of first signal regions correspond respectively, wherein the preset type determination strategy is determined based on a steepness of a waveform shape; for each first signal region, a compensation strategy matched with a region type corresponding to the current first signal region is used to compensate a sub-signal in a corresponding region of the target signal for the current first signal region by using an ideal signal, to obtain a compensation signal corresponding to the current first signal region; and a pre-distortion signal corresponding to the ideal signal is determined according to the compensation signals corresponding to the plurality of first signal regions respectively. The application can provide an effective pre-distortion signal for a signal with complex and changeable forms.

The present invention is directed to a method for generating a bit sequence that can be transmitted efficiently and has a limited disparity and a limited run length. The proposed method makes it possible to transmit data particularly efficiently. Optimised disparity constitutes a quality feature for the ability to transmit data. A disadvantageous disparity may lead to data not being able to be transmitted correctly on a data channel since said data cannot be interpreted correctly by the receiver. Data streams are generated that are able to be read particularly efficiently and are also highly efficient with regard to overhang data. A transfer of data segments to subsymbols can be performed efficiently because it is performed in parallel. The invention is furthermore directed to a correspondingly configured system arrangement and a computer program product and a memory-readable medium containing control instructions that execute the method.

The invention provides a digital pre-distortion method and device, a storage medium and a computer program product, and the method comprises the steps: carrying out the sampling of a first signal through employing a non-uniform sampling period and a non-uniform sampling interval in the non-uniform sampling period, and obtaining a first sampling signal; determining a frequency domain signal corresponding to the first sampling signal, and determining a fitness value of the frequency domain signal; and under the condition that the fitness value of the frequency domain signal meets a preset condition, continuously performing digital pre-distortion processing by using the first sampling signal. The hardware implementation difficulty can be reduced, and aliasing is resisted.

The embodiment of the application discloses a kind of digital isolator and digital signal transmission method, the technical scheme of the embodiment of the application is by encoding circuit the rising edge and the falling edge of input digital signal are encoded into first pulse sequence and second pulse sequence respectively, by including multiple first pulse groups with time interval being first length characterizing first pulse sequence, multiple second pulse groups with time interval being second length characterizing second pulse sequence, so that more information is added in encoding signal, and the corresponding encoding information of rising edge and falling edge is transmitted through isolating element, while realizing the encoding and transmission of input digital signal, the anti-interference ability of encoding information and the anti-interference performance of digital isolator are improved.