Fire-fighting bus communication method and system and storage medium

Abstract

The invention provides a fire-fighting bus communication method and system and a storage medium, and relates to the technical field of communication, the method comprises the following steps: sending a communication instruction to a group of slaves, the communication instruction comprising a plurality of pulse digital logic bits having a preset sequence; when any pulse digital logic bit is sent, synchronously monitoring whether a response signal sent by a slave exists or not; when a target response signal sent by a target slave is monitored, a target slave address of the target slave corresponding to the pulse digital logic bit sent when the target response signal is received is obtained, and the target slave is any one slave or a plurality of slaves in the group of slaves; and performing preset emergency processing on the target slave according to the target slave address. By implementing the technical scheme provided by the invention, the technical problem that the speed of acquiring the slave address needing to be reported in an important state on the bus by the current fire-fighting bus host in a polling manner is relatively low is solved.

Description

Technical Field

[0001] This application relates to the field of communication technology, specifically to a fire protection bus communication method, system, and storage medium. Background Technology

[0002] In the field of fire safety, fire control systems need to monitor the operational status of various fire-fighting equipment in real time. Communication between the controller in the fire control room and the field fire detectors typically employs two-bus technology, using two lines to simultaneously provide power and communication, meeting the engineering requirements of long-distance cabling on-site. This communication method uses voltage transitions to send information and current feedback codes to receive information, achieving digital communication between the controller and detectors while ensuring normal power supply to all bus devices.

[0003] In existing fire protection two-bus communication systems, the controller, acting as the master, conventionally sends polling commands to each slave device in turn. The slave devices respond upon receiving a command corresponding to their address. The master device sequentially sends data frames containing start bits, frame headers, slave addresses, and command codes according to a preset communication protocol. Upon receiving a data frame, the slave device parses it and determines if it matches its own address. If a match is found, the slave device sends back a response within a specified time. This communication method ensures reliability and orderliness through strict timing control and address matching mechanisms.

[0004] However, in applications such as electrical fire monitoring, slave devices not only need to report monitoring data periodically, but may also experience abnormal states requiring emergency handling at any time. Because the existing polling mechanism requires the master to query each slave device one by one in a fixed order, there is an unpredictable time delay between detecting an anomaly and the master receiving that information. Especially when there are a large number of slave devices connected to the bus, the time required for the master to complete a full round of polling is long, and this delay may affect the system's timely response and handling of abnormal states. Summary of the Invention

[0005] To address the technical problem of slow speed in obtaining slave device addresses for important status updates on the fire bus during current fire bus master inspections, this application provides a fire bus communication method, system, and storage medium.

[0006] Firstly, this application provides a fire protection bus communication method, including: Send a communication command to a group of slave devices, the communication command including a plurality of pulse digital logic bits in a preset order, wherein the address of one slave device corresponds to one of the pulse digital logic bits; While sending any of the pulse digital logic bits, the system simultaneously monitors whether there is a response signal from the slave device; When a target response signal sent by the target slave device is detected, the target slave device address corresponding to the pulse digital logic bits sent when the target response signal is received is obtained, wherein the target slave device is any one of the slave devices in the group of slave devices; Pre-set emergency processing is performed on the target slave device based on the target slave device address.

[0007] By adopting the above technical solution, the host achieves the multiplexing of rapid inspection function using conventional communication commands. The communication command contains multiple pulse digital logic bits arranged in a preset order, with each slave address corresponding one-to-one with a pulse digital logic bit. The host simultaneously monitors the response signal when sending each pulse digital logic bit of the communication command, and the slave sends a response signal when it receives the pulse bit corresponding to its own address and an emergency event occurs. This mechanism allows the host to quickly obtain the address of any slave with an emergency status during the current inspection while performing conventional communication. Since no additional dedicated inspection commands are required, and a single communication command can detect emergency events for multiple slaves, the system's communication efficiency and emergency response speed are significantly improved. Furthermore, slaves may need to report various status information or events. It is crucial to first determine which status information or event is most important so that this solution can be used to quickly report important status information or emergency events. For less important status information or events, the slave can report them via a separate communication command after the end bit of the communication command, or the host can use the obtained slave address to prioritize pointing to that slave address in subsequent inspections, thereby quickly obtaining other relevant information for that slave address for appropriate action.

[0008] Optionally, the communication instruction includes a start bit, the plurality of pulse digital logic bits, and an end bit. The width of the start bit is used to divide the slave address, and different widths of the start bit correspond to different slave address ranges. The host sequentially sends multiple communication commands with different widths of the start bit to cover all slave addresses on the bus.

[0009] By adopting the above technical solution, the start bit in the communication command is given the function of address range division. Different widths of start bits can flexibly correspond to different ranges of slave address ranges. The master unit achieves complete coverage of all slaves on the bus by sequentially sending communication commands with different start bit widths. This area-based inspection method allows each communication command to efficiently communicate with a specific range of slaves, ensuring the system's support capacity for a large number of slaves while avoiding increased communication latency caused by excessively long single communication commands. Simultaneously, since each start bit accurately indicates its corresponding address range, the system can quickly locate the area of ​​the slave experiencing an emergency, further improving processing efficiency. This mechanism achieves an optimal balance between system capacity and response speed, providing effective assurance for rapid response in large-scale fire protection systems.

[0010] Optionally, the step of performing a preset emergency handling step on the target slave device based on the target slave device address specifically includes: Check if there is a processing flag corresponding to the target slave address, wherein the processing flag is used to indicate that the target slave has been processed; When the processing flag is not present, the target slave device is subjected to preset emergency processing, and the processing flag is set for the target slave device address.

[0011] By adopting the above technical solution, the host sets corresponding processing flags for the target slave devices. This flagging mechanism ensures that the system can accurately track the processing status of each emergency event. During subsequent inspections, the host queries the processing flags to avoid duplicate processing of the same event, effectively preventing waste of system resources. Simultaneously, this mechanism establishes a complete event processing tracking system, avoiding confusion in event processing. Through the management of processing flags, the system can maintain a clear event processing status, ensuring processing efficiency while improving the reliability and stability of system operation, providing strong support for accurate event handling.

[0012] Optionally, the step of performing a preset emergency processing step on the target slave device based on the target slave device address further includes: After the communication command is sent, a first processing communication command is sent to the target slave device first to obtain relevant data from the target slave device or to control the target slave device so that the slave device performs relevant actions.

[0013] By adopting the above technical solution, a priority processing mechanism is established after the communication command is sent. The system prioritizes sending the first processing communication command to the target slave device to obtain detailed data or issue control commands. This processing mechanism ensures an immediate response to detected emergency events after the completion of routine communication. For fire protection systems, the timeliness of emergency event handling directly affects the effectiveness of fire early warning and response. By executing the first processing communication command immediately after the completion of routine communication, the system ensures both the integrity and stability of the communication process and a rapid response to emergency events. This priority-based processing mechanism achieves efficient handling of emergency events without affecting the normal operation of the system, improving the system's emergency response capabilities and reliability.

[0014] Optionally, the method further includes: A second processing communication command is sent to the target slave device to cause the target slave device to cancel the transmission of the target response signal and delete the processing flag of the target slave device, so as to realize the processing of other new abnormal emergency states of the same level at this address.

[0015] By adopting the above technical solution, the system establishes a complete closed-loop mechanism for emergency event handling. After completing the emergency event handling, the host sends a second processing communication command to cancel the transmission of the target slave's response signal and delete the processing flag. This mechanism ensures that the system can promptly release the resources occupied by the handled emergency events. When an emergency event is properly handled, by clearing the relevant status flags, the system avoids the repeated handling of the same event and prepares for the detection and handling of new emergency events. This status clearing mechanism not only improves the system's resource utilization efficiency but also enhances the system's ability to handle multiple consecutive emergency events, ensuring that the entire fire protection system always maintains a highly efficient working state.

[0016] In a second aspect of this application, another fire bus communication method is also provided, including: The host receives a communication instruction, which includes a plurality of pulse digital logic bits in a preset order, wherein the address of a slave device corresponds to one of the pulse digital logic bits, and the target slave device is any one of the slave devices in the group of slave devices. Upon receiving the pulse digital logic bit corresponding to the target slave address and simultaneously determining that an emergency event has occurred in the target slave, a target response signal is sent to the host to instruct the host to perform preset emergency processing on the target slave based on the target slave address, wherein the target slave address is the address corresponding to the target slave.

[0017] By adopting the above technical solution, a highly efficient emergency event reporting mechanism is implemented on the slave side. The slave receives communication commands sent by the master and identifies the pulse digital logic bits corresponding to its own address. Upon the occurrence of an emergency, it immediately sends a response signal. This mechanism eliminates the need to wait for a dedicated query command from the master; the slave can proactively report emergency states during normal communication. Since each slave can accurately identify its own time window, multiple slaves can share the same frame of communication commands for status reporting, significantly improving the system's communication efficiency. This address-mapping-based communication mechanism ensures both communication reliability and rapid response to emergency events.

[0018] Optionally, the step of sending a target response signal to the master when receiving the pulse digital logic bit corresponding to the target slave address and simultaneously determining that an emergency event has occurred in the target slave specifically includes: The pulse digital logic bits are counted; When the count value corresponds to the target slave address, and the target slave has an emergency event, the target response signal is sent to the host.

[0019] By adopting the above technical solution, the slave device achieves precise timing control using a pulse counting method. The slave device counts the received pulse digital logic bits and compares the count value with its own address to ensure that an acknowledgment signal is sent at the precise time. This counting-based synchronization mechanism allows the slave device to accurately grasp the time window corresponding to its own address, avoiding communication conflicts caused by multiple slave devices sending acknowledgment signals simultaneously. At the same time, this simple and reliable counting method reduces the implementation complexity of the slave device and improves system stability. Through precise timing control, the system implements an efficient and reliable emergency event reporting mechanism.

[0020] In a third aspect of this application, a fire protection bus communication system is also provided, comprising: a master unit and a group of slave units; The host is connected to a group of slave electromechanical devices via a bus physical link; The host is used to periodically send communication instructions to the slave device. The communication instructions include multiple pulse digital logic bits in a preset order. While sending any pulse digital logic bit, the host simultaneously monitors whether there is a response signal issued by the slave device. The address of one slave device corresponds to one of the pulse digital logic bits. The target slave device is configured to receive the communication command sent by the host, wherein the target slave device is any one of the group of slave devices; it is also configured to send a target response signal to the host when it receives the pulse digital logic bit corresponding to the target slave device address and determines that there is an emergency event in the target slave device, so as to instruct the host to perform preset emergency processing on the target slave device based on the target slave device address, wherein the target slave device address is the address corresponding to the target slave device.

[0021] By adopting the above technical solution, the system achieves a highly efficient collaborative working mechanism between the master and slave devices. The master establishes an electrical connection with a group of slave devices through a physical bus link and periodically sends communication commands containing digital logic bits of preset sequence pulses. This connection method based on physical links ensures the reliability and real-time performance of communication. During system operation, the master performs synchronous monitoring while sending each pulse bit, while the slave devices can report emergency events when they receive the pulse bit corresponding to their own address. This master-slave collaborative working mechanism enables the system to quickly detect and respond to emergency events while performing regular communication, ensuring both system communication efficiency and improving the speed of emergency event handling.

[0022] Optionally, the host includes: a first microprocessor, a host transmitting circuit, and a host receiving circuit; the target slave includes: a second microprocessor, a slave transmitting circuit, and a slave receiving circuit. The output terminal of the first microprocessor is electrically connected to the host transmitting circuit, the receiving terminal of the first microprocessor is electrically connected to the host receiving circuit, the output terminal of the second microprocessor is electrically connected to the slave transmitting circuit, and the receiving terminal of the second microprocessor is electrically connected to the slave receiving circuit. The first microprocessor sends the communication command, which is a voltage pulse signal, to the slave receiving circuit through the host transmitting circuit. The second microprocessor sends the target response signal to the host receiving circuit through the slave transmitting circuit. The target response signal is a single current pulse signal. The first microprocessor receives the target response signal through the host receiving circuit; The second microprocessor receives the communication command through the slave receiving circuit.

[0023] By adopting the above technical solution, the system establishes an independent uplink and downlink communication mechanism based on voltage pulse transmission and current pulse response. The master and slave devices each employ independent transmitting and receiving circuits, controlled by a microprocessor. The master uses voltage pulse signals to send communication commands, while the slave uses single current pulse signals to send response signals. This communication mode design effectively avoids signal interference. By separating the transmitting and receiving circuits, the system achieves full-duplex communication, allowing the master to monitor the slave's response signal while sending communication commands. Furthermore, it uses a bit-based communication mode, rather than the commonly used byte-based mode. This hardware architecture not only improves communication reliability and anti-interference capabilities but also provides a reliable hardware foundation for efficient collaborative work between the master and slave devices.

[0024] In a fourth aspect of this application, a computer-readable storage medium is also provided, which stores instructions that, when executed, perform the method steps of any of the above claims. Attached Figure Description

[0025] Figure 1 This is a flowchart of a fire protection bus communication method provided in an embodiment of this application; Figure 2 This is a schematic diagram of a fire protection bus communication method provided in an embodiment of this application; Figure 3 This is a schematic diagram of a communication command waveform provided in an embodiment of this application; Figure 4 This is a schematic diagram of a digital logic waveform provided in an embodiment of this application; Figure 5 This is a flowchart of another fire protection bus communication method provided in the embodiments of this application; Figure 6 This is a schematic diagram of the structure of a fire protection bus communication system disclosed in an embodiment of this application; Figure 7 This is a schematic diagram of another fire bus communication system disclosed in an embodiment of this application.

[0026] Explanation of reference numerals in the attached diagram: 10-Master; 20-Slave; 101-First microprocessor; 102-Master transmitting circuit; 103-Master receiving circuit; 201-Second microprocessor; 202-Slave transmitting circuit; 203-Slave receiving circuit. Detailed Implementation

[0027] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0028] In the description of the embodiments of this application, the words "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design that is described as "for example" or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Rather, the use of the words "for example" or "for instance" is intended to present the relevant concepts in a specific manner.

[0029] In the description of the embodiments of this application, the term "multiple" means two or more. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0030] This application provides a fire protection bus communication method, applied to the host terminal, as shown in the reference. Figure 1 and Figure 2 , Figure 1 This is a flowchart of a fire protection bus communication method provided in an embodiment of this application. Figure 2 This is a schematic diagram of a fire bus communication method provided in an embodiment of this application. This solution is applicable to situations where the on-site host needs to periodically inspect / send data, and when an emergency occurs at the on-site terminal equipment, the data needs to be sent to the monitoring equipment as quickly as possible for critical action. The method includes: Step S101: Send a communication command to a group of slave devices. The communication command includes multiple pulse digital logic bits in a preset order, wherein the address of one slave device corresponds to one of the pulse digital logic bits, for example... Figure 2 In the diagram, the D2 pulse digital logic bit corresponds to slave device #02.

[0031] In this context, a group of slave devices refers to multiple slave devices connected to the same fire communication bus, such as smoke detectors and manual alarm buttons; a communication command is a data communication frame initiated by the master unit to achieve regular communication with a specific slave device; a pulse digital logic bit is a level signal that occupies a specific microsecond time slot and transmits information through its position in the sequence; a preset sequence means that these pulse bits are sent according to a predefined, fixed time sequence; and an address is a unique identifier assigned to each slave device in the bus network.

[0032] This step is an operation performed by the host during routine communication. Specifically, the host sends a standard communication command to the bus, which has a specific data structure, such as: start bit, frame header, slave address, command code, data, checksum, frame tail, and end bit. Although this command is specific to a particular slave, it is received by all slaves. The communication command contains multiple pulse digital logic bits arranged in a fixed order, with each pulse digital logic bit (specifically represented as a bit) corresponding to a slave address. For example, the first pulse digital logic bit corresponds to the slave with address 0, the second pulse digital logic bit corresponds to the slave with address 1, and so on. This correspondence allows each slave to identify its own time window, providing a timing basis for subsequent emergency event reporting.

[0033] Step S102: While sending any of the pulse digital logic bits, simultaneously monitor whether there is a response signal sent by the slave device.

[0034] Wherein, any pulse digital logic bit refers to any independent pulse signal unit in the communication command sequence described in S101. Optionally, in this scheme, the pulse digital logic bit is implemented by a voltage pulse. Synchronous monitoring means that the host's signal transmission operation and signal reception monitoring operation are executed in parallel in time. While the host's transmission circuit outputs a voltage pulse signal, its receiving circuit continuously detects the status of the response signal on the bus. The response signal refers to a physical signal generated on the bus by the slave when a specific condition is met. The electrical characteristics (e.g., current pulse) of this signal are different from the pulse digital logic bit (e.g., voltage pulse) sent by the host to ensure that it can be distinguished and identified.

[0035] Specifically, this step is continuously executed throughout the entire communication command transmission process in S101. It describes a communication mode that enables parallel transmission and reception operations on the same physical bus. The bus voltage is actively changed to generate pulsed digital logic bits, during which the master continuously monitors the current in the bus loop. In the normal state without acknowledgment, the bus current is the sum of the static operating currents of all devices. If a slave device generates an acknowledgment signal, the total bus current generates a detectable instantaneous increment, which the master captures. This synchronous monitoring mechanism ensures that when the master sends a pulse corresponding to a specific address, it can immediately know whether the slave device at that address has responded.

[0036] Step S103: When a target response signal sent by the target slave device is detected, the target slave device address corresponding to the pulse digital logic bit sent when the target response signal is received is obtained, wherein the target slave device is any one of the slave devices in the group of slave devices.

[0037] Here, the target slave device refers to the slave device that actually generated the emergency and sent a response signal; the target response signal refers to the specific physical signal sent by the target slave device and successfully monitored by the host in S102; the target slave device address refers to the unique digital code of the target slave device that was finally determined by the host and sent the response signal.

[0038] Specifically, this step is executed immediately after the monitoring action in S102 detects an acknowledgment signal. The core of this step lies in the immediate determination of the address. Based on the direct correspondence between the pulse timing position and the slave address established in S101, the host does not need to receive and parse data frames to obtain the address. The host tracks the sequence number of the currently transmitted pulse digital logic bits in the sequence of all pulse digital logic bits through an internal mechanism. This sequence number corresponds to a slave address. This mechanism is usually a counter synchronized with the pulse transmission. When an acknowledgment signal is detected, the host immediately reads the current value of this synchronization counter. Since the slave only responds when it receives a pulse corresponding to its address code, when the host receives the acknowledgment signal, the value of its internal counter is the sequence number of the pulse digital logic bits corresponding to the target slave. The slave address corresponding to the target slave can be found through this sequence number. For example, Figure 2 When the host sends the D2 pulse digital logic bit, the slave device corresponding to the D2 pulse digital logic bit will send a response signal if there is an emergency event that needs to be reported to the host. The host can directly query the slave address corresponding to the D2 pulse digital logic bit, which is the target slave address.

[0039] Step S104: Perform preset emergency processing on the target slave device according to the target slave device address.

[0040] Among them, preset emergency handling refers to the emergency handling process that is pre-designed and can be directly triggered for various emergency events; target slave address refers to the unique identification code of the slave that sends the response signal; emergency event refers to the abnormal situation that requires immediate response and handling, such as fire alarm, fault, etc.; preset logic refers to the combination of predefined processing steps and judgment conditions.

[0041] This step is a processing operation executed immediately after detecting an emergency response signal from the slave device. Specifically, the master device directly initiates the corresponding emergency handling procedure based on the obtained target slave device address, without waiting for the completion of regular communication commands. This processing mechanism breaks the sequential limitations of conventional communication, enabling rapid response to emergency events. The system will activate corresponding preset processing procedures based on different types of emergency events, such as automatic fire alarm and linkage control, ensuring that the system can respond to various emergency situations in a timely manner.

[0042] The following is a more detailed description of the process of the method provided in this implementation.

[0043] Optional, see reference Figure 3 , Figure 3 The diagram illustrates the communication command waveform. This solution's communication command includes a start bit, multiple pulse digital logic bits, and an end bit. The multiple pulse digital logic bits have specific data structure definitions, such as: frame header, slave address, command code, data, checksum, and frame tail. This solution gives the start bit an innovative function: defining the slave address range targeted by this inspection based on its width. During system initialization or configuration, the host predefines the mapping relationship between start bits of different widths and their corresponding slave address ranges. For example, a start bit with width T1 might correspond to the slave address range of 1-64, a start bit with width T2 corresponds to the range of 65-128, and so on. When the host needs to perform a comprehensive inspection of all slaves on the bus, it does not send an excessively long command containing pulses corresponding to all addresses, but instead executes a segmented inspection process. The host first sends a communication command with a start bit of a specific width (e.g., T1). The subsequent pulse digital logic bits of this command only correspond to the address range defined by that start bit (e.g., 1-64). When a slave device receives a communication command, it first measures the width of the start bit to determine if it belongs to the target range for this inspection. Only slave devices whose addresses are within the target range will continue counting and responding to subsequent pulse digital logic bits. After completing a communication command with a predetermined width (e.g., T1) of start bit, the master device will then send a communication command with the next predetermined width (e.g., T2) of start bit to inspect the next address range. This process continues until all preset address ranges have been inspected, thus achieving coverage of all slave devices on the bus, and repeats in this cycle.

[0044] The width of the start bit is used to represent different inspection intervals. For example, start bit widths T1, T2, T3, and T4 represent the address ranges of the responding slave devices as 0~n-1, n~2n-1, 2n~3n-1, and 3n~4n-1, respectively. For instance, if the communication command length is 6 bytes, then n=48. Different start bit widths correspond to the slave device address ranges as follows: 0~47, 48~95, 96~143, and 144~191.

[0045] The length of the communication command can be modified as needed, as can the width and number of the start bit, until it can cover all slave devices on the bus.

[0046] When using multiple start bit widths to identify the slave address range, the host sends communication commands with different start bit widths sequentially. Generally, the maximum number of bus devices in a fire protection system is 240. Using this method, a maximum of 5 communication commands are sufficient to quickly identify the slave addresses of all slave devices that need to report emergency events.

[0047] In addition, refer to Figure 4 The digital logic waveform diagram provided in this solution is shown in the figure.

[0048] When the host is in a non-transmitting state, its output port is high. In this scheme, the start bit is low and the end bit is high. In conventional communication commands, the digital logic representation of 0 and 1 typically uses high and low levels. However, for this bus, when the first bit of the first byte after the start bit is low, or the last bit of the byte before the end bit is high, the slave may not be able to distinguish whether the transmission of the start bit has ended or the transmission of the end bit has begun. To address this technical issue, refer to... Figure 3 This scheme uses the high and low level widths to represent digital logic 0 and 1, as shown in the figure. The ratio of high and low levels within one level cycle T (i.e., one pulse of digital logic bits) corresponds to different digital logic. When the high level duration is t1 and the low level duration is t2 within one level cycle T, it represents digital logic 1; when the high level duration is t2 and the low level duration is t1 within one level cycle T, it represents digital logic 0. Furthermore, whether the high level or the low level is sent first within one level cycle T is also fixed.

[0049] At the same time, this method can control the bus communication rate and ensure that the slave device can synchronize the response information during emergency response, preventing timing errors.

[0050] In digital logic, the high-level time is 180µs and the low-level time is 90µs. Therefore, it only takes 270µs to send one digital logic (pulse digital logic bit), which is equivalent to a communication rate of 3700bps. Sending one byte takes 270*8=2160µs. The start bit is set to 400µs and the end bit is set to 200µs. Then, it takes 13.56ms for the master to send a 6-byte instruction frame and 13.56ms for the slave to respond with a 6-byte data frame. Therefore, a complete communication instruction frame takes 27.12ms, which means that the master can check 36 slave addresses per second.

[0051] The aforementioned bus communication timing parameters have all been applied in practice, and can of course be adjusted according to actual needs. According to the communication protocol of this scheme, for systems with a capacity of less than 48 points, the address of a slave device that actively reports an emergency can be obtained within 40ms; for systems with a capacity of 240 points, the address of a slave device that actively reports an emergency can be obtained within 200ms, significantly improving the system response time.

[0052] Optionally, steps S10401 to S10402 are more specific solutions to step S104 in the embodiments of this application.

[0053] S10401, Query whether there is a processing flag corresponding to the target slave address, wherein the processing flag is used to indicate that the target slave has been processed; Here, query refers to the operation of data retrieval and comparison performed by the host in its internal storage space; target slave address refers to the address code of the slave that is uniquely determined in S103; processing flag is a data bit or status value that is associated with a specific slave address, and its existence or specific value is used by the system to record whether the event associated with that address has been responded to or processed; indicating that the target slave has been processed means that the flag acts as an indicator of the event processing status, used to distinguish whether the emergency event corresponding to the slave sending a response signal has been processed.

[0054] Specifically, this step is performed after the host obtains the target slave address but before any substantial emergency handling action is executed. That is, multiple responses to the same emergency event are processed only once. The host internally maintains a data structure, such as a bitmap, hash table, or array, large enough to cover all slave addresses. Each address has a corresponding storage location within this structure to store its processing flag. When the host obtains a target slave address in S103, it immediately uses that address as an index to access this data structure and read the status of the processing flag at the corresponding location. The result of this query (whether the flag exists) directly determines whether the subsequent step S10402 is executed.

[0055] S10402, when the processing flag is not present, perform emergency processing on the target slave device and set the processing flag for the target slave device address; Wherein, when there is no processing flag, it means that the query result of step S10401 is no processing flag, confirming that this is a newly occurred event that has not yet been processed; to perform emergency processing on the target slave machine, it means that the host executes a series of highest priority, preset response actions; to set the processing flag for the target slave machine address, it means that after the host completes the emergency processing, it immediately updates the event management data structure inside the host and sets the processing flag corresponding to the target slave machine address to the "processed" state.

[0056] Specifically, this step is the direct follow-up execution path to the query and judgment in S10401. This step is only triggered if a new event is confirmed (i.e., the processing flag does not exist). The execution of this step involves two closely related operations: First, performing "emergency processing". This is typically a set of operations that do not rely on bus communication between the target slave and the master, and can be implemented through other lines, such as activating the audible and visual alarms on the fire control panel, highlighting the alarm area map on the system's graphical user interface, recording the event log to non-volatile memory, and sending alarm messages to the host computer or cloud platform via the network interface. Second, immediately after the emergency processing action is initiated or completed, "setting the processing flag" is performed. The master uses the target slave address as an index to modify the data structure queried in S10401, setting the processing flag at the corresponding location to a state indicating "processed" (e.g., setting the bit from 0 to 1). This setting action is crucial. It ensures that if the host receives a response signal from the same slave device again during a subsequent inspection due to the same uncleared event, the query result of S10401 will be positive, thereby preventing S10402 from being executed repeatedly and avoiding duplicate alarms and wasted processing resources.

[0057] Furthermore, when the processing flag is present, the host will ignore the response signal sent by the target slave and will not perform any operation based on this response signal to prevent duplicate processing.

[0058] Optionally, S10403 is the solution that can be executed after step S104 in the embodiments of this application: S10403, after the communication instruction is sent, a first processing communication instruction is sent to the target slave device to obtain relevant data of the target slave device or to control the target slave device so that the slave device performs relevant actions; In this specific scheme, "completion of communication command transmission" means that the core part of a single frame of communication command—a sequence of multiple pulse digital logic bits—has been sent. The communication bus then enters the preset end time period of that frame of command. The first processing communication command indicates that after an emergency event is detected, the host sends a communication command specifically for emergency event handling. This command has a specific processing priority to achieve a rapid response to the emergency event. Relevant data refers to specific parameter information related to the emergency event, such as important monitoring data such as temperature at the fire alarm point, smoke concentration, gas concentration, equipment operating status, fault type, alarm level, and component status. Relevant actions refer to the specific operations that the slave device needs to perform, such as the linkage control actions of fire-fighting equipment, such as activating audible and visual alarms, fire linkage, automatic sprinkler activation, fire door control, smoke exhaust equipment activation, and emergency lighting control. Priority indicates that this communication command has a higher processing priority than regular communication, ensuring that the emergency event is handled in a timely manner.

[0059] This step is an emergency processing communication operation executed immediately after the completion of a regular communication command frame. Unlike preset emergency processing that doesn't require sending communication commands, this emergency processing operation involves processing communication commands, demonstrating the system's rapid response capability to emergencies. Specifically, when the host detects an emergency, it abandons the preset regular communication sequence and, after the current communication command frame is sent, prioritizes sending a dedicated processing command conforming to the regular communication command format to the target slave. This processing mechanism, by changing the communication order, ensures that detailed information about the emergency or control commands are issued to the target slave in the shortest possible time. The system's use of this interruptible communication method not only achieves rapid response and processing of emergency events but also ensures reliable control of the target slave. Furthermore, because emergency processing has a high system priority, it ensures timely handling of emergency events even under heavy system load. This mechanism, while ensuring normal system operation, also improves the real-time performance and reliability of the system in handling emergencies, which is of great significance for enhancing the overall emergency response capability of the fire protection system.

[0060] Optionally, step S10403 further includes: When multiple slave devices send response signals during the transmission of a communication instruction frame, the host determines the priority order for communication processing with the multiple slave devices that sent response signals according to preset processing rules. Furthermore, the host, according to the priority order, sequentially performs communication processing with the plurality of slave devices after the communication instruction in this frame is sent.

[0061] The preset processing rules refer to a set of logical or data tables pre-configured in the host system, which defines the criteria for determining the order in which multiple slave devices are processed when they have emergency events at the same time. The priority order is the processing sequence obtained by sorting all slave devices that have sent response signals according to the rules. The sequential communication with the multiple slave devices means that the host strictly follows the priority order and completes point-to-point communication with each slave device in the list within the time window of the end of a single communication command.

[0062] Specifically, this technical solution is a significant refinement and enhancement of the solution described in S10403, specifically designed to address complex situations where multiple emergency events occur within a single communication command. During the transmission of the pulse digital logic bits of the communication command, the host may detect response signals from multiple slave devices with different addresses. After the communication command frame is completed, the host does not randomly select one for emergency processing communication operations, nor does it simply perform emergency processing communication operations according to address size or response order. Instead, it initiates an internal priority arbitration mechanism.

[0063] The core of this mechanism is the preset processing rules. Upon entering the end-of-frame period, the host first collects all slave addresses that responded within the current frame, forming a temporary pending list. Then, the host applies the preset processing rules to this list, sorting them to generate a clear priority order. For example, the rule might define "slave addresses 1-10 (such as smoke detectors) have the highest priority, slave addresses 11-50 (such as manual alarm buttons) have the second highest priority, and the rest have normal priority." The host will rearrange the addresses in the pending list according to this rule. When a new routine inspection command is issued, the original inspection communication is paused, and inspection communication is performed sequentially according to this new priority order to obtain the relevant data information for the corresponding addresses. Once all slaves that sent response signals have completed their processing, the original inspection communication is resumed.

[0064] This solution introduces a priority mechanism to ensure that, within the limited end-of-time window, the system can prioritize the handling of the most critical and urgent events, thereby greatly improving the overall system's response efficiency and intelligence level.

[0065] Optionally, this solution may also execute step S10404, sending a second processing communication instruction to the target slave device, so that the target slave device cancels the transmission of the target response signal and deletes the processing flag of the target slave device.

[0066] The second processing communication instruction is a special communication instruction sent by the host to restore the system to normal state after the emergency event is completed. It has a specific reset function and confirmation mechanism. The processing flag is a status bit set inside the slave device to indicate that the current emergency event is being processed. This flag will affect the slave device's subsequent working mode and response method.

[0067] Specifically, this step constitutes the closed loop and reset phase of the entire event handling process. It is typically triggered after an emergency has been handled or confirmed and addressed by operators. The execution of this step is crucial; it synchronizes the master and slave devices in terms of event state and restores the system to a ready state capable of detecting new events from the slave device. The entire process involves two tightly coupled, logically synchronous operations: Slave status reset: The master encapsulates and sends a second processing communication command with a specific function, whose command code explicitly indicates "event clear" or "status reset". All slaves on the bus will receive this command, but only the slave whose address matches the target address field in the command will execute the command. Upon receiving the command, the target slave will clear its internal logic flags or status register used to trigger an acknowledgment signal. The slave then returns to a normal, non-acknowledgment silent state, waiting for the next emergency event to trigger the transmission of an acknowledgment signal.

[0068] Master state reset: In conjunction with sending interaction commands to the slave, the master must synchronously update its own internal state record. The master will access the processing flag storage structure queried in S10401 and, using the target slave address as an index, delete the corresponding processing flag or restore it to its initial state (e.g., set the bit from 1 to 0). This action allows the master to recognize a new event if it receives an acknowledgment signal from the slave again during subsequent inspections.

[0069] In addition, this application provides another fire bus communication method, applied to the target slave end, as shown in the reference. Figure 5 , Figure 5 This is a flowchart of another fire bus communication method provided in an embodiment of this application. The method includes: Step S201: Receive a communication instruction sent by the host. The communication instruction includes a plurality of pulse digital logic bits in a preset order, wherein the address of a slave device corresponds to one of the pulse digital logic bits, and the target slave device is any one of the slave devices in the group of slave devices. Step S202: Upon receiving the pulse digital logic bit corresponding to the target slave address and simultaneously determining that an emergency event has occurred in the target slave, a target response signal is sent to the host to instruct the host to perform preset emergency processing on the target slave based on the target slave address, wherein the target slave address is the address corresponding to the target slave. Among them, the communication command represents the data frame structure containing complete data information sent by the host; the preset order refers to the order in which the communication commands with pre-set data information are sent to the communication circuit according to the order of the bits; the pulse digital logic bit represents the time period unit used to transmit digital information; the target slave refers to the specific slave device that needs to respond or perform an operation; the target response signal represents the response signal sent by the slave when it detects an emergency event; emergency events include various abnormal situations with a pre-defined high priority that need to be handled immediately.

[0070] Optionally, a bit-counting method can be used: After receiving the start bit, the slave device uses a counter to count the digital logic bits of each subsequent pulse. When the count value matches its own preset address, it indicates that the current receiving position corresponds to its own address. If an emergency occurs at this time, an acknowledgment signal is immediately sent. This method achieves address identification through simple counting.

[0071] Optionally, a time-counting method can be used: after detecting the start bit, the slave device starts a timer to record the time during communication. Based on the fixed time width of each pulse's digital logic bit, the current received position is calculated by accumulating the time. When the calculated result matches the time point corresponding to its own address, and an emergency event exists, an acknowledgment signal is sent. This method reduces the complexity of data processing.

[0072] It is understandable that the various implementation methods described above can be selected and used according to the actual application scenario, and each method can effectively realize the slave device's identification of its own address location and the function of responding to emergency events. These implementation methods provide the necessary technical support for the claims.

[0073] Optionally, steps S20201 and S20202 are more specific solutions to step S202.

[0074] Step S20201: Count the pulse digital logic bits; This step describes the basic process of the slave device receiving and processing communication commands from the master device. After detecting a communication signal on the bus, the slave device first identifies the start bit information, and then continuously monitors the information of each pulse of digital logic bits throughout the entire process of the master sending communication commands. The slave device performs real-time calculations and comparisons... Figure 4The receiver determines the logic value of each bit by measuring the duration of the high and low levels within one cycle T (one pulse of digital logic bit) and temporarily stores this information in the receive buffer. Simultaneously, the slave determines whether it has reached the position corresponding to its own address based on the sequence number of the currently received pulse of digital logic bit. If the position matches and there is information requiring a response, a synchronization acknowledge signal is immediately sent.

[0075] The specific implementation process is as follows: When a signal change occurs on the bus, the slave device responds via an interrupt. Upon a falling-edge interrupt, the slave device clears and starts a low-level counter, while simultaneously stopping and reading the high-level count value. Upon a rising-edge interrupt, the slave device clears and starts a high-level counter, while simultaneously stopping and reading the low-level count value. By judging the low-level count value, the slave device can identify whether it is a start bit. If it is a start bit, the address counter is reset; if it is not a start bit and communication has not ended, the logical value of the bit is determined based on the time ratio of the high and low levels and stored in the buffer. The slave device compares the current count value with its own address. If a match is found and an acknowledgment is required, a fixed-width current pulse signal is emitted. Simultaneously, the slave device determines the address range involved in this communication based on the width of the start bit, which helps determine whether participation in this communication is necessary. After receiving the end bit, the slave device parses the complete data frame in the buffer, verifies the frame header, frame trailer, and checksum information, and decides whether subsequent data acknowledgment is required based on the command content. This receiving mechanism ensures that the slave device can accurately identify and process the master device's communication commands, while also enabling rapid response to emergencies through the synchronous response function.

[0076] The characteristics of this processing mechanism are as follows: it uses a counter to measure the high and low level times to accurately determine the digital logic; it uses a buffer to temporarily store data to ensure reliable reception of complete communication frames; it combines address counting and start bit width to intelligently determine the communication range; and it uses a synchronous response mechanism to achieve real-time response to emergency events. These features together ensure the reliability and real-time performance of the communication process, enabling the system to operate stably and efficiently.

[0077] Step S20202: When the count value corresponds to the target slave address and the target slave has an emergency event, send the target response signal to the host. Among them, the target response signal represents the current signal sent to the bus at a specific time when the slave device detects an emergency event; emergency events include various abnormal situations that require immediate handling at a high priority level, such as fire alarms, faults, and supervisory alarms; preset emergency handling refers to the pre-set handling procedures for different types of emergency events in the system; the target slave address is a unique identification code pre-assigned to each slave device in the system.

[0078] This step describes the process by which the slave device sends an acknowledgment signal under specific conditions. Specifically, during the process of receiving communication commands from the master device, the slave device will continuously check whether the currently received pulse digital logic bits correspond to its own address. When a corresponding position is found, the slave device will immediately check whether it has any events requiring urgent handling. If an urgent event does exist, the slave device will send a predefined current pulse signal to the bus within the specified bit time period. This signal will be recognized by the master device as an acknowledgment signal for the urgent event. Since the acknowledgment signal is issued at the address position corresponding to the slave device, the master device can directly obtain the address of the slave device where the urgent event occurred, thereby quickly initiating the corresponding processing procedure.

[0079] The specific execution process of this step is as follows: The slave device calculates the sequence number of the currently received bit using a high / low level counter and compares it with its stored address. When it confirms that the current bit matches its own address, the slave device immediately checks its internal status register to determine if there is an unprocessed emergency event flag. If an emergency event flag is detected, the slave device activates the output control circuit to generate a standard-width current pulse within the time range of the current bit. The duration of this pulse must be less than the period of one digital logic bit, i.e., less than... Figure 4 The "T" is used to avoid interfering with the next person's communication. Simultaneously, this emergency event flag is maintained until a processing confirmation instruction is received from the host.

[0080] This response mechanism has the following characteristics: First, it enables rapid notification of emergencies without waiting for the completion of regular communication processes; second, by sending a response signal to the corresponding address location, it ensures that the host can accurately locate the source of the event; third, the standardized design of the response signal guarantees reliable signal transmission and identification; and finally, by maintaining event flags, it ensures that emergencies are not overlooked. This mechanism plays a crucial role in improving the system's emergency response capabilities and reliability.

[0081] In practical applications, this response mechanism can also be combined with different emergency event types, transmitting different emergency event types by adjusting the characteristics of the response signal (such as pulse width and pulse amplitude). Furthermore, multiple levels of emergency event priorities can be set according to actual needs, ensuring that more important events in a single communication command frame are reported and processed first on the same slave device. This flexible design allows the system to better adapt to the needs of various application scenarios.

[0082] In addition, this application also provides a fire protection bus communication system, referenced Figure 6 The fire protection bus communication system includes: a main unit 10 and a set of slave units 20; The host 10 is electrically connected to a group of slaves 20 via a bus physical link; The host 10 is used to periodically send communication commands to the slave 20, and simultaneously monitor whether there is a response signal issued by the slave 20 while sending any of the pulse digital logic bits; The target slave device is configured to receive the communication command sent by the host 10, wherein the target slave device is any one of the slave devices in the group of slave devices 20; and is further configured to send a target response signal to the host 10 when receiving the pulse digital logic bit corresponding to the target slave device address and determining that an emergency event exists in the target slave device, so as to instruct the host 10 to perform preset emergency processing on the target slave device based on the target slave device address, wherein the target slave device address is the address corresponding to the target slave device.

[0083] Among them, the fire bus communication system refers to a complete electronic network system consisting of central control equipment and distributed equipment for fire detection, alarm and equipment linkage; the host 10 refers to the only or main equipment in the system that serves as the command and control center, responsible for initiating communication, processing information and issuing instructions; a group of slave devices 20 refers to multiple devices that play the role of end sensors or actuators in the system, such as smoke detectors, manual alarm buttons, audible and visual alarms, etc., which passively receive and respond to the instructions of the host 10; the bus physical link refers to the physical line used to carry communication signals between all devices and provide power to the slave devices 20, which is usually composed of two or more wires.

[0084] Specifically, in this architecture, the host 10 is the core processing unit of the entire system, and a group of slave devices 20 serve as the system's end devices, responsible for performing specific sensing functions (such as environmental parameter monitoring) or control functions (such as driving alarm devices). All these devices are connected to the same bus physical link, which is the shared channel for information exchange between them. It should be noted that emergency handling operations in this solution are not performed through the aforementioned bus physical link, but rather through an independent handling channel. The essence of this architecture lies in enabling a central node to effectively manage and monitor a large number of distributed nodes through a single bus, which is the fundamental physical platform upon which the communication methods and protocols of this solution are implemented.

[0085] Optional, see reference Figure 7 The host includes: a first microprocessor 101, a host transmitting circuit 102, and a host receiving circuit 103; the target slave includes: a second microprocessor 201, a slave transmitting circuit 202, and a slave receiving circuit 203. The output terminal of the first microprocessor 101 is electrically connected to the host transmitting circuit 102, and the receiving terminal of the first microprocessor 101 is electrically connected to the host receiving circuit 103. The output terminal of the second microprocessor 201 is electrically connected to the slave transmitting circuit 202, and the receiving terminal of the second microprocessor 201 is electrically connected to the slave receiving circuit 203.

[0086] The first microprocessor 101 sends a communication command to the slave receiving circuit 203 through the host transmitting circuit 102, and the communication command is a voltage pulse signal. The second microprocessor 201 sends a target response signal and an interaction command to the host receiving circuit 103 through the slave transmitting circuit 202. The target response signal is a single current pulse signal. The first microprocessor 101 receives the target response signal through the host receiving circuit 103; The second microprocessor 201 receives the communication instructions through the slave receiver circuit 203.

[0087] Wherein, the first microprocessor 101 refers to the integrated circuit chip inside the host that performs core logic operations and control tasks; the host transmitting circuit 102 refers to the line drive circuit inside the host that is responsible for converting the standard logic level signals generated by the first microprocessor 101 into electrical signals that can adapt to the transmission characteristics of the bus physical link; the host receiving circuit 103 refers to the line receiving circuit inside the host that is responsible for converting the electrical signals received from the bus physical link into standard logic level signals that the first microprocessor 101 can recognize; the target slave refers to any specific slave device in a group of slaves; the second microprocessor 201 refers to the microcontroller inside the slave that is used to process sensor data, parse host instructions, and control the slave state; the slave transmitting circuit 202 refers to the line drive circuit inside the slave; the slave receiving circuit 203 refers to the line receiving circuit inside the slave; the output terminal represents the pin on the microprocessor used to send digital signals to external circuits; the receiving terminal represents the pin on the microprocessor used to read digital signals from external circuits.

[0088] Specifically, when the host 10 sends a communication command, the command is generated by the first microprocessor 101 and sent to the host transmitting circuit 102 through its output. The host transmitting circuit 102 processes the command and sends it to the bus. When the slave receives a communication command, the command enters the slave receiving circuit 203 from the bus and is then sent to the receiving end of the second microprocessor 201 through its output. Conversely, when the slave sends an acknowledgment signal, the signal is generated by the second microprocessor 201, sent to the bus via the slave transmitting circuit 202, and then received and transmitted to the first microprocessor 101 by the host receiving circuit 103. Furthermore, unlike the response signal sent by slave device 20 to master device 10 for reporting emergency events, slave device 20 also sends a response command to master device 10 to reply to the communication command sent by master device 10. The response command is a communication command sent by slave device 20 to master device 10, and has a data frame structure with complete data information. The response command sent by slave device 20 is a current pulse signal. Specifically, when slave device 20 sends a response command, the response command is generated by the second microprocessor 201 and sent to slave transmitting circuit 202 through the output of the second microprocessor 201. After processing, slave transmitting circuit 202 sends it to the bus. When master device 10 receives the response command, the response command enters master receiving circuit 103 from the bus, is processed by master receiving circuit 103, and is sent to the receiving end of first microprocessor 101 through output.

[0089] This application also provides a computer-readable storage medium storing instructions that, when executed, perform the steps of any of the methods described above.

[0090] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0091] The above description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Other embodiments of this disclosure will be readily apparent to those skilled in the art upon consideration of the disclosure herein.

[0092] This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art that are not described in this disclosure.

Claims

1. A fire protection bus communication method, characterized in that, When applied to the host side, it includes the following steps: Send a communication command to a group of slave devices, the communication command including a plurality of pulse digital logic bits in a preset order, wherein the address of one slave device corresponds to one of the pulse digital logic bits; While sending any of the pulse digital logic bits, the system simultaneously monitors whether there is a response signal from the slave device; When a target response signal sent by the target slave device is detected, the target slave device address corresponding to the pulse digital logic bits sent when the target response signal is received is obtained, wherein the target slave device is any one of the slave devices in the group of slave devices; Pre-set emergency processing is performed on the target slave device based on the target slave device address.

2. The method according to claim 1, characterized in that, The communication command includes a start bit, the plurality of pulse digital logic bits, and an end bit. The width of the start bit is used to divide the slave address, and different widths of the start bit correspond to different slave address ranges. The host sequentially sends multiple communication commands with different widths of the start bit to cover all slave addresses on the bus.

3. The method according to claim 1, characterized in that, The step of performing a preset emergency handling on the target slave device based on the target slave device address specifically includes: Check if there is a processing flag corresponding to the target slave address, wherein the processing flag is used to indicate that the target slave has been processed; When the processing flag is not present, the target slave device is subjected to preset emergency processing, and the processing flag is set for the target slave device address.

4. The method according to claim 1, characterized in that, The step of performing a preset emergency handling step on the target slave device based on the target slave device address is followed by: After the communication command is sent, a first processing communication command is sent to the target slave device first to obtain relevant data from the target slave device or to control the target slave device so that the slave device performs relevant actions.

5. The method according to claim 4, characterized in that, The method further includes: A second processing communication command is sent to the target slave device to cause the target slave device to cancel the transmission of the target response signal and delete the processing flag of the target slave device.

6. A fire protection bus communication method, characterized in that, When applied to the target slave device, the following steps are included: The host receives a communication instruction, which includes a plurality of pulse digital logic bits in a preset order, wherein the address of a slave device corresponds to one of the pulse digital logic bits, and the target slave device is any one of the slave devices in the group of slave devices. Upon receiving the pulse digital logic bit corresponding to the target slave address and simultaneously determining that an emergency event has occurred in the target slave, a target response signal is sent to the host to instruct the host to perform preset emergency processing on the target slave based on the target slave address, wherein the target slave address is the address corresponding to the target slave.

7. The method according to claim 6, characterized in that, The step of sending a target response signal to the host when receiving the pulse digital logic bit corresponding to the target slave address and determining that an emergency event has occurred at the target slave specifically includes: The pulse digital logic bits are counted; When the count value corresponds to the target slave address, and the target slave has an emergency event, the target response signal is sent to the host.

8. A fire protection bus communication system, characterized in that, include: A master and a group of slave devices; The host is connected to a group of slave electromechanical devices via a bus physical link; The host is used to periodically send communication instructions to the slave device. The communication instructions include multiple pulse digital logic bits in a preset order. While sending any pulse digital logic bit, the host simultaneously monitors whether there is a response signal issued by the slave device. The address of one slave device corresponds to one of the pulse digital logic bits. The target slave device is configured to receive the communication command sent by the host, wherein the target slave device is any one of the group of slave devices; it is also configured to send a target response signal to the host when it receives the pulse digital logic bit corresponding to the target slave device address and determines that there is an emergency event in the target slave device, so as to instruct the host to perform preset emergency processing on the target slave device based on the target slave device address, wherein the target slave device address is the address corresponding to the target slave device.

9. The system according to claim 8, characterized in that, The host includes: a first microprocessor, a host transmitting circuit, and a host receiving circuit; the target slave includes: a second microprocessor, a slave transmitting circuit, and a slave receiving circuit. The output terminal of the first microprocessor is electrically connected to the host transmitting circuit, the receiving terminal of the first microprocessor is electrically connected to the host receiving circuit, the output terminal of the second microprocessor is electrically connected to the slave transmitting circuit, and the receiving terminal of the second microprocessor is electrically connected to the slave receiving circuit. The first microprocessor sends the communication command, which is a voltage pulse signal, to the slave receiving circuit through the host transmitting circuit. The second microprocessor sends the target response signal to the host receiving circuit through the slave transmitting circuit. The target response signal is a single current pulse signal. The first microprocessor receives the target response signal through the host receiving circuit; The second microprocessor receives the communication command through the slave receiving circuit.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed, perform the method as described in any one of claims 1-5 or 6-7.

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