73 results about "Data transmission circuit" patented technology

The invention provides a UCIe standard protocol layer data transmission circuit, a related method and a chip, and the circuit comprises a slicing circuit which is configured to segment a data packet from a service port; sending the slice frame and slice description information associated with the slice frame to a framing device; the framing device is configured to fill a flow control unit Flit with the slice frames from the slice devices and slice description information associated with the slice frames, and send the Flit to the deframing device; the frame deframer is configured to determine slice frames belonging to the same service port from the Flit, and send the slice frames and slice description information associated with the slice frames to a packing circuit corresponding to the service port; and the packing circuit is configured to splice the data slices belonging to the same data packet in the slice frame based on the slice description information and output the data packet. The technical problem that extra delay is introduced due to beat insertion due to the fact that large multiplexers need to be introduced in existing protocol layer data transmission of the UCIe standard is solved.

The utility model discloses a multi-parameter laser photoelectric signal intelligent grading early warning device, which comprises a monitoring module provided with a laser power monitoring circuit, a wavelength monitoring circuit and a light spot quality monitoring circuit, a data acquisition and transmission module provided with a data acquisition circuit and a data transmission circuit, and a data processing module, the system is provided with a core processor circuit and a storage circuit, the grading early warning module is provided with a sound-light alarm circuit and a communication alarm circuit, and the user interaction module is provided with a display interface circuit and an operation control circuit. Therefore, multi-parameter monitoring, intelligent grading early warning and efficient data processing and interaction can be realized, the running state of the laser system can be comprehensively reflected, timely and accurate early warning can be realized, the monitoring efficiency is improved, the operation complexity is reduced, and safe and stable running of laser equipment is guaranteed.

The utility model provides a multi-interface charging test mainboard, which is applied to the field of charging test, and comprises a memory slot, a plurality of charging ports and a plurality of charging ports, the CPU slot is connected with the plurality of memory slots; a PCH chip, wherein the PCH chip is connected with the CPU slot; a Super I / O chip, wherein the Super I / O chip is connected with the PCH chip; the charging test circuit comprises a plurality of test interfaces, the input end of the charging test circuit is connected with the output end of the Super I / O chip, and the output end of the charging test circuit is connected with the PCH chip; the first input end of the data transmission circuit is connected with the PCH chip, the second input end of the data transmission circuit is connected with the output end of the Super I / O chip, and the output end of the data transmission circuit is connected with each test interface. The utility model aims to achieve the purpose of testing a plurality of USB PD devices in parallel.

The present disclosure relates to the field of semiconductor, and provides a memory for reducing power consumption of the memory without increasing memory area. The memory comprises a memory array, a data transmission circuit and a peripheral circuit; the data transmission circuit is arranged between the memory array and the peripheral circuit for data transmission between the memory array and the peripheral circuit; wherein the data transmission circuit comprises a first data path and a second data path in a data transmission direction; a power supply end of the first data path is electrically connected to a first transmission line, and a ground end is electrically connected to a second transmission line; a power supply end of the second data path is electrically connected to the second transmission line, and a ground end is electrically connected to a third transmission line; wherein the first transmission line transmits a first power supply voltage, the second transmission line transmits a second power supply voltage, the third transmission line is electrically connected to a common ground end, and the voltage value of the first power supply voltage is greater than the voltage value of the second power supply voltage.

The invention provides a data transmission circuit, a data receiving end, a data transmission method and a display device, belongs to the field of communication protocols, aims to improve the transmission efficiency of the data transmission circuit, is connected between a sending end and the receiving end, and comprises at least one pair of data lines configured to transmit electric signals corresponding to display data to be sent by the sending end; a pair of clock lines configured to provide a synchronous clock signal for an electrical signal transmitted on the data line; the first current flow direction sensor is connected between two data lines in the pair of data lines, is suitable for being connected with a receiving end, and is configured to provide a first current flow direction between the electric signals on the pair of data lines for the receiving end; and the second current flow direction sensor is connected between the at least one pair of data lines and one clock line in the pair of clock lines, is suitable for being connected with a receiving end, and is configured to provide a second current flow direction between the electric signals transmitted on the pair of data lines and one clock line for the receiving end.

The invention discloses an anti-radiation data transmission circuit, device and system, the anti-radiation data transmission circuit comprises a crystal oscillator oscillation starting circuit and a data transmission link, and the crystal oscillator oscillation starting circuit and the data transmission link are structurally enhanced by adopting an annular gate reinforcement technology; the crystal oscillator oscillation starting circuit comprises an external signal branch and an external crystal oscillator branch which are mutually backed up; and the data transmission link is used for converting the basic frequency signal output by the external signal branch or the external crystal oscillator branch into high-speed serial data and sending the high-speed serial data to the off-chip receiving module. According to the application, firstly, a redundant data source, namely an external signal branch and an external crystal oscillator branch which are mutually backed up, is provided, so that the data transmission reliability is improved, and meanwhile, the data reinforcement based on the annular gate is carried out on the first receiving module and the data transmission link, so that the reliability of data transmission is improved. And a high-stability data transmission link is constructed in combination with an external crystal oscillator with anti-radiation capability, so that the anti-radiation capability of the whole data transmission circuit is improved.

The utility model provides a non-contact data transmission circuit for a CT (Computed Tomography) machine, which comprises an optical signal-to-electric signal circuit, a radio-frequency signal transmitting circuit, a radio-frequency signal receiving circuit and an electric signal-to-optical signal circuit, and the input end of the optical signal-to-electric signal circuit can receive optical signals output by an optical signal output module of the CT machine. The output end of the optical signal-to-electric signal circuit is connected with the input end of the radio frequency signal transmitting circuit, the output end of the radio frequency signal transmitting circuit is in wireless communication connection with the input end of the radio frequency signal receiving circuit, and the output end of the radio frequency signal receiving circuit is connected with the input end of the electric signal-to-optical signal circuit. And the output end of the electric signal-to-optical signal circuit can be connected with the input end of a computer optical signal receiving module. The CT machine has the advantages that high-speed data transmission of the CT machine can be achieved, and optical signals are not prone to external interference.

The utility model relates to the technical field of motorcycle instruments, and particularly discloses a multifunctional motorcycle instrument panel which comprises an instrument panel shell, a display screen is installed on the instrument panel shell, and a PCB electrically connected with the display screen is arranged in the instrument panel shell. The PCB comprises a main control circuit, a power supply step-down circuit, a remote control receiving circuit, an audio power amplifier circuit, a key control circuit and a data transmission circuit, and the power supply step-down circuit, the remote control receiving circuit, the audio power amplifier circuit, the key control circuit and the data transmission circuit are all electrically connected with the main control circuit. The remote control receiving circuit is matched with the master control circuit to receive audio signals, and the audio signals are output after being amplified by the audio power amplifier circuit, so that the functions of playing music, a radio and the like are realized, the functions are diversified, the practicability is high, and the use requirements of users can be met.

The application discloses a kind of in-furnace temperature measuring device, temperature measuring method and computer readable storage medium, in-furnace temperature measuring device includes tray, connecting structure, power supply structure and multiple test batteries, each test battery is provided with multiple temperature measuring probes;Cavity is used to place test battery;Connecting structure includes temperature measuring instrument, temperature measuring instrument is connected with tray, temperature measuring instrument includes wireless receiving end and temperature measuring channel connected with temperature measuring probe, wireless transmitting end is connected with external device, external device is provided with wireless receiving end, wireless receiving end is matched with wireless transmitting end to switch on data transmission circuit, and data transmission circuit is used to transmit the temperature information of test battery;Power supply structure is connected with tray, and power supply structure is electrically connected with temperature measuring instrument.The application is switched on data transmission circuit by temperature measuring probe, wireless transmitting end and wireless receiving end cooperation, realizes the cavity station in single body furnace to carry out furnace temperature temperature test, avoids the installation wiring difficulty caused by wiring mode transmission data and so on.

The invention relates to the field of semiconductors, provides a memory, and aims to reduce the power consumption of the memory on the premise of not increasing the area of the memory. The memory comprises a memory array, a data transmission circuit and a peripheral circuit, the data transmission circuit is arranged between the storage array and the peripheral circuit and is used for data transmission between the storage array and the peripheral circuit; the data transmission circuit comprises a first data path and a second data path in the data transmission direction. The power end of the first data path is electrically connected with the first transmission line, and the grounding end is electrically connected with the second transmission line; the power end of the second data path is electrically connected with the second transmission line, and the grounding end is electrically connected with the third transmission line; wherein the first transmission line transmits a first power supply voltage, the second transmission line transmits a second power supply voltage, the third transmission line is electrically connected with the common grounding end, and the voltage value of the first power supply voltage is larger than that of the second power supply voltage.

The application provides a data transmission circuit and method based on signal conversion, a chip and an electronic device, and belongs to the field of circuits.The data transmission circuit based on signal conversion comprises a first conversion module and a second conversion module.The first conversion module is used for receiving a parallel signal from a first clock domain and converting the parallel signal into a serial signal of a second clock domain, wherein the frequency of the first clock domain is less than the frequency of the second clock domain.The second conversion module is used for receiving the serial signal and converting the serial signal into the parallel signal.The scheme realizes the transmission of the parallel signal from the first conversion module to the second conversion module within a first clock cycle.By applying the data transmission circuit based on signal conversion to transmit signals between FPGAs, a large number of signals can be transmitted from one FPGA to another FPGA within a clock cycle, thereby reducing the difficulty of circuit design and timing convergence.

Provided are a data transmission circuit system and a data reception circuit system, which use an edge of a pulse signal. The data transmission circuit system modulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a clock pulse signal, and rising edges and falling edges of a data pulse signal. The data reception circuit system demodulates a digital signal by using time levels determined based on time differences between rising edges and falling edges of a recovered clock pulse signal, and rising edges and falling edges of a data pulse signal.

The application provides a UCIe standard protocol layer data transmission circuit, a related method and a chip. The circuit comprises: a slicing circuit configured to split data packets from a service port; a framing device configured to send a slice frame and slice description information associated with the slice frame to a framing device; the framing device is configured to fill the slice frame and the slice description information associated with each slice frame from each slicer into a flow control unit Flit, and send the Flit to a deframer; the deframer is configured to determine the slice frame belonging to the same service port from the Flit, and send the slice frame and the slice description information associated with the slice frame to the packet assembly circuit corresponding to the service port; the packet assembly circuit is configured to splice and output the data packets in the slice frame based on the slice description information. The existing UCIe standard protocol layer data transmission needs to introduce a large multiplexer, which causes a technical problem of inserting a snapshot and introducing additional delay.

A touch microcontroller unit including a touch data acquisition circuit to acquire touch data of a first area and a second area of a first panel. The touch microcontroller unit including an area division boundary calculation circuit to calculate a boundary in the first panel to divide the first area and the second area. The touch microcontroller unit including a touch coordinate calculation circuit to calculate touch coordinates of the first area based on the touch data of the first area. The touch microcontroller unit including a touch data transmission circuit to transmit the touch coordinates of the first area and the touch data of the second area to another touch microcontroller unit.

The utility model discloses an on-chain identity identification label device for bicycle traceability. The on-chain identity identification tag device comprises a main controller embedded in a bicycle body, a near field communication (NFC) chip, an anti-disassembly detection circuit, a data transmission circuit, a power management module, a sensor combination, a crystal oscillator, an analog-to-digital converter, a display screen and a two-dimensional code display layer, wherein the main controller is respectively connected with the NFC communication chip, the anti-tamper detection circuit, the data transmission circuit, the power management module, the sensor combination, the crystal oscillator, the analog-to-digital converter, the display screen and the two-dimensional code display layer, and the NFC communication chip is respectively connected with the anti-tamper detection circuit, the sensor combination, the crystal oscillator and the data transmission circuit. And the sensor combination is respectively connected with the data transmission circuit and the analog-to-digital converter. According to the utility model, the tamper-proof detection of the bicycle label is realized, and the integrated target of tamper-proof and hardware binding is realized on the physical structure.

Techniques are described for efficiently and reliably managing machine check exceptions. For example, one embodiment of a processor comprises: a plurality of cores to execute instructions; a plurality of machine check architecture (MCA) banks coupled to the plurality of cores, each MCA bank comprising a plurality of MCA registers to store machine check data (MCD); MCD transmission circuitry to transmit a packet to an error monitoring server, the MCD transmission circuitry to generate a header of the packet using header information stored in one or more packet configuration registers and to generate a payload of the packet using at least a portion of the MCD stored in one or more of the MCA registers.

A data transmission circuit and method, a core, a multi-core chip, an electronic device, and a storage medium are disclosed. The data transmission circuit includes a receiving unit, a control unit, a lookup table unit, and a selection unit. The receiving unit receives original data packets from Fabric. The control unit determines whether the original data packet needs relaying based on an original control bit. In response to the need for relaying, the control unit activates a first input terminal of the selection unit, which then sends a new data packet to Fabric via the first input terminal. The new data packet includes the original data and a new header obtained by the lookup table unit based on the original index. This data transmission circuit effectively reduces power consumption during data transmission between multiple cores.

A data transmission circuit is improved to support a data transmission mode suitable for an interface or an application according to selection of an option. The data transmission circuit includes a pre-driver configured to output a first differential drive signal, a second differential drive signal, and a pre-emphasis control signal by using a first differential data signal, a second differential data signal, and an option signal; a main driver configured to output a first differential transmission signal and a second differential transmission signal by using the first differential drive signal and the second differential drive signal; and a pre-emphasis driver configured to perform pre-emphasis of different amplification degrees on the first differential transmission signal and the second differential transmission signal in a first mode and a second mode by the pre-emphasis control signal.

A regenerative limiting circuit for potentially explosive areas, for supplying energy to a sensor and for data communication with a sensor, has an input unit, a first limiting unit, a second limiting unit, a monitoring unit, a high-voltage unit, a node unit, and a reference potential. The input unit has first and second data line connections, a supply line connection, and a zero line connection, each for connecting a connection cable. The first limiting unit is connected to the first data line connection, the second limiting unit is connected to the second data line connection and has a resistor and a Zener diode, wherein the Zener diode connects through to the reference potential in each case in the event of an overvoltage. The monitoring unit is connected to the first limiting unit and the second limiting unit, and is suitable for evaluating data.

The invention discloses a wireless charging system. Relates to the wireless energy and signal simultaneous transmission field, and comprises an energy transmission circuit comprising an energy transmitting circuit, a coupler and an energy receiving circuit, the coupler comprises an energy transmitting coil and an energy receiving coil, the energy transmitting coil is used for coupling electromagnetic energy received from the energy transmitting circuit to the energy receiving coil, and the energy receiving coil is used for receiving the electromagnetic energy; the energy receiving coil is used for transmitting the electromagnetic energy to the energy receiving circuit, and the energy receiving circuit is used for wirelessly charging target equipment according to the electromagnetic energy; the data transmission circuit comprises a data transmitting circuit, a coupler and a data receiving circuit, the coupler further comprises a data transmitting coil and a data receiving coil, the data transmitting coil is used for coupling data signals received from the data transmitting circuit to the data receiving coil, and the data receiving coil is used for transmitting the data signals to the data receiving circuit. The data receiving circuit is used for determining the charging state of the target equipment according to the data signal.

A network interface controller (NIC) circuit may control data transfers between a network interface and a memory interface circuit. The NIC circuit receives data packets on the network interface and determines whether a packet type of a data packet corresponds to one of a first plurality of operations or a second plurality of operations. For data packets that correspond to one of the first plurality of operations, the NIC circuit controls the memory interface circuit according to the packet type and for data packets that correspond to one of the second plurality of operations, the NIC sends a notification to a processor circuit in the IC to execute software instructions to control the memory interface circuit according to the packet type. The NIC circuit quickly processes data packets corresponding to the first plurality of operations without software involvement but relies on software assistance for the second plurality of operations.

The application relates to the field of data transmission circuits and discloses a circuit with switchable input and output ports, which comprises a first data port and a second data port, an enable control signal generation module, when input data signals exist in the first data port, the level state of the second enable control signal is switched, and the level state of the first enable control signal remains unchanged; when input data signals exist in the second data port, the level state of the first enable control signal is switched, and the level state of the second enable control signal remains unchanged. The enable control signal generation module monitors the signal states of the two data ports in real time, automatically identifies the data input direction, and dynamically switches the corresponding enable control signal, so as to control the transmission direction of the data channel. The intelligent switching of the input and output functions is realized, and the defects of the fixed port function and the insufficient flexibility of the traditional bidirectional transmission circuit are overcome.

This application provides a serial port reading circuit for fuel dispenser tax reporting, comprising: a conversion chip, a data transmission circuit, a decryption card, and a CPU chip. The input terminal of the conversion chip is electrically connected to the fuel dispenser's tax reporting serial port via a data reading interface. The output terminal of the conversion chip is electrically connected to the first input terminal of the CPU chip via the data transmission circuit to transmit the read fuel data to the CPU chip. The second output terminal of the CPU chip is electrically connected to the input terminal of the decryption card, and the output terminal of the decryption card is electrically connected to the second input terminal of the CPU chip. The first output terminal of the CPU chip is electrically connected to an upload chip via the data transmission circuit to send the decrypted fuel data to the tax system via the upload chip. This application allows direct reading of fuel dispenser data via a data reading interface that connects directly to the fuel dispenser's tax reporting serial port, eliminating the need for manual data collection using a handheld fuel dispenser data collector and effectively improving the efficiency of fuel dispenser data reading.

The invention relates to a data transmission circuit, a chip, a data transmission method, a medium and a program product. The data transmission circuit comprises a first-stage trigger used for outputting data to a second-stage trigger module under the control of a clock signal output by a clock source; the second-stage trigger module comprises N + 1 second triggers, the updating cycle of output data of each second trigger is the clock cycle of N + 1 clock sources, and the triggered clock cycles of the second triggers are different; n + 1 is a natural number greater than or equal to 1; the third-stage trigger module comprises a data selector and a third trigger which are connected, and the data selector is used for selecting one path of data from the multiple paths of data output by the second-stage trigger module in each clock period of the clock source and outputting the selected path of data to the third trigger; and the third trigger is used for outputting data output by the data selector. According to the data transmission circuit, the path length is reduced, so that the path delay is reduced.

The utility model discloses a high-speed optical fiber longitudinal differential protection data transmission circuit, which belongs to the technical field of power system relay protection and comprises an optical fiber longitudinal differential protection MCU (microprogrammed control unit), an optical module, an Ethernet MAC (media access control) layer and an Ethernet physical layer, the Ethernet MAC layer and the Ethernet physical layer are connected with each other, and the optical fiber longitudinal differential protection MCU is in communication connection with a user-defined data protocol processor. The optical fiber longitudinal differential protection MCU is connected with the Ethernet MAC layer, and the Ethernet physical layer is connected with the optical module. The optical fiber longitudinal differential protection device has the advantages of being simple in circuit and high in transmission rate, has the advantages of being low in cost, high in communication rate, simple in circuit, easy to configure and the like, can improve the reliability of a longitudinal differential protection program, and guarantees the real-time performance of optical fiber longitudinal differential data transmission.

The invention discloses a data transmission method, a sending and receiving end controller and a data transmission circuit. The data transmission method comprises the following steps: acquiring a value to be transmitted; performing operation processing on the to-be-transmitted numerical value by adopting a preset mapping relation to obtain a signal characteristic parameter; performing signal modulation by using the signal characteristic parameter to obtain a transmission pulse signal; and sending the transmission pulse signal to a receiving end controller, so that the receiving end controller demodulates the transmission pulse signal to obtain a value to be transmitted. According to the data transmission method, the numerical value to be transmitted is transmitted in the form of the digital pulse signal, so that the real-time performance of data transmission can be effectively improved, the requirements of two sets of controllers for a control algorithm can be met, the logic is simple, and engineering implementation is easy.

The application relates to a data transmission circuit, a method and a storage device. A comparison module is used for comparing bus data on a data bus and global data on a global data line, and outputting a comparison result of whether the number of bits of the bus data different from the global data exceeds a preset threshold; a first data conversion module is used for providing the bus data after inversion to a data bus buffer module in the case that the comparison result exceeds the preset threshold, and providing the bus data to the data bus buffer module in the case that the comparison result does not exceed the preset threshold; the data bus buffer module is used for generating a data polarity identification signal according to the comparison result, and transmitting the bus data or the data after inversion of the bus data to the global data line; and a write circuit module is used for transmitting the global data on the global data line or the data after inversion to a local data line according to the data polarity identification signal. The application effectively reduces the power consumption of the write data in the process of writing the write data into a storage unit array via the data bus.

The invention relates to a material tower monitoring circuit and a monitoring method, the material tower monitoring circuit is arranged in a holder in a material tower feed port area and interacts with a background server, and a scanning track is generated to drive a laser ranging module of the holder to obtain volume measurement data in a material tower; the material tower monitoring circuit comprises a data acquisition circuit, a data transmission circuit, a master control cooperation circuit and a power supply management circuit. The data acquisition circuit comprises a power supply anti-interference circuit and a signal anti-interference circuit; the power supply anti-interference circuit is located between the power supply and the laser ranging module and used for processing surge and frequency noise caused by electromagnetic interference in the material tower. The signal anti-interference circuit is located between the power supply and a serial port communication line of the laser ranging module so that signals of the laser ranging module can be stable. According to the material tower monitoring circuit, the defect that stable transmission cannot be achieved under strong electromagnetic environment interference in the prior art is overcome, meanwhile, non-contact measurement of materials in the material tower is achieved, and the measurement accuracy is improved.

This application discloses a data transmission circuit, a data transmission method, and an electronic device. The data transmission circuit includes a storage chip, a data transit chip, and a data processing chip. The storage chip, the data transit chip, and the data processing chip are sequentially connected in series. The data transit chip is configured to read a first data packet with a first preset quantity of bits from the storage chip, process the first data packet into a plurality of second data packets each with a second preset quantity of bits, and send the second data packets to the data processing chip. A maximum quantity of bits of a data packet that the data processing chip is able to read at a time is a third preset quantity of bits.

A network interface controller (NIC) circuit may control data transfers between a network interface and a memory interface circuit. The NIC circuit receives data packets on the network interface and determines whether a packet type of a data packet corresponds to one of a first plurality of operations or a second plurality of operations. For data packets that correspond to one of the first plurality of operations, the NIC circuit controls the memory interface circuit according to the packet type and for data packets that correspond to one of the second plurality of operations, the NIC sends a notification to a processor circuit in the IC to execute software instructions to control the memory interface circuit according to the packet type. The NIC circuit quickly processes data packets corresponding to the first plurality of operations without software involvement but relies on software assistance for the second plurality of operations.