580 results about "Loop gain" patented technology

A control circuit controlling output current at the primary side of a power converter is provided. A waveform detector generates a current-waveform signal. A discharge-time detector detects a discharge-time of a secondary side switching current. An oscillator generates an oscillation signal for determining the switching frequency of the switching signal. An integrator generates an integrated signal by integrating an average current signal with the discharge-time. The average current signal is generated in response to the current-waveform signal. The time constant of the integrator is correlated with the switching period of the switching signal, therefore the integrated signal is proportional to the output current. An error amplifier amplifies the integrated signal and provides a loop gain for output current control. A comparator controls the pulse width of the switching signal in reference to the output of the error amplifier. Therefore, the output current of the power converter can be regulated.

A phase locked loop, PLL, is described with multiple parallel charge pumps that are selectively disabled as phase lock is approached. A lock detection circuit is described that enabled reference currents to be fed to the parallel charge pumps. The error signal from a phase detector is arranged as UP and a DOWN signals that are averaged in the lock detector. When the average error is large, all the reference currents feed the charge pumps that provide a high loop gain to reduce the lock time. As the lock becomes closer selective reference currents are disabled to reduce loop gain so that a smooth transition to lock is made. Selectively switching currents into a low pass filter that usually follows a charge pump in a PLL circuit automatically reduces switching noise by the operation of the low pass filter.

A power converter including a hardware efficient control loop architecture. Error detection circuitry may generate an error signal based on the difference between a power converter output voltage and a reference voltage. An oversampling ADC may digitize the error signal. The transfer function associated with the ADC may include quantization levels spaced at non-uniform intervals away from a center code. A digital filter may calculate the average of the digitized error signal. A nonlinear requantizer may reduce the number of codes corresponding to the output of the digital filter. A proportional integral derivative (PID) unit may multiply the output of the nonlinear requantizer by PID coefficients to generate a PID duty cycle command, and a gain compensation unit may dynamically adjust the PID coefficients to maintain a constant control loop gain. A noise-shaped truncation unit including a multi-level error-feedback delta sigma modulator may reduce the resolution of the PID duty cycle command.

A system and method for controlling a mass flow controller to have a constant control loop gain under a variety of different types of fluids and operating conditions, and for configuring the mass flow controller for operation with a fluid and / or operating conditions different from that used during a production of the mass flow controller. Further, the system and method includes providing control by reducing the effects of hysteresis in solenoid actuated devices by providing a non-operational signal to the solenoid actuated device.

A circuit and method for controlling a switching regulator utilize a combination of variable off-time control (or frequency control) and variable peak current control to achieve high efficiency at a wide range of load conditions. A non-linear control circuit receives an error voltage and generates a first control signal for controlling a frequency control circuit and a second control signal for controlling a peak current control circuit. The frequency control circuit and the peak current control circuit operate in conjunction over the entire range of load conditions with the frequency control dominates at light load (or low power) conditions and the variable peak current control dominates at moderate to heavy load (or high power) conditions. The switching regulator transitions smoothly between frequency control and peak current control with continous loop gain throughout the transition region.

A system for reducing central sleep apnea (CSA) is described in which certain methods of increasing a patient's rebreathing during periods of the sleep cycle are used. By increasing rebreathing during periods of overbreathing, the over-oxygenation which typically results from the overbreathing period can be reduced, thus reducing the compensating underbreathing period and effectively reducing the loop gain associated with the central sleep apnea. Nasal occlusion and a leak resistant oral interface provide control for gas leaks from a patent interface.

A weather radar system is coupled to antenna. The weather radar system includes a processor for generating pulses and for processing return pulses received by the antenna. The processor generates high resolution data from the return pulses. The processor uses the high resolution data to perform high resolution radar analysis including removal of point and / or point-like target returns and reassembles the high resolution data to perform high gain radar analysis at lower resolutions.

A method and apparatus are disclosed for reducing traffic flow instabilities and increasing vehicle throughput by monitoring the distances and velocities of motor vehicles leading and following a center vehicle and controlling the velocities of the vehicles to maintain a steady relative distance between the center vehicle and the leading and following vehicles. Using distance and speed information derived from both leading and following vehicles reduces the loop gain of feedback needed below one (1) and diminishes traffic instabilities caused by “car following.”

A method and apparatus are disclosed for reducing traffic flow instabilities and increasing vehicle throughput by monitoring the distances and velocities of motor vehicles leading and following a center vehicle and controlling the velocities of the vehicles to maintain a steady relative distance between the center vehicle and the leading and following vehicles. Using distance and speed information derived from both leading and following vehicles reduces the loop gain of feedback needed below one (1) and diminishes traffic instabilities caused by “car following.”

The present invention discloses an LDO (Low DropOut) linear voltage regulator, which is based on an NMC (Nested Miller Compensation) architecture and can be capacitor-free, wherein an active resistor is added to the feedback path of the Miller compensation capacitor to increase the controllability of the damping factor, solve the problem of extensively using the output capacitor with a parasitic resistance, and solve the problem that a compromise must be made between the damping factor control and the system loop gain. Further, the present invention utilizes a capacitor-sharing technique to reduce the Miller capacitance required by the entire system and accelerate the stabilization of output voltage without influencing stability.

A translinear amplifier is disclosed. A loop amplifier drives the bases of the input and output transistor pairs from the differential collector voltage of the input pair. The loop amplifier contains a third differential pair (a gain pair). The tail current of the gain pair is inversely related to the tail current of the input pair, such that loop amplifier gain remains stable when the transconductance of the input pair changes (due, e.g., to input gain changes). In one embodiment, a linear-in-dB interface is provided that adjusts input pair tail current exponentially (and gain pair tail current exponentially and inversely) to linear voltage changes at a gain input.

A method and apparatus for providing ventilatory assistance to a spontaneously breathing patient An error signal (56) is computed that is the difference between a function of respiratory airflow (54) over a period of time and a target value (52). Using a servo loop, air is delivered to the patient at a pressure that is a function of the error signal, the phase of the current breathing cycle, and a loop gain that varies depending on the magnitude of the error signal. The loop gain increases with the magnitude of the error signal, and the gain is greater for error signals below a ventilation target than for error signals above the ventilation target value. The target value (52) is an alveolar ventilation that takes into account the patient's physiologic dead space.

A black clamp circuit for an image sensor utilizes a differential programmable gain amplifier and a feed-back loop to adjust a black level based on comparison to a reference black level. The gain (and therefore step size and range) of the feed-back loop constant for all programmable gain amplifier gain settings. The gain of the fee-back loop is kept constant by adjusting the values of programmable capacitors in the circuit.

A polar-loop wireless communication apparatus includes, on a forward path between an amplitude detector and a power amplifier which constitute an amplitude control loop, a variable gain amplifier and a switch to change characteristics of a loop filter to output a frequency bandwidth of the amplitude control loop to an order less than an order for normal operation. The system is operated with the characteristics set to the lower order to measure outputs from the power amplifier to calibrate the output power of the power transmitter, and the register is operated with the characteristics set to the higher order to measure the open loop gain of the amplitude control. According to results of the calculation, data to correct gain characteristics of the variable gain amplifier with respect to an output control signal is stored in a nonvolatile memory of a baseband circuit.

There is provided a capacitive load driving circuit which applies a driving signal to a capacitive load. The driving circuit includes: an operational amplifier outputting a difference signal between signals from an inverting input terminal and a non-inverting input terminal, and setting a loop gain; a pulse width modulator pulse-width-modulating the difference signal outputted by the operational amplifier, and outputting resultant digital signal; a digital voltage amplifier amplifying a voltage of the digital signal; a first filter smoothing a digital signal from the digital voltage amplifier, and supplying a smoothed signal to the capacitive load as the driving signal; an impedance converting circuit converting an impedance of an output signal of the first filter; and a first feedback circuit feeding-back the driving signal, which is outputted from the first filter, to the inverting input terminal of the operational amplifier via the impedance converting circuit.

An automatic gain control (AGC) method and circuit (10) within a receiver uses a digital state machine (26) to implement the AGC function. independent from interaction with a host processor (36) and for multiple modulation protocols without duplicating circuitry. Modulation protocol and parameters for any of various gain responses are stored in a register (29). Multiple states, each corresponding to a predetermined range of RF input signal strength, are stored in the register. Each state contains parameters that determine a gain control signal for controlling a variable gain amplifier (16). The states are independent and may be selectively disabled to create asymmetric responses. Within any state, an adaptable number of iterations may be set to implement a different update rate or step size after a predetermined number of closed loop gain change iterations has not resulted in a transition to a state that represents a desired output gain.

An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on the reference clock to provide digital phase error samples indicative of a phase difference between the reference clock and the RF clock. A programmable filter is connected to receive the phase error samples and connected to provide a filtered output having a gain and a phase margin to the controllable oscillator. The programmable filter includes a proportional loop gain control having a programmable loop gain coefficient (alpha-α) and an integral loop gain control having a programmable loop gain coefficient (rho-ρ). Alpha and rho are configured to be programmatically changed simultaneously and are selected such that the gain is changed and the phase margin remains substantially unchanged

A novel gear shifting mechanism operative to adjust the loop gain of a phase locked loop (PLL) circuit in a continuous and reversible manner. The loop gain can be increased to widen the bandwidth of the loop and can also be decreased to narrow the loop bandwidth. The mechanism incorporates an α gear shift circuit, a p gear shift circuit and an optional IIR gear shift circuit. The α gear shift circuit comprises a infinite impulse response (IIR) filtering which enables hitless operation of the PLL loop at the occurrence of gear shift events. The α gear shift circuit comprises an accumulator whose output is multiplied by the gain value ρ. The invention enables multiple gear shifts in either positive or negative direction to be achieved by configuring the loop gain variables α and ρ which may be accomplished in software.

System and method for providing type-II (and higher order) phase-locked loops (PLLs) with a fast signal acquisition mode. A preferred embodiment comprises a loop filter with a proportional loop gain path (proportional loop gain circuit 1115) and an integral loop gain block (integral loop gain block 1120). The proportional loop gain path is used during signal acquisition to provide large loop bandwidth, hence fast signal acquisition of a desired signal. Then, during the PLL's signal tracking phase, the integral loop gain block is enabled and its output is combined with output from the proportional loop gain path to provide higher order filtering of the desired signal. An offset that may be present due to the use of the proportional loop gain path can be measured and subtracted to help improve signal tracking settling times.

A multi-bit sigma-delta analog to digital converter has a quantizer, a loop filter circuit, and a digital to analog feedback circuit. The quantizer, loop filter, and digital to analog feedback circuit have a loop gain associated therewith. The quantizer and loop filter have a combined gain associated therewith. The full-scale of the digital to analog feedback circuit is varied. The combined gain of the quantizer and loop filter is also varied. More specifically, the combined gain of the quantizer and loop filter is varied in inverse proportion to the full-scale of the digital to analog feedback circuit to maintain the loop gain at a substantially constant level.

An energy-efficient photoreceptor apparatus and a transimpedance amplifier apparatus having high energy-efficiency and low power consumption of which are achieved through multiple distributed gain amplification stages, adaptive loop gain control circuitry and unilateralization, thereby enabling fast and precise performance over a wide range of input-current levels. The high-energy efficiency, robust feedback stability and performance of the present invention can be utilized to achieve sub-milliwatt pulse oximeters and may be employed in other current-to-voltage amplification and conversion applications. The use of analog processing on the outputs of the photoreceptor apparatus also helps lower the overall power of pulse oximeters.

A monitoring system and method may be used to monitor an optical communication system. A monitoring system and method may be used to derive loop gain data sets from optical time domain reflectometry (OTDR) or coherent optical time domain reflectometry (COTDR) data. A monitoring system and method may also use differential monitoring techniques to obtain data representing gain tilt in the transmission system and to locate an anomalous loss or gain in the transmission system.

A polar-loop wireless communication apparatus includes, on a forward path between an amplitude detector and a power amplifier which constitute an amplitude control loop, a variable gain amplifier and a switch to change characteristics of a loop filter to output a frequency bandwidth of the amplitude control loop to an order less than an order for normal operation. The system is operated with the characteristics set to the lower order to measure outputs from the power amplifier to calibrate the output power of the power transmitter, and the register is operated with the characteristics set to the higher order to measure the open loop gain of the amplitude control. According to results of the calculation, data to correct gain characteristics of the variable gain amplifier with respect to an output control signal is stored in a nonvolatile memory of a baseband circuit.

A phase-lock loop (PLL) has an oscillator comprising a plurality of operating curves. A method for implementing a multi-transfer curve in a phase lock loop. By means of a finite state machine cooperating with a current cell, the unwanted loop gain is effectively reduced to produce a wide-ranging operating curve.

An automatic gain control (AGC) method and circuit (10) within a receiver uses a digital state machine (26) to implement the AGC function. independent from interaction with a host processor (36) and for multiple modulation protocols without duplicating circuitry. Modulation protocol and parameters for any of various gain responses are stored in a register (29). Multiple states, each corresponding to a predetermined range of RF input signal strength, are stored in the register. Each state contains parameters that determine a gain control signal for controlling a variable gain amplifier (16). The states are independent and may be selectively disabled to create asymmetric responses. Within any state, an adaptable number of iterations may be set to implement a different update rate or step size after a predetermined number of closed loop gain change iterations has not resulted in a transition to a state that represents a desired output gain.

Apparatus / method estimate LOS rotation, to track, approach, pursue, intercept or avoid objects. Vehicle-fixed imagers approach / recede-from objects, recording image series with background. Computations, from images exclusively, estimate rotation vs. the vehicle, applying the estimate. Preferably, recording / estimating provide proportional navigation; scan mirrors extend strapdown-sensor FOR; applying includes measuring “range rate over range”, exclusively from interimage optical flow, using results to optimize proportional-navigation loop gain; estimating includes evaluating interframe optical flow, preregistering roughly as first approximation, selecting sequence anchor points, and applying a second, finer technique developing output registration that's a coordinate translation, aligning inertial surroundings. The approximation operates optical flow with efficient embedded registration / mapping, applying a homography matrix to nearby imagery. Alternatively, inexpensive low-quality inertial sensors establish preregistration, deriving a homography matrix. When contrast in the object direction is inadequate, dual sensors yield accurate virtual imaging with an object centroid superposed into background.

The invention discloses a common-mode feedback circuit frequency compensation method of a dual-stage amplifier, which belongs to the analog integrated circuit design field. One common-mode feedback circuit is adopted in the dual-stage amplifier to reduce the area and the power consumption of the feedback circuit; the dual-stage amplifier adopts a fully-differential input / output structure; a differential output terminal is used for sampling the common-mode output level; a first-stage amplifying circuit thereof comprises a controllable biasing circuit; a common-mode feedback control signal controls the first-stage common-mode output level and the second-stage common-mode output level of the amplifier at the same time through the controllable biasing circuit; a feedback amplifier is realized by adopting a dual-stage operational amplifier with miller compensation. The left half plane zero point generated by the feedback amplifier in a loop circuit counteracts a certain left half plane pole in a prime amplifier, thereby forming a stable compensation loop circuit. The common-mode feedback circuit frequency compensation method has the advantages of less feedback circuit elements, lower feedback circuit power consumption, high low-frequency loop gain and better compensation phase margin.

The invention provides a phase-locked loop with loop gain calibration and methods for measuring an oscillator gain, gain calibration and jitter measurement for a phase-locked loop. The method for measuring an oscillator gain of a phase-locked loop includes the steps of providing a varying code at an input end of the oscillator; outputting excess reference phase information by a reference phase integral path and outputting excess feedback phase information based on the varying code by a feedback phase integral path; and obtaining an estimated gain information of the oscillator based on the excess reference phase information and the excess feedback phase information.

An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on the reference clock to provide digital phase error samples indicative of a phase difference between the reference clock and the RF clock. A programmable filter is connected to receive the phase error samples and connected to provide a filtered output having a gain and a phase margin to the controllable oscillator. The programmable filter includes a proportional loop gain control having a programmable loop gain coefficient (alpha—α) and an integral loop gain control having a programmable loop gain coefficient (rho—ρ). Alpha and rho are configured to be programmatically changed simultaneously and are selected such that the gain is changed and the phase margin remains substantially unchanged.

Methods and systems are provided for frequency generation suitable for use in wireless devices capable of operating at multiple frequencies. Such systems may change the loop gain of an automatic frequency control loop based on the operating frequency of the wireless device. Furthermore, such a frequency dependent loop gain may be carried out by the selection of subroutines with differing loop gains associated with the subroutines. Furthermore, the loop gain may also be temperature compensated based on the temperature of the wireless device and / or the operating frequency of the device.