64 results about "Loop gain" patented technology

The invention belongs to the field of stability analysis of a grid-connected system of a grid-building converter, and particularly relates to a grid-building converter grid-connected resonance risk analysis method considering virtual impedance, which comprises the following steps: S1, establishing a three-phase time domain differential equation and simplifying the equation into a single-phase equivalent time domain model; converting into a harmonic state space model of the main circuit; s2, constructing a harmonic state space model of a control system comprising an active power control loop and a reactive power control loop; s3, introducing a virtual impedance control link, and correcting the voltage amplitude reference phasor output by the reactive power control loop; deriving an expression of a modulation signal disturbance phasor; s4, obtaining a complete frequency domain admittance model YGSC of the network construction converter considering the influence of the virtual impedance; an open loop gain TGFM of the grid converter grid-connected system is constructed; and S5, drawing a Nyquist curve based on TGFM, and carrying out resonance risk determination. According to the method, the interaction dynamic characteristics of the network building converter and the power grid under the influence of the virtual impedance can be accurately represented, and the resonance risk of the grid-connected system is evaluated.

The invention belongs to the technical field of stability compensation circuits, and particularly relates to a stability compensation circuit structure of a high-speed operational amplifier, which is characterized by comprising a function module, a first control module, a second control module, a third control module, a fourth control module and a fourth control module, and the function module comprises an input stage, a differential common-base gain stage, a common-base level converter module and an output stage, and the stability compensation assembly comprises a dual-frequency load unit which is matched with the functional module and comprises a low-frequency load branch and a high-frequency load branch which are connected in parallel. Through the synergistic effect of the double-frequency load unit and the pole regulation and control capacitor, gain segmentation regulation and control of low-frequency high gain and high-frequency fast attenuation are achieved, the open-loop gain of the operational amplifier breaks through the limitation of 30dB of an existing HBT single-stage operational amplifier, and meanwhile the problem that high-frequency phase shift changes too fast is effectively restrained; through simulation verification, the phase margin can reach 67 degrees, the stability requirement of 45-60 degrees and above of an analog circuit is met, and the core contradiction that the high-gain bandwidth and the phase margin of an HBT device are difficult to balance is thoroughly overcome.

The invention discloses a compound control method for improving the current control performance of a three-phase LCL type grid-connected inverter. The method comprises the following steps: establishing a system loop gain based on digital control delay; composite control is realized by adopting a mode of combining a capacitance current sampling modification mode and a delay compensation link, and the capacitance current sampling modification mode is used for shortening capacitance current sampling delay and comprises the steps of sampling grid-connected current at a wave trough of a triangular carrier wave, sampling capacitance current at a wave crest of the triangular carrier wave, and carrying out delay compensation on the grid-connected current. A modulation signal is loaded at the next grid-connected current sampling moment, and capacitance current sampling delay is shortened by half beat; the delay compensation link is used for compensating the influence of digital control delay, the influence of digital control delay is reduced by embedding a lead phase compensator in a capacitive current feedback loop, and the stability of the system and the quality of grid-connected current are improved. According to the invention, composite control is realized by adopting a mode of combining a capacitor current sampling modification mode and a delay compensation link addition mode.

The invention discloses a fast transient response LDO (Low Dropout Regulator) circuit which comprises a voltage stabilizing circuit used for stably outputting direct current voltage; the voltage output channel is used for converting the direct-current voltage into a control signal vctrl and then recovering the control signal vctrl and taking the control signal vctrl as an output voltage vout of the fast transient response LDO circuit; the fast response loop comprises a first burr detection path, a second burr detection path, a PMOS (P-channel Metal Oxide Semiconductor) tube Mcas and an NMOS (N-channel Metal Oxide Semiconductor) tube Mpass, the first burr detection path and the second burr detection path respectively detect the fluctuation of the output voltage vout and synchronously output a detection signal, and the output voltage vout is subjected to negative feedback through the NMOS tube Mpass after being amplified by the PMOS tube Mcas. According to the invention, output voltage vout fluctuation caused by output load change can be rapidly reduced, and the circuit has the advantages of high sensitivity, high loop gain, unlimited output voltage range and full integration.

The invention discloses a servo motor disturbance suppression method based on variable gain control, and the method comprises the steps: adding a nonlinear branch for disturbance suppression on the basis of a conventional position closed-loop control structure; the nonlinear branch is formed by connecting a phase extractor and a gain regulator in series, the phase extractor extracts effective phase information according to a tracking error signal of the servo system, and the gain regulator outputs a corresponding nonlinear compensation signal according to the phase information. After the compensation signal is superposed to the position loop, the loop gain of the system at a low frequency band can be dynamically improved, so that the disturbance suppression capability is remarkably enhanced. The nonlinear branch is essentially a switching function, but is different from a traditional switching function or a fixed gain control mode, the gain regulator adopts a reset integral mechanism to generate nonlinear gain, and the gain regulator has excellent low-frequency disturbance suppression performance and anti-noise capability. The device has the advantages of simple structure, quick response and the like.

The application relates to a voltage follower-based addressable sensitive amplifier test circuit, which comprises: a sensitive amplifier array to be tested, the array comprising a plurality of sensitive amplifiers to be tested; an addressing circuit for providing an address signal to select a target sensitive amplifier; a switch selection circuit connected between the sensitive amplifier array to be tested and an external test node, controlled by the addressing circuit, for coupling the signal of the external test node to the selected sensitive amplifier; and a voltage follower module with an input end connected to the switch selection circuit, for transmitting the test voltage output by the switch selection circuit to the corresponding end of the selected sensitive amplifier. The application can realize efficient and accurate SA performance testing. The node voltage curve is only affected by the gain of the operational amplifier, and the design open-loop gain is above 60 dB, so that an error below 0.1% can be realized.

This invention belongs to the field of analog integrated circuit design, and particularly relates to a low-dropout linear regulator with fast dynamic response and high stability. It includes: an error amplifier, a Class AB buffer stage circuit, an output power transistor, a positive feedback resistor compensation circuit, an undervoltage detection circuit, and a startup circuit. The Class AB buffer stage circuit is used to improve the transient characteristics of the low-dropout linear regulator, and the positive feedback resistor compensation circuit is used to improve the phase margin of the low-dropout linear regulator. This invention achieves fast dynamic response, essentially eliminates overshoot and undershoot phenomena, and significantly shortens the recovery time. It also maintains high stability while ensuring loop gain and includes undervoltage detection functionality to ensure smooth system startup.

The invention discloses a power output improvement circuit, method and chip for an LDO.The circuit comprises a first power MOS tube, a second adjusting MOS tube and a third auxiliary MOS tube which are arranged between a power source positive electrode and a power source negative electrode, the source electrode of the first power MOS tube is connected with the power source positive electrode, the drain electrode of the first power MOS tube is electrically connected with the source electrode of the second adjusting MOS tube, and the source electrode of the third adjusting MOS tube is electrically connected with the source electrode of the third auxiliary MOS tube; the drain electrode of the second adjusting MOS tube is electrically connected with the source electrode of the third auxiliary MOS tube, and the drain electrode of the third auxiliary MOS tube is electrically connected with the negative electrode of the power supply; a self-adaptive proportional control network is connected between the positive electrode of the power supply and the drain electrode of the second adjusting MOS tube, the self-adaptive proportional control network is further electrically connected with the grid electrode end of the first power MOS tube, and the second adjusting MOS tube can be controlled to work in a saturation region through the self-adaptive proportional control network after the load changes. Therefore, the power output can have enough loop gain under the conditions of light load and heavy load.

A self-excitation microwave sensor suitable for non-destructive testing of metal mesh film, belonging to microwave sensor technology, comprising a resonant sensing structure, a microwave amplifier, a phase shift element, a band-pass filter, a radio frequency detector, a digital-to-analog converter and a microprocessor; wherein the resonant sensing structure, the microwave amplifier, the phase shift element and the band-pass filter form a self-excitation oscillation loop, the resonant sensing structure has a band-pass characteristic, is located in the feedback branch of the loop, the resonant frequency thereof is consistent with the center frequency of the band-pass filter, and the loop gain and the phase shift satisfy the self-excitation oscillation condition at the frequency; by reasonably setting the gain of the microwave amplifier and collecting the self-excitation oscillation signal power in real time, the sensor can realize detection of sub-millimeter width crack damage and identification of high square resistance samples, has high detection sensitivity, compact structure, small volume and low cost, does not need other external microwave analysis instruments, and can be applied to on-site non-destructive testing of metal mesh film.

This invention relates to the field of circuit hardening technology, and provides a voltage-controlled oscillator (VCO) circuit and phase-locked loop (PLL) circuit that are resistant to single-event transients. Addressing the issue that traditional three-mode relaxation oscillator (VCO) circuits are unsuitable for low-voltage conditions, especially when the power supply voltage drops to around 0.8V, this invention employs six oscillation branches coupled into three large oscillation loop circuits to improve loop gain. Furthermore, by combining bias circuits, comparators, and voting circuits for each path, the problem of increasing nonlinearity is avoided. This achieves a combination of large oscillation loops, bias circuits, and a three-mode VCO architecture, resulting in a VCO circuit that maintains high-frequency stable operation under ultra-low voltage conditions such as 0.8V, thus achieving a single-event transient resistance effect, especially at low voltages of 0.8V.

The application belongs to the technical field of power management, and particularly relates to a large-plate external capacitor LDO with an overcurrent loop structure and high PSR performance. ds The application utilizes the large-plate external capacitor to benefit voltage stabilization and the high-voltage power tube has the characteristics of large r The application converts the common low-voltage drop and small-load-current LDO into a high-voltage drop and large-load-current LDO, and improves the PSR performance of the LDO in the full frequency band. Compared with the traditional structure, the power supply noise at low frequency can be suppressed through large loop gain, and the power supply noise at medium and high frequencies can be filtered out through the large-plate external capacitor.

A system for operating an LC-VCO includes: a low power, low phase noise inductance capacitance voltage controlled oscillator (LC-VCO); an LC-VCO power supply regulator configured to regulate a power supply voltage to the LC-VCO; and a feedback network connected to the LC-VCO power supply regulator. The feedback network is configured to track a process voltage temperature (PVT) variation of a metal oxide semiconductor field effect transistor (MOSFET) used in a negative transconductance circuit of the LC-VCO, and adjust a loop gain of the LC-VCO over the PVT variation. The feedback network includes: a first MOSFET, where the first MOSFET is configured to function as a switch; a first resistor connected to both ends of the first MOSFET; a current source device biased with a bandgap voltage; the diode and current mirror pair comprises a second MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a third MOSFET; and a constant current source connected to the current source device and the diode and current mirror pair.

The invention discloses a compensation loop circuit for suppressing optocoupler thermally induced gain attenuation. The compensation loop circuit comprises a voltage reference module, an optocoupler isolation module and an optocoupler input end current-limiting resistor module. In order to solve the problem of loop gain attenuation caused by the negative temperature characteristic of the current transmission ratio in a traditional optocoupler isolation compensation network, a current-limiting resistor at the input end of an optocoupler is reconstructed into a series structure and is connected with an NTC thermistor in parallel to form a temperature self-adaptive bias network, and the network can automatically reduce the equivalent input resistance of the optocoupler along with the rise of the temperature, so that the gain of the loop is reduced. The loop gain attenuation is compensated in real time, and the left shift of the crossing frequency is inhibited. According to the invention, effective compensation for the negative temperature characteristic of the current transmission ratio of the optocoupler is realized through a pure analog circuit structure, the ride-through frequency deviation of the system is effectively inhibited in a wide temperature range of 25-105 DEG C, and the gain stability and dynamic response performance of the power supply in a severe temperature environment are remarkably improved; and meanwhile, the conciseness and reliability of the traditional scheme are kept.

The present application relates to the technical field of intelligent decision-making, in particular to an engineering change intelligent identification and influence analysis method and system. In the present application, by extracting the physical connection information of the field control equipment and associating the operating parameters and the logical constraint parameters, a field device interconnection topology model with signal flow direction as the connection line is constructed, the discrete engineering equipment is converted into a digital map with logical handshake relationship, the parameter modification behavior is monitored in real time and the change source equipment is locked, the history trend consistency and real-time availability of the redundant signal channel are verified by using the grey correlation analysis algorithm and the effectiveness threshold, when it is confirmed that it has effective backup, it is automatically determined as a blocking node, the input signal change is simulated and calculated according to the PID control algorithm combined with the loop gain coefficient, whether the fluctuation occurs physical dissipation is confirmed by comparing the absolute value of the difference of the theoretical output signal and the signal control dead zone threshold, and the effective fluctuation which can actually drive the downstream equipment action is accurately identified.

This disclosure provides a low-dropout linear regulator (LDO), comprising: an error amplifier, a buffer, a power transistor, a voltage divider negative feedback unit, and a temperature detection unit. The error amplifier includes at least a first output load and a second output load, wherein the equivalent output impedance of the second output load is greater than the equivalent output impedance of the first output load. The temperature detection unit is used to detect the current operating ambient temperature. When the current operating ambient temperature is greater than or equal to a first temperature threshold, the temperature detection unit drives the error amplifier to use the second output load as the current output load. This disclosure performs real-time detection of the operating ambient temperature through the temperature detection unit. When the detected ambient temperature exceeds the temperature threshold, an enable signal is generated to drive the error amplifier to switch its output load, changing its current output load to an output load with a higher equivalent impedance. This improves the gain of the error amplifier, thereby increasing the loop gain and ultimately improving the accuracy of the LDO output voltage.

The present application relates to the technical field of electronic measurement, more particularly, it is especially related to a composite pressure expansion, flow expansion and frequency expansion circuit, which comprises an input signal source, a front-stage precision operational amplifier circuit, a rear-stage high-voltage and high-current operational amplifier circuit and a feedback loop, the input signal source is connected with the input end of the front-stage precision operational amplifier circuit, the output end of the front-stage precision operational amplifier circuit is connected with the input end of the rear-stage high-voltage and high-current operational amplifier circuit, and the feedback loop is connected between the output end of the rear-stage high-voltage and high-current operational amplifier circuit and the input end of the front-stage precision operational amplifier circuit.The present application uses cascaded operational amplifier circuits to realize a high-precision, high-voltage, high-current and wide-frequency output circuit.Through multi-stage operational amplifier cascading and feedback configuration, higher closed-loop gain is obtained under the premise of ensuring stability, and the effective bandwidth is expanded to meet the high-frequency or high-gain signal processing requirements.

The present disclosure relates to dynamic timing loop gain for compensating for phase interpolator nonlinearity. An integrated circuit transceiver having a digital timing recovery loop with phase interpolation can incorporate dynamic loop gain to compensate for nonlinearity of the phase interpolation. An illustrative integrated receiver circuit includes a phase interpolator, a sampling element, a timing error estimator, and a feedback circuit. The phase interpolator provides a sampling signal by applying a phase shift to a clock signal in response to a phase control signal. The sampling element produces a digital receive signal by sampling an analog receive signal in accordance with the sampling signal; the timing error estimator produces a timing error signal indicative of an estimated timing error of the sampling signal relative to the analog receive signal. The feedback circuit derives the phase control signal from the timing error signal using a scaling element configured to scale the estimated timing error by a scaling factor that depends on the phase control signal.

The invention belongs to the technical field of power electronic converters, and particularly relates to a self-adaptive slope compensation method and system for a four-tube buck-boost converter. The compensation slope can be dynamically adjusted by detecting the output voltage, so that when the four-tube buck-boost converter works under the working condition of a wide input range, the slope compensation slope can be adjusted in real time according to the relative relation between the input voltage and the output voltage, the slope compensation slope is automatically increased when the slope in the descending stage is high, and the slope compensation efficiency is improved. Stable operation of the system is guaranteed, subharmonic oscillation is prevented, and when the slope in the descending stage is low, the slope compensation slope is automatically reduced, so that the loop gain is increased, and the dynamic response speed is increased. According to the method, intelligent regulation and control of the slope compensation slope are realized, and stable operation of the four-tube buck-boost converter in a full range is ensured.

Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.

The application relates to the technical field of mixed signal circuits, and provides a pipeline successive approximation type analog-to-digital converter and method for inter-stage gain error calibration. A background calibration scheme is designed by introducing a gain error detection circuit and a calibration circuit. For inter-stage gain error calibration of any two adjacent sub-SAR ADCs, the gain error detection circuit is used to judge the range of residual error, the inter-stage gain error is monitored, and finally the closed-loop gain of the residual error amplifier is calibrated according to the deviation result determined by the inter-stage gain error, so that the closed-loop gain gradually converges to the ideal gain. Compared with the prior art, the aforementioned background calibration scheme belongs to analog domain calibration and can track the change of the gain error with PVT. By directly correcting the actual analog gain in the circuit, the background real-time calibration of the inter-stage gain error is efficiently and accurately realized, and the precision and stability of the pipeline successive approximation type analog-to-digital converter are effectively improved.

This invention discloses a novel Class-AB output buffer load compensation structure, belonging to the field of analog integrated circuits. It includes a feedforward output buffer module and a load compensation loop module. The on-chip compensation capacitor in the load compensation loop is multiplied by the loop gain under the action of the gain amplification stage, forming a very large equivalent load compensation capacitor. Simultaneously, a left-half-plane zero is introduced, thereby achieving the goal of ensuring loop stability under various load conditions without using a large external load compensation capacitor. This invention has the advantages of simple circuitry and ease of use, and is suitable for Class-AB output buffer designs with a wide load range.

The application discloses a high linearity wideband input buffer, which comprises a common-source and common-gate type source flip-flop configured as a pseudo differential structure, and comprises a positive end input transistor, a negative end input transistor, a positive end common-gate transistor and a negative end common-gate transistor, a positive end output transistor and a negative end output transistor; a cross-coupling input circuit is coupled between the drain of the positive end input transistor and the gate of the negative end common-gate transistor, and between the drain of the negative end input transistor and the gate of the positive end common-gate transistor; a mirror load circuit is connected between the gate of the positive end input transistor and the source of the positive end output transistor, and between the gate of the negative end input transistor and the source of the negative end output transistor; and a bias current source circuit is connected to the source ends of the positive end input transistor and the negative end input transistor. The buffer increases the loop gain of the common-source and common-gate type source flip-flop, reduces the output impedance, effectively improves the bandwidth of the input buffer, and ensures the linearity of the input buffer.

The invention relates to a positive feedback gain compensation circuit applied to a sample hold circuit, which comprises a first positive feedback compensation unit, a second positive feedback compensation unit, a first logic control unit and a first sub ADC unit, and is characterized in that the V1 end and the V2 end of the first positive feedback compensation unit are respectively connected with the positive ends of the differential input end and the differential output end of an operational amplifier; the V1 end and the V2 end of the second positive feedback compensation unit are respectively connected with the negative ends of the differential input end and the differential output end of the operational amplifier; an output signal of the first logic control unit is respectively accessed to the first positive feedback compensation unit and the second positive feedback compensation unit; and an output signal of the first sub-ADC unit is connected with an input end of the first logic control unit. According to the positive feedback gain compensation circuit applied to the sample hold circuit, the requirement for the gain of an operational amplifier in the sample hold circuit can be lowered, and meanwhile the problem that the open-loop gain of the operational amplifier introduces a nonlinear error along with the change of the output amplitude is solved.

The application discloses a kind of three-axis stable platform rotation inertia compensation method based on mechanics model, to platform body axis angle β zk , inner frame axis angle β yk , platform body to x p , y p , z p Axis of rotation inertia Inner frame to axis of rotation inertia Outer frame to axis of rotation inertia As the input information of decoupling link, the compensation value of rotation inertia is obtained by solving through mechanics model, is compensated to outer ring axis stabilization loop, compensates the servo control loop gain variation caused by the change of frame system rotation inertia.The application first gives the mechanics model between frame angular acceleration and total moment of force on frame axis, is used to compensate the gain of outer ring servo control loop when inner ring axis is large angle, guarantees the stable margin of servo control loop when platform frame system is at any position in inner ring.

The application discloses a kind of broadband solid-state power amplifier and pulse modulation method, belong to amplifier technical field, including amplifier unit, detection control unit, power module and power detection module, it solves the technical problem of improving the protection of GaN power device in high-power power amplifier, accurate control amplitude and improve the maintainability of modularity, the local grid negative voltage management of the present application is realized, power-on power-down timing control, drain pulse modulation and temperature monitoring, effectively avoid GaN chip damage due to power timing error or local overheating, significantly improve the reliability of the whole machine, support open-loop gain control and closed-loop automatic level control ALC two modes, effectively reduce the impact of pulse current on power bus, improve the flatness of output pulse top, ensure the consistency of each unit radio frequency phase and power supply timing, improve the synthesis efficiency, can be quickly positioned and replaced, greatly reduce the average repair time, improve the availability and usability of equipment.

A voltage regulator includes a first circuit to generate a difference signal based on an input reference voltage, a regulated output voltage, and a signal on a feedback node. The voltage regulator includes a second circuit to provide the regulated output voltage on the output node based on the difference signal. The second circuit includes a first transistor coupled to receive the difference signal, a first feedback circuit to provide a first feedback signal to the feedback node, and a second feedback circuit to provide a second feedback signal to the feedback node. An open loop frequency response of the voltage regulator has a first pole and a second pole and the first feedback signal may adjust the frequency of the second pole based on a load current. The second feedback signal may adjust loop gain based on the load current.

This invention discloses a calibration method, storage medium, and electronic device for a position servo control system. Specifically, it includes: determining the open-loop transfer function and open-loop gain of the position servo control system and drawing a first Bode plot accordingly; determining whether the gain margin and phase margin of the first Bode plot meet set requirements; if both the gain margin and phase margin of the first Bode plot meet set requirements, calibration is completed; otherwise, proceed to the next step; drawing the expected second Bode plot based on the set gain margin and phase margin requirements; determining a calibration function and its parameters based on the first and second Bode plots; and completing the calibration. In the solution provided by this invention, based on geometric processing, the difference between the first and second Bode plots is analyzed to determine the calibration scheme, reducing the amount of data processing and enabling calibration to be completed even without a computer.

According to the method for improving the capless LDO load regulation rate, an in-phase gain stage circuit composed of M15-M18 is additionally arranged in a POWER module of a capless LDO circuit structure composed of a CORE module and the POWER module, the output stage loop gain is improved, the load regulation rate is increased, meanwhile, the MP grid voltage range can be enlarged, the width-length ratio is reduced under the same loading capacity, and the area is reduced.

The invention relates to the field of analog integrated circuit design, and provides an improved common-mode stable FIA type amplifier, which comprises a differential FIA amplifier main body, a common-mode stable FIA amplifier main body, a common-mode stable FIA amplifier main body and a common-mode stable FIA amplifier main body, the output common-mode presetting unit is used for presetting the output common-mode voltage of the output end of the differential FIA amplifier into a potential corresponding to the input common-mode voltage in a reset stage; the gain stabilization unit is used for providing equivalent load regulation for the differential FIA amplifier in an amplification stage; and the sequential control unit is used for controlling the reservoir capacitor to perform charge storage in a reset stage to enable the output common-mode presetting unit to perform common-mode voltage presetting operation on the output end, and controlling the reservoir capacitor to release the stored charge to the differential FIA amplifier main body in an amplification stage to provide dynamic working electric energy. On the premise that the main body structure of a traditional FIA type amplifier is not changed, the problems that in the traditional FIA type amplifier, an output common mode is prone to being affected by parasitic capacitance, the inherent common mode rejection capacity is lowered, and open-loop gain drifts remarkably along with the PVT condition are solved.

The application discloses a grid-connected inverter stability analysis method and device, the method comprises the following steps: according to the circuit structure of the grid-connected inverter system in the dq domain, a small signal model of the grid-connected inverter system is established in the controller dq coordinate system; the latch voltage of the control loop of the grid-connected inverter system in the controller dq coordinate system is calculated; according to the conversion relationship between the latch voltage of the phase-locked loop control loop, the controller dq coordinate system and the grid dq coordinate system, the grid synchronization small signal model of the grid-connected inverter system in the control dq coordinate system is obtained; according to the grid synchronization small signal model, the loop gain is calculated and the synchronization stability of the grid-connected inverter system is obtained. By adopting the application, the stability margin of the system can be identified through the constructed single-input single-output grid synchronization small signal model, and the stability of the grid-connected inverter can be improved.