342 results about "Low-dropout regulator" patented technology

The present disclosure provides a digital low-dropout regulator (DLDO) and an electronic device using the same. The DLDO includes a voltage comparator circuit, a switch control circuit, a power switch module, and an asynchronous clock generation circuit. The voltage comparator circuit compares a reference voltage with the output voltage to output a comparison result signal. The switch control circuit generates a switch control signal based on the comparison result signal. The power switch module is controlled by the switch control signal to switch between the on state and the off state, thereby adjusting the output voltage. The asynchronous clock generation circuit generates a reference clock signal that is asynchronous with the system clock signal used in the load circuit and has a higher clock frequency. This allows the switch control circuit to update the switch control signal based on the reference clock signal.

In certain aspects, a voltage regulator includes a pass transistor coupled between an input of the voltage regulator and an output of the voltage regulator, and an amplifier having a first input coupled to a reference voltage, a second input coupled to the output of the voltage regulator via a feedback path, and an output. The voltage regulator also includes a voltage booster coupled between the output of the amplifier and a gate of the pass transistor. In certain aspects, the voltage booster includes a first capacitor and a second capacitor for double charge pumping. In certain aspects, a control circuit of the voltage booster is coupled to a voltage source that is independent of an output voltage of the amplifier.

Provided in the present application are a band-gap reference current source, a low dropout regulator and a power manager, which are applied to the technical field of power chips. The band-gap reference current source uses dual band-gap references to form a band-gap reference loop, and uses an operational amplifier clamping unit to implement clamping adjustment, so as to generate a reference current that is in direct proportion to the temperature, which is conducive to using the reference current to perform linear voltage stabilization subsequently, such that the regulator has a relatively high loading capacity, a very low quiescent current and a relatively high power noise suppression ratio, thereby improving the overall efficiency of a voltage-stabilizing circuit, and also greatly reducing the layout area.

The invention discloses a dual-redundancy servo controller and a main-standby autonomous switching method thereof, and belongs to the technical field of electric servo control. The controller comprises a host machine and a standby machine; each of the host and the standby machine comprises a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), a hardware ID (Identity) identification module, a motor power driving IPM (Intelligent Power Module) and a generator tripping instruction module which are in signal connection; the DSP and the FPGA are respectively connected with an LDO (Low Dropout Regulator) power module; the FPGA is in communication connection with the control system; the motor power driving IPM is connected with the execution mechanism; the DSP processors of the host and the standby machine are in signal connection; and the switching instruction modules of the host and the standby are in signal connection. The invention discloses a main / standby autonomous switching method for a dual-redundancy servo controller, which adopts a DSP and an FPGA to cooperatively detect and process faults, improves the fault detection rate by 5%, and reduces the possibility that the output of an IPM module is not turned off by 20% when a fault occurs; three heterogeneous redundant generator tripping modes of hardware generator tripping, serial port generator tripping and heartbeat generator tripping are adopted, and the reliability of main and standby independent generator tripping is improved by 20%.

The invention provides a high-precision current limiting circuit of an LDO (Low Dropout Regulator) with an NMOS (N-channel Metal Oxide Semiconductor) tube as a power tube, which is applied to the technical field of current limiting circuits and comprises a voltage loop and a current loop, and the voltage loop is used for monitoring and stabilizing the output voltage VOUT of a power tube NM1; and the current loop is used for acquiring a sampling current according to the load current of the power tube NM1, comparing the sampling current with a reference current IREF, and when the sampling current is higher than the reference current IREF, driving and controlling the output voltage VOUT of the power tube NM1 to be reduced so as to limit the load current of the power tube NM1 to continue to rise. When the LDO works normally, the output voltage VOUT of the power tube NM1 is stabilized through the voltage loop, and when the load current is too high, the output voltage VOUT of the power tube NM1 is driven and controlled to be reduced through the current loop, so that the load current of the power tube NM1 is prevented from continuing to rise, and the stability and the safety of the LDO are improved.

The invention discloses a low-dropout linear voltage regulator which is totally divided into three parts, the first part is an error amplifier, and it is guaranteed that the output voltage of the low-dropout linear voltage regulator is kept unchanged under different load currents; the second part is a source following current output stage, the output current is divided into two branches, one branch is supplied to the base electrode of an NPN triode, and the other branch is supplied to a first NMOS tube connected with a diode; and the third part is a zero point tracking part, the principle of the zero point tracking part is to obtain a current which is proportional to the current flowing to the base electrode of the NPN triode so as to obtain a zero point, and the frequency of the zero point is increased along with the increase of the load current for frequency compensation. The three parts, a power NPN triode, a partial pressure feedback resistor and a plug-in capacitor form a whole circuit. According to the invention, the driving current can reach the ampere level, the requirement of the whole circuit on the value of the equivalent series resistance of the external capacitor is reduced, and the resistance value range of the equivalent series resistance of the external capacitor is expanded.

The invention discloses an LDO (Low Dropout Regulator) circuit compatible with a low-voltage domain and an overvoltage domain, which belongs to the technical field of LDO circuits and comprises PMOS (P-channel Metal Oxide Semiconductor) tubes P1-P14, NMOS (N-channel Metal Oxide Semiconductor) tubes N1-N17, an input IB1 and an output VOUT, wherein the PMOS transistors P1-P4 form a current mirror, the NMOS transistors N5-N9 are first voltage division structures connected by diodes, and the NMOS transistors N16-N17 are second voltage division structures connected by diodes; nMOS (N-channel metal oxide semiconductor) tubes N14-N15 and a PMOS (P-channel metal oxide semiconductor) tube P13 are used for dividing voltage under overvoltage, so that no MOS tube has overvoltage from the power supply AVDD to the ground GND; and meanwhile, the NMOS tubes N14-N15 and the PMOS tube P13 do not divide the voltage under the low voltage, so that the normal work of the LDO circuit is not influenced. According to the LDO structure compatible with the overvoltage and the low voltage at the same time through the low-voltage device, the overvoltage requirement can be met through the low-voltage device, and the requirement that the performance is not attenuated under the low voltage is met.

The invention relates to the technical field of chip detection, and discloses a high-reliability power supply chip circuit fault detection system, which comprises a built-in self-test architecture integrated in a low dropout regulator chip, and the built-in self-test architecture is provided with a first test mode and a second test mode which are switched based on a mode switching control circuit. The detection module is used for detecting key performance parameters of an error amplifier sub-circuit in a low dropout linear regulator chip, the detection module is used for measuring the direct current loop gain, the offset voltage, the common mode rejection ratio and the power supply ripple rejection ratio of the amplifier in the first test mode, and the detection module is used for measuring the unity gain bandwidth of the amplifier in the second test mode. According to the invention, through the design of a built-in self-test architecture and two test modes, abnormal states such as differential circuit imbalance and feedback loop fault can be identified in a bare chip stage, chips with poor performance are rejected in advance, and the LDO chip is ensured to reach a ppb-magnitude high reliability standard.

The invention discloses a low dropout regulator with an output voltage switching circuit. The low-dropout linear voltage stabilizing circuit outputs a voltage stabilizing signal according to the voltage difference between the voltage of the second end of the transistor and the voltage of a voltage stabilizing critical voltage signal or the voltage difference between the voltage of the second end of the transistor and a reference voltage. The switch error amplification circuit outputs a pull-up control signal according to the difference between the voltage of the second end of the transistor and the voltage of a voltage pull-up switching signal. When the voltage selection circuit selects the voltage stabilization signal, the transistor operates according to the voltage stabilization signal to adjust the output voltage of the low dropout regulator. When the voltage selection circuit selects the pull-up control signal, the switch assembly is turned on according to the pull-up control signal, so that the input voltage directly pulls up the output voltage of the low dropout regulator.

Techniques are described herein for regulating output voltage using a low-dropout (LDO) voltage regulator. In an example, an LDO voltage regulator circuit includes a pass circuit that is driven or otherwise controlled by a first buffer circuit, and a sense circuit that is driven or otherwise controlled by a second buffer circuit. The pass circuit is configured to pass current from a voltage supply terminal to an output voltage terminal, responsive to a first control signal. The sense circuit is configured to sense the current passed by the pass circuit, responsive to a second control signal. The first buffer circuit is configured to provide the first control signal to the pass circuit, responsive to a third control signal, and the second buffer circuit is configured to provide the second control signal to the pass circuit, also responsive to the third control signal.

The invention provides a turn-back type current-limiting protection circuit and a low dropout regulator, and belongs to the technical field of integrated circuits, and the turn-back type current-limiting protection circuit is characterized in that a first sampling resistor outputs a first current according to a sampling signal of a load current, a first bias current and a gated second bias current; the second sampling resistor outputs a second current according to the third bias current and the gated fourth bias current; the current comparison network generates a current comparison signal; the common-source amplification module is connected between an output signal of the error amplifier and a grounding end, on-off of the common-source amplification module is controlled by a current comparison signal and a gated low signal, and an output end of the common-source amplification module is connected with a gate driving module of a power tube; the output signal feedback network generates a gating signal according to the input signal, the output signal and the output signal of the error amplifier. The beneficial effects are that constant load current output is realized by detecting the load current change of the power tube and adjusting the grid voltage of the power tube, and the grid voltage clamp of the power tube is positioned at a safe level by utilizing output voltage feedback, so that turn-back type current limiting protection is realized.

Circuits and methods that limit current through power FETs of power converter to reduce damaging current in-rush events, independent of switching frequency, device mismatches, and PVT variations. Embodiments utilize a closed-loop feedback circuit and / or a calibrated compensation circuit to regulate, substantially independent of frequency, the control voltage VGATE applied to a power FET gate. In a reduced gate-drive mode, connecting a feedback or compensation circuit to the gate of an LDO source-follower FET allows the gate voltage to be regulated to control the LDO output voltage to a final inverter coupled to the gate of a power FET so that VGATE is adjusted to provide a reduced gate-drive to the power FET; connecting to the output of the LDO allows the LDO output voltage to the final inverter to be directly regulated to adjust VGATE; connecting to the gate of the power FET allows VGATE to be directly set.

The invention belongs to the technical field of new energy automobile lithium battery thermal runaway early warning, and particularly discloses a lithium battery thermal runaway gas early warning system. The method is used for solving the problem that thermal runaway cannot be rapidly and accurately detected and early warning cannot be carried out in advance in the existing monitoring technology. The early warning system comprises a main control unit, a core processing unit, a graphical user interface, a dual-frequency driving signal generation circuit, a spectral signal dual-frequency demodulation circuit, a temperature control circuit, a constant current source and overcurrent protection circuit, a spectral data acquisition circuit, a graphical user interface, an optical system, a gas sampling device and an early warning model. The power supply of the early warning system adopts a three-stage voltage reduction design, and comprises an AC-DC switching power supply, a DC-DC switching power supply and a low dropout regulator. Based on the off-axis integral cavity optical path coupling technology of the double-optical wedge group, the light beam angle is accurately adjusted through the double optical wedges of the stepping motor, a beam combiner does not need to be used, and the light energy utilization rate and the detection sensitivity are improved.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

The invention discloses a low leakage current enabling control circuit and method suitable for a high-voltage LDO, the low leakage current enabling control circuit comprises a bias unit, a turn-off unit and an output unit, and the output end of the bias unit is connected with the input end of the turn-off unit to provide static bias current for the turn-off unit; the output end of the turn-off unit is connected with the input end of the output unit to provide a controllable high-voltage domain power supply for the output unit, and the first output end of the output unit is connected with the first input end of the low-voltage circuit module to provide a low-voltage domain power supply for the low-voltage circuit module. And the second output end of the output unit is connected with the second input end of the low-voltage circuit module and is used for controlling the enabling and turn-off of the low-voltage circuit module. According to the invention, the isolation degree of the chip in the disable state is improved, and the leakage current of the chip in the disable state is effectively reduced.

An overshoot protection circuit, a method, and a chip. The overshoot protection circuit includes: a low drop regulator (LDO), a reference source circuit, a switching controller, and a rough reference voltage generation circuit. The switching controller is configured to control the LDO to be connected to the rough reference voltage generation circuit in a first stage of power supply signal change, connected to the reference source circuit in a second stage of power supply signal change. The rough reference voltage generation circuit is configured to generate a first preset reference voltage, and the reference source circuit is configured to generate a second preset reference voltage; in the first stage, the switching controller is configured to electrically connect the LDO to the first preset reference voltage; in the second stage, the switching controller is configured to electrically connect the LDO to the second preset reference voltage.

The invention provides a low dropout regulator with an off-chip capacitor and a power supply, the low dropout regulator comprises a bias module, a control voltage generation module and a voltage stabilization module, the input end of the control voltage generation module is connected with a reference voltage, and a stable control voltage is generated through dynamic adjustment of a negative feedback structure; the voltage stabilizing module provides voltage for the output end of the low-dropout voltage stabilizer based on the control voltage, a plurality of voltage followers and a plurality of power transistors are arranged in the voltage stabilizing module, and the output voltage of the low-dropout voltage stabilizer is fed back to the voltage followers. And the plurality of voltage followers control the parasitic capacitors in the corresponding power transistors to charge or discharge based on the output voltage, so that the output voltage is stabilized. According to the voltage stabilizer, the power transistor is divided into multiple parts, the voltage follower arranged in the voltage stabilizing module has push-pull capacity, the transient response speed of the voltage stabilizer is increased, the power supply rejection ratio is improved, the reaction efficiency of the voltage stabilizer is improved, and the performance of the voltage stabilizer is also improved.

The invention provides a digital LDO (Low Dropout Regulator) control circuit and electronic equipment, which are characterized in that a bidirectional shift register, a switch array, a feedback module and a control circuit are electrically connected in sequence, and the control circuit is coupled to the bidirectional shift register, so that the feedback module is used for monitoring the output voltage of the digital LDO circuit in real time; the control circuit judges whether the output voltage of the digital LDO circuit is within the output voltage range or not and controls the enabling and shifting direction of the bidirectional shifting register according to the judgment result so as to control the output state of the bidirectional shifting register, and the switch array controls the number of switches conducted in the switch array according to the output state of the bidirectional shifting register so as to control the output state of the bidirectional shifting register. Therefore, the output voltage of the digital LDO circuit is controlled.

Circuits, systems, and methods relating to a digital low-dropout voltage regulator (DLVR) are provided. In an embodiment, a driver array of a DLVR is configured to output a voltage supply to a load, and an analog-to-digital converter is configured to compare the voltage supply to a reference voltage to determine a difference in voltage level between the voltage supply and the reference voltage. A digital controller is connected to the analog-to-digital converter and configured to modulate a gate voltage supplied to the driver array based on the difference in voltage level. Additionally, a duty cycle control module is configured to modify the duty cycle of the gate voltage supplied to the driver array.

The invention discloses an LDO (Low Dropout Regulator) circuit with a dynamic load compensation function, which relates to the technical field of power management, and is characterized by comprising an error amplifier, a power tube M1, a feedback circuit and a dynamic load compensation circuit, the power tube M1 is a P-type field effect transistor; the feedback circuit detects the output voltage and feeds the output voltage back to the error amplifier; and the dynamic load compensation circuit is connected with the drain electrode of the power tube M1 and is used for sensing the change of the output voltage VOUT and adjusting the driving current I0 output by the drain electrode of the power tube M1 according to the change of the output voltage VOUT. According to the LDO circuit, the output current of the power tube is dynamically adjusted through the dynamic load compensation circuit, then the output voltage is adjusted, the dynamic load compensation circuit during transient response simulation can effectively reduce the response recovery time of the output voltage during transient change of the current load, and therefore the LDO circuit can stably and efficiently operate.

The invention discloses an LDO (Low Dropout Regulator) circuit based on current feedback, which comprises a transconductance amplifier for amplifying reference voltage into current and inputting the current into a positive phase input end of an error transresistance amplifier; the error transimpedance amplifier, the buffer, the second PMOS transistor, the first PMOS transistor and the current-current feedback network form an error current feedback loop, the negative phase input end of the error transimpedance amplifier receives feedback current from the current-current feedback network, and the output end of the error transimpedance amplifier outputs error voltage; the buffer receives the error voltage output by the error trans-impedance amplifier, generates a buffer stage output voltage and drives the second PMOS tube to generate an output voltage; the first PMOS transistor is used for detecting fluctuation of output voltage, if the output voltage fluctuates, current flowing through the first PMOS transistor changes, the current-current feedback network generates feedback current according to the current change of the first PMOS transistor, the feedback current is input to the negative phase input end of the error trans-impedance amplifier, and fluctuation of the output voltage is counteracted.

A low dropout regulator includes output terminal circuit and amplifier. The output terminal circuit is configured to generate output voltage according to input voltage and is configured to generate feedback voltage according to the output voltage. The amplifier is configured to generate control voltage to the output terminal circuit according to reference voltage and the feedback voltage, so as to adjust the output voltage, wherein the amplifier includes input stage circuit, current mirror circuit and filter circuit. The input stage circuit is configured to receive the reference voltage and the feedback voltage to generate a differential output. The filter circuit is configured to filter the input voltage to generate dependent current related to noise of the input voltage on the current mirror circuit, wherein the current mirror circuit is configured to output the control voltage according to the differential output and the dependent current.

The invention relates to a method and a circuit system for regulating power supply by using a low dropout regulator, the method comprising: monitoring a voltage level by a power detector: detecting the voltage level according to a predetermined first voltage level as a high voltage and a second voltage level as a medium voltage, the high voltage being powered on first and the medium voltage being powered on later; performing a bias shift and a fixed bias mechanism according to the detected voltage level; adjusting the output voltage according to the feedback loop by using the actual output voltage of the source follower and the predetermined safety voltage as the reference; the bias voltage shifting mechanism is executed when the high voltage is detected during the initial power-on period of the high-voltage rail and comprises the steps of conducting the high-voltage protection circuit, reducing the actual bias voltage to counteract the required high bias voltage and applying the actual bias voltage to the feedback system; the fixed bias mechanism is performed when the high voltage is detected, including opening the overvoltage protection circuit, applying a fixed reference voltage to an actual gate of a source follower of the feedback system, so that the feedback system is instantaneously started together with the medium voltage when started.

The invention discloses an automatic two-way transmission and level conversion buffer circuit applied to a Flash chip. The automatic two-way transmission and level conversion buffer circuit comprises an LDO (Low Dropout Regulator) circuit, a direction control buffer circuit and an automatic direction buffer circuit, the input end of the LDO circuit inputs a VIN signal and an EN enable signal respectively, and the LDO circuit provides voltage for other chips or internal circuits according to the VIN signal and the EN enable signal; an EN enable signal and a DIR selection signal are input into the control end of the buffer circuit for controlling the direction, and switching and switching of forward transmission and reverse transmission of signals input into the buffer circuit for controlling the direction are controlled through the EN enable signal and the DIR selection signal. An EN enable signal is input into the control end of the automatic direction buffer circuit, and level conversion of two input ports of the automatic direction buffer circuit is controlled through the EN enable signal; compatibility of the Flash chip to different SPI protocols and different voltage domains are met, interference of power supply noise to an internal chip is effectively restrained, and control over the transmission direction of transmission signals is achieved.

The invention relates to the technical field of solar storage battery control, in particular to an LDO (Low Dropout Regulator) voltage dynamic regulation system based on current and temperature feedback, which comprises an LDO module, a feedback regulation module, a current feedback module, a temperature feedback module and an MCU (Microprogrammed Control Unit), the feedback regulation module comprises a resistor R1, a resistor R2, a capacitor Cv and an MOS tube Qv; the capacitor Cv is connected with a drain electrode of the MOS tube Qv and a feedback loop of the LDO module; the grid electrode of the MOS tube Qv is connected with the MCU unit; the current feedback module comprises a detection resistor Rs and an amplification processing unit connected with the MCU unit; the temperature feedback module is connected with the MCU unit; the MCU unit outputs PWM signals with different duty ratios to a grid electrode of the MOS tube Qv according to a first signal of the current feedback module and a second signal of the temperature feedback module; the voltage is automatically adjusted, stable power supply is maintained, and the reliability and efficiency of the system are improved.

The invention discloses an LED backlight driving system. The LED backlight driving system comprises a controller and a plurality of LED driving chips, each LED driving chip is provided with a high-voltage driving input pin and a low-voltage driving input and output pin, and a high-voltage LDO (Low Dropout Regulator) module is also arranged in each LED driving chip; a high-voltage driving input pin of the first LED driving chip closest to the controller in the serial communication link is connected with an external high-voltage driving power supply, and an LDO module in the first LED driving chip converts high-voltage driving voltage of the external high-voltage driving power supply into low-voltage driving voltage used for driving internal circuits of the LED driving chips; the low-voltage driving input and output pins of all the LED driving chips are connected to the same driving voltage transmission line, and an external isolation capacitor is arranged between the driving voltage transmission line and the low-potential reference level.

The invention discloses an LDO (Low Dropout Regulator) with a load transient response enhancement circuit and electronic equipment, and belongs to the technical field of integrated circuits. The circuit comprises an error amplifier, a buffer, a power tube, a feedback circuit, a compensation circuit and an LTRE module. The output end EAO of the error amplifier is connected with the grid electrode of the power tube through the buffer, the error amplifier compares reference voltage with feedback voltage, an EAO signal adjusts the conduction degree of the power tube, and the output voltage of the LDO is kept stable; the compensation circuit comprises an NMOS tube and a capacitor. The grid of the NMOS tube is connected with the input end of the buffer, the drain is connected with one end of the capacitor, and the source is grounded; the other end of the capacitor is connected with the EAO; one end of a delay circuit in the LTRE module is connected with the input end of the buffer, and the other end of the delay circuit is connected with the grid electrode of the NMOS tube, so that the grid electrode voltage is delayed to rise when the buffer voltage rises. The circuit has the advantages of low working voltage, low voltage drop and low static power consumption, and the transient response can be enhanced when the load current is increased or decreased.

The embodiment of the utility model provides a low-dropout linear voltage regulator and a power supply management circuit, which are used for solving the technical problems of complex circuit structure and high power consumption in the technical scheme that the conventional low-dropout linear voltage regulator improves a power supply rejection ratio by copying input ripples at a grid electrode of a power transistor. The low dropout linear regulator comprises an input voltage end, an output voltage end, a band-gap reference source, a resistance feedback network, an error amplifier, an impedance attenuation buffer and a power transistor. According to the differential pressure linear voltage regulator, the impedance attenuation buffer which is simple in circuit structure and low in power consumption is adopted, high-frequency ripple waves, low-frequency ripple waves and noise in control signals are suppressed in a forward attenuation mode, smooth processing of the control signals is achieved, and low ripple waves and high precision of output voltage are ensured. The low-dropout linear regulator is simple in circuit structure and low in power consumption, the power consumption is reduced, the value of the power supply rejection ratio (PSRR) of the low-dropout linear regulator is remarkably increased within the broadband range, and the suppression capacity of power supply noise is enhanced.

A digital low dropout regulator (LDO) for receiving a reference voltage and generating an output voltage comprising a comparison circuit configured to receive the reference voltage, receive a feedback voltage, the feedback voltage being dependent on the output voltage, compare the reference voltage and the feedback voltage, and generate an error signal that is dependent on the comparison between the reference voltage and the feedback voltage, a first digital to analog converter configured to be operable in a panic mode in which the first digital to analog converter is configured to receive the error signal, generate a first DAC code signal based on the error signal for a first time period, the output voltage being dependent on the first DAC code signal, and calculate a mean value of the generated first DAC code signal during at least a portion of the first time period, and set the first DAC code signal to the mean value as calculated, a panic circuit configured to detect when the feedback voltage exceeds a first threshold value or falls below a second threshold value, and control the first digital to analog converter to operate in the panic mode when the feedback voltage exceeds the first threshold value or falls below the second threshold value.

The multifunctional control circuit comprises an FPGA (Field Programmable Gate Array) logic module, an LDO (Low Dropout Regulator) power supply module and a superconducting quantum computing chip which are in communication connection in sequence, the FPGA logic module comprises an AWG waveform memory, an AWG waveform playing controller, a bypass SFDR cancellation module and an RFSoC digital-to-analog conversion module which are in communication connection in sequence along the signal transmission direction, wherein the output end of the RFSoC digital-to-analog conversion module is set as the output end of the FPGA logic module; the FPGA logic module further comprises a clock synchronization module, and the clock synchronization module inputs a clock signal to the RFSoC digital-to-analog conversion module. According to the invention, the XY microwave pulse, the DC Pulse pulse and the DC Offset DC voltage are unified to be generated in the same FPGA and RFSoC architecture, the bypass SFDR cancellation module is added to generate a cancellation signal opposite to the phase of a spurious component, and the method has the advantages of significantly reducing the main spurious component in an output channel and improving the effective signal purity.