95 results about "Low-dropout regulator" patented technology

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

A voltage regulation device includes: a first low-dropout (LDO) regulator, a second LDO regulator and a signal coupling circuit. The first LDO regulator is configured to receive an input voltage of the voltage regulation device and accordingly generate and stabilize an output voltage of the voltage regulation device. The second LDO regulator is coupled in parallel with the first LDO regulator, and configured to provide supplementary regulation to further stabilize the output voltage. The signal coupling circuit is coupled between the first LDO regulator and the second LDO regulator, configured to apply a voltage provided by second LDO regulator to the first LDO regulator, thereby modulating an operation of the first LDO regulator.

Technologies related to transient response of low dropout regulator (LDO) circuits are described. The LDO circuit has a lower standby output voltage and a greater active output voltage. When transitioning to the greater active output voltage, a wakeup circuit controls peak current between voltage supply and LDO output.

In described examples, a low dropout voltage regulator includes an input voltage terminal, a resistive element, first and second transistors, an output terminal, a differential amplifier, and first and second saturation prevention circuits. The resistive element is coupled between the input voltage terminal and a gate of the first transistor. The output terminal is coupled to the drain of the first transistor and the source of the second transistor. A first input of the differential amplifier receives a reference voltage, and a second input is coupled to the output terminal. The first saturation prevention circuit provides a first clamp current to the differential amplifier output if the gate-source voltage of the first transistor is less than a first threshold voltage. The second saturation prevention circuit provides a second clamp current to the differential amplifier output if the gate-source voltage of the second transistor is greater than a second threshold voltage.

This disclosure is directed to a hybrid low dropout voltage regulator circuit, hereinafter referred to as the LDO, including a flipped voltage follower (FVF), coarse grain voltage adjustment circuitry, and fine grain voltage adjustment circuitry. The LDO may provide an output voltage based on receiving a reference voltage. The flipped voltage follower may supply the output voltage to one or more other electronic circuits. The coarse grain voltage adjustment circuitry and the fine grain voltage adjustment circuitry may adjust the output voltage based on a desired voltage level. The LDO may use feedback signals, feedforward signals, or both to provide the output voltage.

The utility model provides a low dropout linear regulator which comprises a multi-output band-gap reference source, a filtering selection circuit and an adjusting output circuit, the multi-output band-gap reference source is used for outputting multiple paths of first reference voltage, and the filtering selection circuit can trigger on-off according to a received selection control signal. And the adjusting output circuit compares the second reference voltage with the output voltage and adjusts the output voltage, so that the output voltage is controlled to be the second reference voltage constantly, and constant-voltage output is realized. According to the low dropout linear regulator, the multi-output band-gap reference source, the filtering selection circuit and the adjusting output circuit are arranged, so that multi-gear adjustable, stable and low-noise direct-current voltage can be output, a high power supply rejection ratio is achieved, and the power supply requirements of different circuit modules or application scenes are met.

An integrated circuit includes a first temperature-sensitive device configured to generate a first voltage, a second temperature-sensitive device configured to generate a second voltage, and an output terminal configured to generate a reference voltage which is a summation of the first voltage and the second voltage. The first voltage monotonically increases with an absolute temperature. The second voltage monotonically decreases with the absolute temperature. In the integrated circuit, a low-dropout regulator has a first input connected to the output terminal and an output connected to the gate of a power regulating transistor. The channel of the power regulating transistor is connected between a first terminal configured to receive a first supply voltage and a second terminal configured to generate a second supply voltage.

The invention provides a low dropout regulator. The low dropout regulator comprises an amplifier circuit, an equalizer circuit, a compensation capacitor, a discharge circuit and a detection circuit. The amplifier circuit operates between a first supply voltage and a second supply voltage, and includes a differential input pair having a first stage input circuit and a second stage input circuit. The amplifier circuit is configured to generate an output voltage according to an input voltage and a reference voltage. The equalizer circuit is coupled between two intermediate nodes spliced by the first stage input circuit and the second stage input circuit, and is configured to be short-circuited under the control of a control signal. The discharge circuit is configured to be controlled by the control signal to lower the common mode voltage of the common end of the differential input pair. The detection circuit is configured to generate a control signal according to a node voltage of one of the two intermediate nodes.

Power amplifier circuitry is disclosed having an inverse Class-D amplifier functioning as a power amplifier and self-biasing circuitry generating gate bias voltages for switching type power transistors within the power amplifier. The self-biasing circuitry includes a low-dropout regulator that generates and applies a gate bias voltage in response to a feedback current scaled according to the power amplifier's operating current. A current-based digital-to-analog converter is configured to generate the reference current based on a received digital value. Additionally, a digital processor is configured to generate the digital value in response to the gate bias voltage. The power amplifier circuitry enhances performance and efficiency while ensuring precise control over power transistors'operation, offering advantages for various applications requiring radio frequency signal amplification.

A low drop-out (LDO) regulator includes an NMOS transistor having one of a source and drain terminal configured to be coupled to a voltage supply and the other of the source and drain terminal coupled to the low drop out voltage regulator output. A gate driver for the LDO regulator includes a boost converter having a boost converter input configured to be coupled to a boost converter reference voltage, a boost converter output configured to output a boosted voltage greater than the boost converter reference voltage and the voltage supply; and a boost converter clock input configured to receive a clock signal. The gate driver further includes a notch filter having a notch filter input coupled to the boost converter output and a notch filter output coupled to the gate driver output.

A current measurement system for a digital low dropout regulator (LDO) for receiving a reference voltage and generating an output voltage, the output voltage of the digital LDO being dependent on a first DAC code signal, the current measurement system comprising a current determination unit configured to receive the first DAC code signal, and generate an output current signal using the first DAC code signal.

The invention discloses an optical IO core particle-oriented quick response digital low-dropout voltage stabilizer, which comprises a voltage difference calculation logic unit used for calculating a voltage difference between an output voltage of a power tube and a reference voltage; the parameter generation logic is used for acquiring an optimal algorithm tuning parameter of the system according to the genetic algorithm; the feedback logic is used for generating feedback control quantity of the voltage control loop according to PID tuning of the voltage error quantity; the first summator is used for summing and generating the total feedback control quantity of the voltage control loop; the feed-forward logic is used for generating a feed-forward control quantity of the current control loop; and the second summator is used for summing the number of the power switches turned on at the current moment t, the total feedback control quantity and the feedforward control quantity to obtain the number of the power switches turned on at the next moment t + 1 so as to control the states of the power switches in the power tube. The invention aims to realize active compensation of load current fluctuation before significant voltage drop and realize excellent voltage regulation performance.

The application discloses an output circuit with multi-level output and a comparison circuit thereof. The output circuit includes a comparison circuit, a voltage conversion circuit and a signal output circuit. The comparison circuit detects a working mode based on a first power voltage and a second power voltage and generates a first control signal. The voltage conversion circuit adjusts a level of an output voltage from a low dropout regulator according to the first control signal to generate a first voltage, and generates a second voltage according to the first control signal and the first voltage. The signal output circuit adjusts a level of a digital signal according to the first voltage, the second voltage and the first power voltage to generate a digital output signal corresponding to the working mode.

The utility model discloses a circuit utilizing an LDO (Low Dropout Regulator) to turn on or turn off DSP (Digital Signal Processor) power supply in a delayed manner, which comprises a low dropout regulator, and an access circuit, a delayed turn-on circuit and a delayed turn-off circuit are arranged in the low dropout regulator. The circuit overcomes the defect of harmful detonation sound generated when the DSP is turned on and turned off in the prior art, and can realize the control of the delay turn-on and delay turn-off circuit of the vehicle-mounted DSP by utilizing a simple and low-cost circuit, thereby solving the detonation sound caused by the fact that the current vehicle-mounted DSP is turned on when being powered on and turned off when being powered off; according to the circuit, the LDO is utilized, the low dropout regulator is changed to have four pins which are the power input end, the power output end, the grounding end and the enabling end, the power input and output range of the LDO can well meet the requirement of automobile voltage, and in the delay starting circuit, the delay of the starting circuit is flexibly adjusted by setting the configuration values of a resistor and a capacitor.

A low-dropout regulator having an output voltage switching circuit is provided. In the low-dropout regulator, a low-dropout linear regulator circuit outputs a regulating signal according to a voltage difference between a second terminal of a transistor and a regulating threshold voltage signal or a reference voltage. In the low-dropout regulator, a switch error amplifier circuit outputs a pull-up control signal according to a voltage difference between the second terminal of the transistor and a voltage pull-up switching signal. When a voltage selector circuit of the low-dropout regulator selects the regulating signal, the transistor operates to regulate an output voltage of the low-dropout regulator according to the regulating signal. When the voltage selector circuit selects the pull-up control signal, a switch component is turned on by the pull-up control signal such that the output voltage of the low-dropout regulator is directly pulled up by an input voltage.

The invention discloses a low-cost dynamic power control temperature control system based on a PD protocol, which belongs to the technical field of x, and comprises a power supply module used for power supply work of the whole equipment, and a voltage regulation module comprising a PD protocol chip and an LDO (low dropout regulator), the PD protocol chip and the input end of the LDO (low dropout regulator) are connected with the power supply module through the power harness. The TEC module has the beneficial effects that accurate voltage regulation is realized at a power supply source through the PD protocol chip, continuous and stable direct-current voltage is loaded at two ends of the TEC module instead of a PWM (Pulse Width Modulation) high-power switching signal in the prior art, suppression is performed from the root of electromagnetic radiation generation, EMC rectification components such as an electromagnetic shielding cover, a common-mode inductor and a filter capacitor do not need to be additionally arranged, and the cost is reduced. Therefore, the harsh electromagnetic compatibility test requirement can be easily met, the compliance cost and the design period of the product are greatly reduced, and the long-standing EMC design difficulty in the industry is solved.

Technologies related to transient response of low dropout regulator (LDO) circuits are described. The LDO circuit has a lower standby output voltage and a greater active output voltage. When transitioning to the greater active output voltage, a wakeup circuit controls peak current between voltage supply and LDO output.

Systems and methods for pin lift detection compensation in Low Dropout (LDO) regulators. In an illustrative, non-limiting embodiment, a System-On-Chip (SoC) may include: a circuit; and an LDO regulator coupled to the circuit, where the LDO includes a transistor having a first terminal coupled to a first voltage rail and a second terminal coupled to the circuit, where the second terminal is configured to receive a probe current produced from a second voltage rail, and where the first voltage rail is coupled to a compensating current source configured to draw a compensating charge equal to or greater than a charge imparted upon the second terminal by the probe current.

A process for regulating power supply using a low-dropout regulator may include detecting voltage levels based on a predetermined first voltage level as high voltage and a second voltage level as medium voltage, wherein the high voltage is powered up followed by the medium voltage; a shifting bias mechanism when high voltage is detected during the initial power up of the high voltage rail, including turning on the overvoltage protection circuit, lowering actual bias voltage to counter back the required high bias voltage, and applying the actual bias voltage for a feedback system; performing the fix bias mechanism when medium voltage is detected, including turning off the overvoltage protection circuit and applying a fixed voltage reference to an actual pass gate of source follower for the feedback system enabling an instant startup together with the medium voltage when it powers up.

The invention relates to an electric leakage detection circuit and an electric leakage detection method. The electric leakage detection circuit comprises a voltage control device, a switch module and a processor, the control end of the voltage control device is connected with the to-be-detected shell and the negative electrode of the power source, the first controlled end is connected with the negative electrode of the power source, and the voltage control device is used for controlling the first controlled end and the second controlled end to be switched on under the condition that the control end receives electric leakage voltage; a first port and a second port of the switch module are connected with the positive electrode of the power supply, a third port of the switch module is connected with a second controlled end, and the switch module is used for controlling the second port and the fourth port to be conducted under the condition that the first port and the third port are conducted; the detection end of the processor is connected with the fourth port and the negative electrode of the power supply. The processor is used for carrying out electric leakage detection according to voltage signals received by the detection end. Compared with the technical scheme that devices such as a low dropout regulator, an operational amplifier and an analog-to-digital conversion chip are arranged for electric leakage detection, the circuit structure is simpler, and the circuit cost is lower.

The invention relates to the field of integrated circuit design, in particular to a positive and negative voltage input enabling circuit for a negative voltage LDO (Low Dropout Regulator), which is composed of four PMOS (P-channel Metal Oxide Semiconductor) tubes MP1-MP4, seven NMOS (N-channel Metal Oxide Semiconductor) tubes MN1-MN7, three NOT gates INV1-INV3, a NOR gate NAND1, a resistor R1, a capacitor C1 and a diode D1. According to the invention, the working characteristics of the complementary metal oxide semiconductor are utilized, a negative voltage signal can be used, a positive voltage signal can also be used as an enabling input control signal, and the circuit has the characteristics of clear logic function, simple circuit structure and easy realization.

In an example, a method includes enabling a first voltage supply and a second voltage supply. The method also includes selecting, with a decision comparator, a selected voltage supply from either the first voltage supply or the second voltage supply based on which of the first voltage supply or the second voltage supply ramps up first. The method includes monitoring the selected voltage supply with the decision comparator. The method also includes, responsive to a voltage from the selected voltage supply dropping below a dropout voltage level of a low dropout regulator, switching to an other voltage supply with the decision comparator.

A low dropout regulator (LDO) with over-current protection, and a chip and an electronic device. The LDO comprises an LDO main circuit (100), a high-precision current sampling circuit (200), and an over-current protection control loop (300), wherein an output end of the LDO main circuit (100) is connected to an input end of the high-precision current sampling circuit (200), an output end of the high-precision current sampling circuit (200) is connected to an input end of the over-current protection control loop (300), and an output end of the over-current protection control loop (300) is connected to both the LDO main circuit (100) and the high-precision current sampling circuit (200), so as to form a closed control loop. When the current of a load exceeds a current-limiting value, the LDO can effectively protect a power transistor (MP0) of the LDO main circuit (100) and the load.

Disclosed herein is a dual low-dropout (LDO) regulator system including two LDO regulators sharing a single operational amplifier, configured for switchover operation. The first LDO regulator is supplied from a high-voltage input, while the second is supplied from from a regulated output voltage. Both regulators remain partially active during operation, with the second LDO regulator taking over a majority of the load current when the regulated output voltage reaches sufficient levels. This prevents voltage dips and oscillations commonly seen in traditional two-LDO systems during switchover.

The invention relates to compensation for low dropout voltage regulators. In one form, a low dropout voltage regulator configured to provide a drive signal to adjust an output voltage in response thereto includes an error amplifier, an intermediate amplifier, a buffer amplifier, and a compensation network. The error amplifier has a first input to receive a reference voltage, a second input to receive a feedback signal representative of the output voltage, a first output, and a second output. The intermediate amplifier has a first input coupled to the first output of the error amplifier, a second input coupled to the second output of the error amplifier, and an output. The buffer amplifier has a first input coupled to the output of the intermediate amplifier and an output to provide the drive signal. The compensation network has a first terminal coupled to the first input of the intermediate amplifier and a second terminal coupled to the output of the intermediate amplifier.

The invention relates to a self-biased low-harmonic high-efficiency inverse class-D RF power amplifier circuitry. Power amplifier circuitry is disclosed having an inverse class D amplifier acting as a power amplifier and self-biasing circuitry that generates a gate bias voltage for a switched-mode power transistor within the power amplifier. The self-biasing circuitry includes a low dropout regulator that generates and applies a gate bias voltage in response to a feedback current scaled according to an operating current of the power amplifier. The current-based digital-to-analog converter is configured to generate a reference current based on the received digital value. In addition, a digital processor is configured to generate the digital value in response to the gate bias voltage. The power amplifier circuitry enhances performance and efficiency while ensuring precise control of power transistor operation, providing advantages for various applications requiring radio frequency signal amplification.

Systems and integrated circuits for implementing a low quiescent current low dropout (LDO) regulator are described. The system can include a super follower circuit, a current limit circuit, and an LDO core circuit. The super follower circuit is configured to supply a first current. The current limit circuit is configured to receive a system input voltage and provide a second current. The LDO core circuit is coupled to the super follower circuit and the current limit circuit. The LDO core circuit is configured to receive the first current from the super follower circuit and the second current from the current limit circuit. The LDO core circuit is configured to supply a system output voltage at a system output node and regulate the system output voltage at the system output node. The LDO core circuit can include a feed forward capacitor connected between the system output node and a feedback node.

An apparatus, including: an upper voltage rail; a lower voltage rail; a low dropout (LDO) voltage regulator configured to generate a regulated output voltage at an output coupled between the upper voltage rail and the lower voltage rail while transferring noise from the upper voltage rail to the output; and an auxiliary noise suppression circuit configured to transfer noise from the upper voltage rail to the output of the LDO voltage regulator with a phase substantially opposite to a phase of the noise transferred to the output by the LDO voltage regulator such that noise suppression or reduction occurs at the output of the LDO voltage regulator.

A dynamic response test system for a low dropout regulator is characterized in that the dynamic performance test system for the low dropout regulator is composed of a standard instrument group, a test board and a main control computer, and the instrument group comprises two programmable direct-current power supplies, a signal generator, an electronic load and an oscilloscope. The test board carries a tested low dropout linear regulator and necessary peripheral circuits thereof, and carries two functional circuits, all instruments are communicated with the main control computer through network ports, the test process is uniformly controlled by the main control computer, and the main control computer completes data reading, display, determination and storage functions.

The utility model relates to the technical field of vehicle-mounted power supply, and discloses a power supply diagnosis circuit and a power supply circuit with an external active antenna, and the power supply diagnosis circuit comprises a low-dropout voltage stabilizer which is used for supplying power to a load through voltage conversion, monitoring an output current, and determining a level state of a state error reporting pin according to a current monitoring result; a first pin of the first enabling module is connected with an enabling pin of the low-dropout voltage stabilizer, a second pin of the first enabling module is connected with a state error reporting pin of the low-dropout voltage stabilizer, and the first enabling module is used for adjusting the level state of the enabling pin according to the level state of the state error reporting pin, so that the low-dropout voltage stabilizer conducts or cuts off power supply to the load according to the level state. According to the low-dropout voltage stabilizer, the working characteristics of the low-dropout voltage stabilizer are matched with an external self-built circuit, so that load state judgment can be realized through current monitoring, the condition of voltage intersection is avoided, the accuracy of load state judgment is improved, an abnormal state can be quickly responded, and a circuit which is turned off in case of overcurrent is realized.