227 results about "Low-dropout regulator" patented technology

The invention discloses a dual-redundancy servo controller and a main-standby autonomous switching method thereof, and belongs to the technical field of electric servo control. The controller comprises a host machine and a standby machine; each of the host and the standby machine comprises a DSP (Digital Signal Processor), an FPGA (Field Programmable Gate Array), a hardware ID (Identity) identification module, a motor power driving IPM (Intelligent Power Module) and a generator tripping instruction module which are in signal connection; the DSP and the FPGA are respectively connected with an LDO (Low Dropout Regulator) power module; the FPGA is in communication connection with the control system; the motor power driving IPM is connected with the execution mechanism; the DSP processors of the host and the standby machine are in signal connection; and the switching instruction modules of the host and the standby are in signal connection. The invention discloses a main / standby autonomous switching method for a dual-redundancy servo controller, which adopts a DSP and an FPGA to cooperatively detect and process faults, improves the fault detection rate by 5%, and reduces the possibility that the output of an IPM module is not turned off by 20% when a fault occurs; three heterogeneous redundant generator tripping modes of hardware generator tripping, serial port generator tripping and heartbeat generator tripping are adopted, and the reliability of main and standby independent generator tripping is improved by 20%.

The invention relates to the technical field of chip detection, and discloses a high-reliability power supply chip circuit fault detection system, which comprises a built-in self-test architecture integrated in a low dropout regulator chip, and the built-in self-test architecture is provided with a first test mode and a second test mode which are switched based on a mode switching control circuit. The detection module is used for detecting key performance parameters of an error amplifier sub-circuit in a low dropout linear regulator chip, the detection module is used for measuring the direct current loop gain, the offset voltage, the common mode rejection ratio and the power supply ripple rejection ratio of the amplifier in the first test mode, and the detection module is used for measuring the unity gain bandwidth of the amplifier in the second test mode. According to the invention, through the design of a built-in self-test architecture and two test modes, abnormal states such as differential circuit imbalance and feedback loop fault can be identified in a bare chip stage, chips with poor performance are rejected in advance, and the LDO chip is ensured to reach a ppb-magnitude high reliability standard.

The invention discloses a low dropout regulator with an output voltage switching circuit. The low-dropout linear voltage stabilizing circuit outputs a voltage stabilizing signal according to the voltage difference between the voltage of the second end of the transistor and the voltage of a voltage stabilizing critical voltage signal or the voltage difference between the voltage of the second end of the transistor and a reference voltage. The switch error amplification circuit outputs a pull-up control signal according to the difference between the voltage of the second end of the transistor and the voltage of a voltage pull-up switching signal. When the voltage selection circuit selects the voltage stabilization signal, the transistor operates according to the voltage stabilization signal to adjust the output voltage of the low dropout regulator. When the voltage selection circuit selects the pull-up control signal, the switch assembly is turned on according to the pull-up control signal, so that the input voltage directly pulls up the output voltage of the low dropout regulator.

Techniques are described herein for regulating output voltage using a low-dropout (LDO) voltage regulator. In an example, an LDO voltage regulator circuit includes a pass circuit that is driven or otherwise controlled by a first buffer circuit, and a sense circuit that is driven or otherwise controlled by a second buffer circuit. The pass circuit is configured to pass current from a voltage supply terminal to an output voltage terminal, responsive to a first control signal. The sense circuit is configured to sense the current passed by the pass circuit, responsive to a second control signal. The first buffer circuit is configured to provide the first control signal to the pass circuit, responsive to a third control signal, and the second buffer circuit is configured to provide the second control signal to the pass circuit, also responsive to the third control signal.

Circuits and methods that limit current through power FETs of power converter to reduce damaging current in-rush events, independent of switching frequency, device mismatches, and PVT variations. Embodiments utilize a closed-loop feedback circuit and / or a calibrated compensation circuit to regulate, substantially independent of frequency, the control voltage VGATE applied to a power FET gate. In a reduced gate-drive mode, connecting a feedback or compensation circuit to the gate of an LDO source-follower FET allows the gate voltage to be regulated to control the LDO output voltage to a final inverter coupled to the gate of a power FET so that VGATE is adjusted to provide a reduced gate-drive to the power FET; connecting to the output of the LDO allows the LDO output voltage to the final inverter to be directly regulated to adjust VGATE; connecting to the gate of the power FET allows VGATE to be directly set.

The invention belongs to the technical field of new energy automobile lithium battery thermal runaway early warning, and particularly discloses a lithium battery thermal runaway gas early warning system. The method is used for solving the problem that thermal runaway cannot be rapidly and accurately detected and early warning cannot be carried out in advance in the existing monitoring technology. The early warning system comprises a main control unit, a core processing unit, a graphical user interface, a dual-frequency driving signal generation circuit, a spectral signal dual-frequency demodulation circuit, a temperature control circuit, a constant current source and overcurrent protection circuit, a spectral data acquisition circuit, a graphical user interface, an optical system, a gas sampling device and an early warning model. The power supply of the early warning system adopts a three-stage voltage reduction design, and comprises an AC-DC switching power supply, a DC-DC switching power supply and a low dropout regulator. Based on the off-axis integral cavity optical path coupling technology of the double-optical wedge group, the light beam angle is accurately adjusted through the double optical wedges of the stepping motor, a beam combiner does not need to be used, and the light energy utilization rate and the detection sensitivity are improved.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

An overshoot protection circuit, a method, and a chip. The overshoot protection circuit includes: a low drop regulator (LDO), a reference source circuit, a switching controller, and a rough reference voltage generation circuit. The switching controller is configured to control the LDO to be connected to the rough reference voltage generation circuit in a first stage of power supply signal change, connected to the reference source circuit in a second stage of power supply signal change. The rough reference voltage generation circuit is configured to generate a first preset reference voltage, and the reference source circuit is configured to generate a second preset reference voltage; in the first stage, the switching controller is configured to electrically connect the LDO to the first preset reference voltage; in the second stage, the switching controller is configured to electrically connect the LDO to the second preset reference voltage.

The invention provides a low dropout regulator with an off-chip capacitor and a power supply, the low dropout regulator comprises a bias module, a control voltage generation module and a voltage stabilization module, the input end of the control voltage generation module is connected with a reference voltage, and a stable control voltage is generated through dynamic adjustment of a negative feedback structure; the voltage stabilizing module provides voltage for the output end of the low-dropout voltage stabilizer based on the control voltage, a plurality of voltage followers and a plurality of power transistors are arranged in the voltage stabilizing module, and the output voltage of the low-dropout voltage stabilizer is fed back to the voltage followers. And the plurality of voltage followers control the parasitic capacitors in the corresponding power transistors to charge or discharge based on the output voltage, so that the output voltage is stabilized. According to the voltage stabilizer, the power transistor is divided into multiple parts, the voltage follower arranged in the voltage stabilizing module has push-pull capacity, the transient response speed of the voltage stabilizer is increased, the power supply rejection ratio is improved, the reaction efficiency of the voltage stabilizer is improved, and the performance of the voltage stabilizer is also improved.

Circuits, systems, and methods relating to a digital low-dropout voltage regulator (DLVR) are provided. In an embodiment, a driver array of a DLVR is configured to output a voltage supply to a load, and an analog-to-digital converter is configured to compare the voltage supply to a reference voltage to determine a difference in voltage level between the voltage supply and the reference voltage. A digital controller is connected to the analog-to-digital converter and configured to modulate a gate voltage supplied to the driver array based on the difference in voltage level. Additionally, a duty cycle control module is configured to modify the duty cycle of the gate voltage supplied to the driver array.

A low dropout regulator includes output terminal circuit and amplifier. The output terminal circuit is configured to generate output voltage according to input voltage and is configured to generate feedback voltage according to the output voltage. The amplifier is configured to generate control voltage to the output terminal circuit according to reference voltage and the feedback voltage, so as to adjust the output voltage, wherein the amplifier includes input stage circuit, current mirror circuit and filter circuit. The input stage circuit is configured to receive the reference voltage and the feedback voltage to generate a differential output. The filter circuit is configured to filter the input voltage to generate dependent current related to noise of the input voltage on the current mirror circuit, wherein the current mirror circuit is configured to output the control voltage according to the differential output and the dependent current.

The invention relates to a method and a circuit system for regulating power supply by using a low dropout regulator, the method comprising: monitoring a voltage level by a power detector: detecting the voltage level according to a predetermined first voltage level as a high voltage and a second voltage level as a medium voltage, the high voltage being powered on first and the medium voltage being powered on later; performing a bias shift and a fixed bias mechanism according to the detected voltage level; adjusting the output voltage according to the feedback loop by using the actual output voltage of the source follower and the predetermined safety voltage as the reference; the bias voltage shifting mechanism is executed when the high voltage is detected during the initial power-on period of the high-voltage rail and comprises the steps of conducting the high-voltage protection circuit, reducing the actual bias voltage to counteract the required high bias voltage and applying the actual bias voltage to the feedback system; the fixed bias mechanism is performed when the high voltage is detected, including opening the overvoltage protection circuit, applying a fixed reference voltage to an actual gate of a source follower of the feedback system, so that the feedback system is instantaneously started together with the medium voltage when started.

The invention relates to the technical field of solar storage battery control, in particular to an LDO (Low Dropout Regulator) voltage dynamic regulation system based on current and temperature feedback, which comprises an LDO module, a feedback regulation module, a current feedback module, a temperature feedback module and an MCU (Microprogrammed Control Unit), the feedback regulation module comprises a resistor R1, a resistor R2, a capacitor Cv and an MOS tube Qv; the capacitor Cv is connected with a drain electrode of the MOS tube Qv and a feedback loop of the LDO module; the grid electrode of the MOS tube Qv is connected with the MCU unit; the current feedback module comprises a detection resistor Rs and an amplification processing unit connected with the MCU unit; the temperature feedback module is connected with the MCU unit; the MCU unit outputs PWM signals with different duty ratios to a grid electrode of the MOS tube Qv according to a first signal of the current feedback module and a second signal of the temperature feedback module; the voltage is automatically adjusted, stable power supply is maintained, and the reliability and efficiency of the system are improved.

The invention discloses an LDO (Low Dropout Regulator) with a load transient response enhancement circuit and electronic equipment, and belongs to the technical field of integrated circuits. The circuit comprises an error amplifier, a buffer, a power tube, a feedback circuit, a compensation circuit and an LTRE module. The output end EAO of the error amplifier is connected with the grid electrode of the power tube through the buffer, the error amplifier compares reference voltage with feedback voltage, an EAO signal adjusts the conduction degree of the power tube, and the output voltage of the LDO is kept stable; the compensation circuit comprises an NMOS tube and a capacitor. The grid of the NMOS tube is connected with the input end of the buffer, the drain is connected with one end of the capacitor, and the source is grounded; the other end of the capacitor is connected with the EAO; one end of a delay circuit in the LTRE module is connected with the input end of the buffer, and the other end of the delay circuit is connected with the grid electrode of the NMOS tube, so that the grid electrode voltage is delayed to rise when the buffer voltage rises. The circuit has the advantages of low working voltage, low voltage drop and low static power consumption, and the transient response can be enhanced when the load current is increased or decreased.

The multifunctional control circuit comprises an FPGA (Field Programmable Gate Array) logic module, an LDO (Low Dropout Regulator) power supply module and a superconducting quantum computing chip which are in communication connection in sequence, the FPGA logic module comprises an AWG waveform memory, an AWG waveform playing controller, a bypass SFDR cancellation module and an RFSoC digital-to-analog conversion module which are in communication connection in sequence along the signal transmission direction, wherein the output end of the RFSoC digital-to-analog conversion module is set as the output end of the FPGA logic module; the FPGA logic module further comprises a clock synchronization module, and the clock synchronization module inputs a clock signal to the RFSoC digital-to-analog conversion module. According to the invention, the XY microwave pulse, the DC Pulse pulse and the DC Offset DC voltage are unified to be generated in the same FPGA and RFSoC architecture, the bypass SFDR cancellation module is added to generate a cancellation signal opposite to the phase of a spurious component, and the method has the advantages of significantly reducing the main spurious component in an output channel and improving the effective signal purity.

A voltage regulation device includes: a first low-dropout (LDO) regulator, a second LDO regulator and a signal coupling circuit. The first LDO regulator is configured to receive an input voltage of the voltage regulation device and accordingly generate and stabilize an output voltage of the voltage regulation device. The second LDO regulator is coupled in parallel with the first LDO regulator, and configured to provide supplementary regulation to further stabilize the output voltage. The signal coupling circuit is coupled between the first LDO regulator and the second LDO regulator, configured to apply a voltage provided by second LDO regulator to the first LDO regulator, thereby modulating an operation of the first LDO regulator.

The invention relates to a regulator circuit, a low dropout regulator and a method for increasing power supply ripple suppression. A regulator circuit includes a first stage, a second stage, and a boost circuit. The first stage includes a reference input and a feedback input configured to receive feedback from an output of the regulator circuit. The second stage is coupled to the first stage. The second stage includes an output transistor configured to drive the output of the regulator circuit. The boost circuit includes a first transistor configured to generate a bias current based on an output current of the output transistor. The boost circuit also includes a current-to-voltage converter configured to generate a bias voltage based on the bias current, and a capacitive element coupled between the current-to-voltage converter and a node of the first stage.

The utility model discloses a high-voltage-difference, high-efficiency, wide-current and low-quiescent-current circuit, and relates to the technical field of circuit control, the circuit is externally connected with an input voltage and comprises a low-power-consumption voltage stabilizing circuit, a switch voltage stabilizing circuit, a change-over switch circuit and a comparison circuit, the input voltage supplies power to the VIN end of the low-power-consumption voltage stabilizing circuit and the VIN end of the switch voltage stabilizing circuit, and the comparison circuit supplies power to the VIN end of the change-over switch circuit. The input end of the comparison circuit is connected with a reference voltage and a thermistor, the output end of the comparison circuit is connected with the enabling end of the switch voltage stabilizing circuit, the output end of the switch voltage stabilizing circuit and the output end of the low-power-consumption voltage stabilizing circuit are connected with a change-over switch circuit, and the output end of the change-over switch circuit serves as the total output end of the circuit. The working mode of the LDO (low dropout regulator) can be controlled through hardware lap joint and temperature induction, and the low dropout regulator has the advantages of being high in safety, easy to operate and high in reliability.

The invention relates to the technical field of semiconductor integrated circuits, in particular to a high-voltage LDO (Low Dropout Regulator) power supply circuit which comprises an output Vout, an overshoot optimization module, an MOS (Metal Oxide Semiconductor) tube MP2 and a transient optimization module, the transient optimization module comprises a transconductance amplifier A2, a capacitor C3, a comparator A3, a transient suppression sub-module and a transient recovery sub-module; one end of the capacitor C3 is connected to the output Vout; the other end of the capacitor C3 is connected to the positive input end of the transconductance amplifier A2; the output end of the transconductance amplifier A2 is connected with the positive input end of the comparator A3; the negative input end of the transconductance amplifier A2 is grounded; the negative input end of the comparator A3 is connected with reference current Iref; the input end of the transient suppression sub-module and the input end of the transient recovery sub-module are respectively connected with the output end of the comparator A3; the output end of the transient suppression sub-module and the output end of the transient recovery sub-module are respectively connected with the grid electrode of the MOS tube MP2; and the transient response performance and reliability are improved.

A low dropout regulator (LDO) includes a bias circuit including a first transistor, a second transistor, and a bias resistor, where a gate of the second transistor is coupled to a drain of the first transistor, and a difference between gate-source voltages of the first transistor and the second transistor generates a bias current on the bias resistor, the bias circuit is further configured to generate a first bias voltage based on the bias current; the output stage circuit comprises a power transistor and a feedback circuit, and the output voltage of the low dropout regulator is output from the drain electrode of the power transistor; the feedback circuit is coupled between the grid electrode and the drain electrode of the power transistor and is configured to change the grid electrode voltage of the power transistor in the same direction according to the change of the output voltage; and the feedback circuit receives the first bias voltage and generates an output voltage based on the first bias voltage. Therefore, stable power supply voltage can be provided at low cost.

Technologies related to transient response of low dropout regulator (LDO) circuits are described. The LDO circuit has a lower standby output voltage and a greater active output voltage. When transitioning to the greater active output voltage, a wakeup circuit controls peak current between voltage supply and LDO output.

A buck converter including: a first switching element connecting an input voltage node to a switching node; a second switching element connecting the switching node to a ground node; a low drop out (LDO) voltage regulator connected to the input voltage node; a pulse width modulation (PWM) controller configured to receive a mode signal indicating an operation mode and toggle, in response to the mode signal, a first control signal for turning on the first switching element or a second control signal for turning on the second switching element; a bootstrap charger configured to receive the mode signal and toggle, in response to the mode signal, a third control signal for turning on the second switching element; and a bootstrap capacitor connecting an output node of the LDO voltage regulator to the switching node.

The invention provides a low dropout regulator with fine loop presetting. The low dropout regulator includes a coarse resolution regulator and a fine resolution regulator. The coarse resolution regulator adjusts the digital control value in response to the output transient to control the coarse output driver to adjust the output voltage at the coarse resolution. The coarse resolution regulator finally enters a limited cyclic oscillation mode at a corresponding duty ratio. The fine resolution regulator is deactivated when the digital control value initially changes, and the duty cycle based on the digital control value is preset when in the limited cycle oscillation mode. And after being preset, are reactivated to drive at least one fine output driver to adjust the output voltage at a fine resolution. When turned on after the output load transient, the presetting provides a closer estimate of the supplemental current required to meet the output load level to achieve a smaller output ripple voltage.

The invention provides an HUD self-locking and ultra-low power consumption standby current control circuit which comprises an automobile storage battery, an MCU, an automobile regulation level low dropout regulator LDO, an ignition signal detection circuit, a triode Q2 and a CANINH signal end, the automobile storage battery outputs 12V voltage to the input end of the LDO, the output end of the LDO is connected with the MCU so as to provide 3.3 V working voltage, the MCU is connected with the triode Q2, the ignition signal detection circuit is connected with the triode Q2, and the CANINH signal end is connected with the triode Q2. The input end of the ignition signal detection circuit is connected with an ignition signal IGN +, the output end of the ignition signal detection circuit is connected with the enabling end EN of the LDO, the CANINH signal end is connected with the enabling end EN of the LDO, the collector electrode of the triode Q2 is connected with the enabling end EN of the LDO, the base electrode of the triode Q2 is connected with the MCU-OFF / ON pin of the MCU through a base electrode current-limiting resistor, and the output end of the triode Q2 is connected with the MCU-OFF / ON pin of the MCU. The problem that an existing power supply control circuit cannot meet the self-locking requirement can be solved.

The invention provides an LDO overshoot and undershoot suppression circuit, and belongs to the field of integrated circuits. The LDO overshoot and undershoot suppression circuit comprises an LDO used for providing a stable output voltage; the overshoot suppression circuit is used for suppressing overshoot of the LDO; the undershoot suppression circuit is used for suppressing the undershoot of the LDO; the overshoot suppression circuit comprises a first comparator and a fifth transistor, the inverting input end of the first comparator is electrically connected with the output end of the LDO, the non-inverting input end of the first comparator is connected with a first reference voltage, and the output end of the first comparator is electrically connected with the grid electrode of the fifth transistor. The undershoot suppression circuit comprises a second comparator, a first transistor, a second transistor and a third transistor, the non-inverting input end of the second comparator is connected with a second reference voltage, the inverting input end of the second comparator is electrically connected with the output end of the LDO, and the output end of the second comparator is electrically connected with the grid electrode of the first transistor. According to the LDO overshoot and undershoot suppression circuit, LDO overshoot and undershoot can be suppressed.

In described examples, a low dropout voltage regulator includes an input voltage terminal, a resistive element, first and second transistors, an output terminal, a differential amplifier, and first and second saturation prevention circuits. The resistive element is coupled between the input voltage terminal and a gate of the first transistor. The output terminal is coupled to the drain of the first transistor and the source of the second transistor. A first input of the differential amplifier receives a reference voltage, and a second input is coupled to the output terminal. The first saturation prevention circuit provides a first clamp current to the differential amplifier output if the gate-source voltage of the first transistor is less than a first threshold voltage. The second saturation prevention circuit provides a second clamp current to the differential amplifier output if the gate-source voltage of the second transistor is greater than a second threshold voltage.

This disclosure is directed to a hybrid low dropout voltage regulator circuit, hereinafter referred to as the LDO, including a flipped voltage follower (FVF), coarse grain voltage adjustment circuitry, and fine grain voltage adjustment circuitry. The LDO may provide an output voltage based on receiving a reference voltage. The flipped voltage follower may supply the output voltage to one or more other electronic circuits. The coarse grain voltage adjustment circuitry and the fine grain voltage adjustment circuitry may adjust the output voltage based on a desired voltage level. The LDO may use feedback signals, feedforward signals, or both to provide the output voltage.

The present invention proposes a timing controller comprising an eFuse block for generating a final setting value determined according to whether fusing or trimming is performed, and a method for selecting the final setting value. The timing controller comprising the eFuse block comprises: an analog signal transmission and reception unit which comprises a low dropout regulator, and receives a final setting value to adjust an operating condition of a function block installed therein; and an efuse block which selects the final setting value corresponding to a voltage level of an LDO output terminal, the final setting value being determined according to whether a fusing or trimming process for adjusting the voltage level of the LDO output terminal is performed.

The present disclosure describes various aspects of implementing a low-dropout regulator in a gate-all-around process. In some aspects, a low-dropout (LDO) regulator circuit includes an amplifier and a power transistor with a source terminal coupled to a power rail. The LDO circuit may also include protection circuitry configured to prevent devices of the circuit from exceeding inter-terminal voltage ratings, which may protect the devices from damage when the LDO circuit is active or inactive. In some implementations, the protection circuitry includes a transistor coupled in series with the power transistor, voltage sources that provide signals or bias at intermediate voltages below a voltage of the power rail, and other transistors that operate based on or apply the intermediate voltages to the devices of the circuit. By so doing, the LDO circuit can be implemented in advanced fabrication processes (e.g., gate-all-around) in which devices may have reduced inter-terminal voltage ratings.

The present invention proposes a timing controller including an e-fuse block for generating a final setpoint determined according to whether to perform fusing or trimming, and a method for selecting a final setpoint. The timing controller including an electronic fuse block includes: an analog signal transmitting and receiving unit including a low dropout regulator and receiving a final set value to adjust an operating condition of a functional block installed therein; and an electronic fuse block that selects a final set value corresponding to a voltage level of the LDO output terminal, the final set value being determined according to whether a fusing process or a trimming process for adjusting the voltage level of the LDO output terminal is performed.