21073results about "Emergency protective arrangements for limiting excess voltage/current" patented technology

An overvoltage output protector is electrically connected to a constant-voltage switching power supply which includes a switching transistor converting a DC voltage obtained by smoothing an AC voltage supplied from an AC power source into a cyclic pulse signal. In the overvoltage output protector, an overvoltage monitor whether a potential of the cyclic pulse signal is a predetermined value or more. A deactivator turns off the switching transistor in a case where the overvoltage monitor judges that the potential of the cyclic pulse signal is the predetermined value or more.

A surgical instrument includes a surgical end effector having at least one actuation assembly to effect a surgical procedure when actuated, an electric motor operationally connected to the end effector to operate the at least one actuation assembly, and a power supply electrically connected to the motor and selectively powering the motor to actuate the actuation assembly. The power supply has a battery cell with a critical current rate and, when activated to power the motor and actuate the actuation assembly, operates the cell at a super-critical current rate or at an average current rate above the critical current rate. The power supply selectively powers the motor to actuate the assembly less than 16 times during a clinical life of at least one of the end effector, the motor, and the power supply. When actuated, the assembly operates only between 0.5 seconds and 16 seconds in duration.

Distributed maximum power point tracking systems, structures, and processes are provided for power generation structures, such as for but not limited to a solar panel arrays. In an exemplary solar panel string structure, distributed maximum power point tracking (DMPPT) modules are provided, such as integrated into or retrofitted for each solar panel. The DMPPT modules provide panel level control for startup, operation, monitoring, and shutdown, and further provide flexible design and operation for strings of multiple panels. The strings are typically linked in parallel to a combiner box, and then toward and enhanced inverter module, which is typically connected to a power grid. Enhanced inverters are controllable either locally or remotely, wherein system status is readily determined, and operation of one or more sections of the system are readily controlled. The system provides increased operation time, and increased power production and efficiency, over a wide range of operating conditions.

A programmable power (PPSE) switching element including a front power transistor, a main switching transistor, and at least one reverse current blocking transistor in series, a gate of each of which is connected to a gate driver; an inductor and a shunt resistor connected in series with the transistors; a charge storage capacitor connected between ground and a junction located between the inductor and the shunt resistor; a high-speed NPN transistor, a collector of which is connected to the front power transistor and an emitter of which is connected to an output of the main switching transistor via the shunt resistor; a current measurement element in parallel to the shunt resistor; a voltage amplifier; and a high-speed MCU.

A fault detection mechanism for a LED string comprising a plurality of serially connected LEDs, the fault detection mechanism comprising: a control circuitry; and a voltage measuring means, in communication with the control circuitry, arranged to measure the voltage drop across at least one LED of the LED string, the control circuitry being operable to: measure the voltage drop, via the voltage measuring means, at a plurality of times, compare at least two of the measured voltage drops, and in the event the comparison of the at least two voltage drops is indicative of one of a short circuit LED and an open circuit LED, output a fault indicator.

The object is to reliably detect a ground fault of a solar battery. To detect a ground fault position to take an efficient measure against the ground fault, DC power input from a solar battery is converted into AC power and supplied to a system. In a system interconnection inverter (utility connected inverter) having non-insulated input and output, the input voltage of a converter circuit and/or the intermediate voltage between the converter circuit and an inverter circuit are varied to control the potential to ground at each portion of the solar battery to a value other than a value close to zero.

An LDO voltage regulator includes an error amplifier having a first input coupled to a first reference voltage, a second input receiving a feedback signal, and an output producing a first control signal. An output transistor has a gate, a drain coupled to an unregulated input voltage, and a source coupled to produce a regulated output voltage on an output conductor. A feedback circuit is coupled between the output conductor and a second reference voltage. An overvoltage comparator has a first input coupled to receive the first reference voltage and a second input coupled to respond to the feedback signal to produce a discharge control signal indicating occurrence of an output overvoltage of at least a predetermined magnitude to control a discharge transistor coupled between the output conductor and the second reference voltage. An output current sensing circuit produces a control current representative of the drain current of the output transistor. An offset capacitor is coupled between the output of the error amplifier and the gate of the output transistor, and a servo amplifier has a first input coupled to receive a third reference voltage, a second input coupled to the output of the error amplifier, and an output coupled to the gate of the output transistor to produce a second control signal thereon. A current sensor circuit, a current capacitor, and an AND circuit operate to allow the discharge transistor to be turned on only if the output current is below a certain level.

A ground fault detector and interrupter for a photovoltaic (PV) energy conversion system, method and apparatus are disclosed. In an exemplary embodiment, the system includes first and second inputs adapted to couple to a first and second rails of a PV array. An inverter is configured to convert DC power generated from the PV array to AC power. A ground fault detector and interrupter, which is coupled to the first and second rails and to the inverter, is configured to detect ground fault conditions in the PV array and to decouple the PV array from the remaining portion of the PV energy conversion system upon such detection. A known signal is coupled to the input of the ground fault detector and interrupter, and then sensed at the output of the ground fault detector and interrupter to determine whether components of the ground fault detector and interrupter are operating properly.

An electrical safety outlet for accepting a plug to provide power to electrical appliances including a power supply and an intelligent circuitry for controlling the power supply to the electrical outlet; the intelligent circuitry includes circuits for determining temperature condition in the outlet, mechanical plug insertion into the outlet, load presence on the outlet, and current capacity conditions.

A method and apparatus for aggregating power from multiple sources generates a single direct current regulated voltage. The apparatus comprises a plurality of slave voltage converters and a master pulse width modulator circuit. Providing a plurality of direct current power sources, current is drawn through a plurality of lines connected to the plurality of direct current power sources. An open circuit voltage for each direct current power source is unknown. Each line of the plurality of lines has a line resistance. The line resistance of at least some of the plurality of lines may be unknown. The line resistance of at least some of the plurality of lines is large. The single direct current regulated voltage is generated from the drawn current.

A self-powered current monitor for monitoring current in electric power systems. Various data relating to input currents may be displayed, such as current magnitude, current demand, and harmonics levels. Operating power is derived from one or more of the input currents. The power supply configuration may include a burden-reducing means to reduce the burden on input current sources during sampling of the input currents. The self-powered current monitor (1) includes a power supply section (3), input resistors (R1 and R3), an analog-to-digital converter circuit (5), a microprocessor circuit (6), a memory circuit (9), and a display circuit (7). Optional features include a burden-reducing circuit (2), input circuit protective elements (D1, D2, D3, D4, R2, and R4), an amplifier circuit (4), a user interface circuit (10), and an interface circuit (8) for communication to other equipment.

A method and apparatus for managing DC arc faults. At least a portion of the method is performed by a controller comprising at least one processor. In one embodiment, the method comprises analyzing a signature of a signal of a power converter and determining, based on analysis of the signature, whether an arc fault exists.

An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi- phase operation of the UPS is indicated.

The invention relates to a device for measuring current in an inductor, which device is intended to be connected in parallel with said inductor, comprising two terminals A and B. The device comprises: a network in parallel with the inductor and connected to the terminals A and B having a resistor R2 in series with a resistor R1 in parallel with a capacitor C1; a voltage offset circuit having a DC voltage generator E connected in parallel with an offset resistor (Roffset) in series with two resistors in parallel R3 and R4, the positive pole of this voltage source being connected to terminal B of the inductor; a temperature compensation circuit comprising a current source controlled as a function of the temperature, one of the two terminals of the current source being connected to the negative pole of the generator E, the other terminal of the current source being connected to different points of the measurement device according to the direction of variation of the current of the source as a function of the temperature. The measurement of voltage Vmes, the image of the current I in the inductor 12, is performed between the common point between the resistors R1, R2 of the network and the common point between the offset resistor and the two resistors R3 and R4.

A system for rack level power management, the system comprising: at least one power source; a management module; and a plurality of power managed modules in communication with the management module and connected to draw power from the at least one power source, each of the plurality of power managed modules comprising a power manager and an operating circuit, the operating circuit being operable at a plurality of power drawing levels responsive to the power manager, the management module being operative to allocate a power budget to each of the plurality of power managed modules and communicate the allocated power budgets to the power managers, each of the power managers being operative to control the operating circuit of the power managed module to be operable at a power drawing level within the allocated budget.

The electrostatic discharge (ESD) protection device for a liquid crystal display using a chip on glass (COG) package is provided. The ESD protection device includes a plurality of gate lines and data lines each of which has an output pad at its end. A plurality of gate line input pads and data line input pads are formed opposite to the output pads of the gate lines and data lines, respectively. A common electrode is formed between the plurality of gate line input pads and output pads and between the data line input pads and output pads. A plurality of electrostatic discharge protection circuits are connected between the input pads and the common electrodes to protect the input pads from electrostatic discharge.

A battery pack which includes a battery pack electronic control circuit adapted to control an attached power tool and/or an attached charger. The battery pack includes additional protection circuits, methodologies and devices to protect against fault conditions within the pack, as the pack is operatively attached to and providing power to the power tool, and/or as the pack is operatively attached to and being charged by the charger.

A disk drive is disclosed comprising a disk and a head actuated over the disk. The head comprising a first head terminal and a second head terminal. The disk drive further comprises an electrostatic discharge (ESD) protection circuit comprising a first depletion mode metal oxide semiconductor field effect transistor (MOSFET) and a second depletion mode MOSFET. A first transistor terminal of the depletion mode MOSFETs are coupled to respective head terminals, and a second transistor terminal of the depletion mode MOSFETs are coupled to ground. The gate terminals of the first and second depletion mode MOSFETs are biased to turn on the depletion mode MOSFETs while the disk drive is powered down, thereby grounding the first and second head terminals to protect the head from ESD.

The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply.

The system provides rapid recovery to steady state operation from the active transient response mode by using a digital compensator to quickly modifying the duty cycle and provide a voltage offset proportional to the transient microprocessor load step. Recovery is further improved by current rephasing techniques.