735 results about "Electrostatic discharge" patented technology

The invention discloses a surge protection circuit, which belongs to the field of semiconductor surge protection devices, and comprises a plurality of resistors, a plurality of voltage stabilizing diodes and a plurality of transistors, the first end of the first resistor is connected with a bus voltage, the first end of the first transistor and the second end of the second transistor; the second end of the first resistor is connected with the third end of the first transistor and the cathode of the first Zener diode, and the anode of the first Zener diode is connected with the cathode of the second Zener diode and the third end of the third transistor. The anode of the second voltage stabilizing diode is connected with the second end of the third resistor, the second end of the third transistor, the first end of the second transistor and the ground, the second end of the first transistor is connected with the first end of the second resistor, and the second end of the second resistor is connected with the first end of the third resistor, the first end of the third transistor and the third end of the second transistor. According to the invention, the problems of surge voltage such as electrostatic discharge, electrical fast transient pulse train, lightning stroke, peak and the like, transient voltage generated in a hot plug process and the like can be solved.

The invention discloses a high-voltage bidirectional silicon controlled rectifier electrostatic protection device and a manufacturing method. The high-voltage bidirectional silicon controlled rectifier electrostatic protection device comprises a P-type substrate, a P-type well and a high-voltage N well, the emitter P + injection of a parasitic PNP triode and the emitter N + injection of a parasitic NPN triode in the P-type well are arranged alternately, so that the length of a transverse discharge path of the silicon controlled rectifier is reduced to the greatest extent, the square resistance of a PNPN positive feedback conduction path is greatly reduced, and the key problem that a symmetrical bidirectional silicon controlled rectifier structure cannot be effectively opened in a high-voltage window of more than 70V is solved; in addition, the layout can provide an additional parasitic NPN triode path for a silicon controlled rectifier path, the effective area of an emitter of the parasitic NPN triode and the proportion of the emitter in a silicon controlled rectifier loop are increased, and the current discharge capacity of the device is further improved. Therefore, reference can be provided for the structural design of the high-voltage symmetrical bidirectional silicon controlled rectifier electrostatic protection device, and the silicon controlled rectifier can be effectively applied to ESD protection of a high-voltage bidirectional port.

An electrostatic discharge semiconductor device is disclosed and comprises: a first well region of a first doping type, extending from the surface of an epitaxial layer to the surface of the substrate; a second well region and a third well region of a second doping type; a fourth well region of the second doping type; a fifth well region and a sixth well region have a first doping type; a first injection region and a second injection region, spaced apart in each well region. The second injection region in the second and third well regions is connected to a cathode, and the first and second injection regions in the fourth well region are connected to an anode. The electrostatic discharge semiconductor device enhances its electrostatic protection capability by adjusting the avalanche breakdown voltage between the floating fifth and sixth well regions and the triggering voltage of the device.

An apparatus includes a drain and a source on opposing sides of an epitaxial layer, a body region and a plurality of gates formed in the epitaxial layer, an interlayer dielectric layer over the epitaxial layer, a gate-source electrostatic discharge (ESD) diode in the interlayer dielectric layer, a source contact connected to the source and a first terminal of the gate-source ESD diode structure, a gate contact connected to the plurality of gates and a second terminal of the gate-source ESD diode structure, a drain contact on opposing sides of the epitaxial layer of the source contact, a breakdown voltage enhancement and leakage prevention structure formed underneath the gate-source ESD diode structure, wherein the breakdown voltage enhancement and leakage prevention structure comprises a body ring structure.

The invention discloses an electrostatic protection circuit and method, equipment and a storage medium, and relates to the technical field of electrostatic protection, and the circuit comprises a metal sheet connecting plug, an electrostatic discharge circuit, an electrostatic sampling circuit and a microcontroller; the metal sheet connecting plug is electrically connected with the metal sheet, the electrostatic discharge circuit and the electrostatic sampling circuit respectively; the electrostatic sampling circuit comprises a voltage division circuit and a conditioning circuit, and the voltage division circuit is electrically connected with the metal sheet connecting plug and the conditioning circuit; and the microcontroller is in communication connection with the electrostatic sampling circuit and the electrostatic discharge circuit and is used for performing analog-to-digital conversion on the output voltage of the conditioning circuit to obtain electrostatic voltage and controlling the electrostatic discharge circuit to be switched on or switched off. The static voltage of the operator can be acquired in real time through the microcontroller so as to accurately judge whether the static discharge of the current operator is in place or not, so that the condition of hot-line operation of corresponding equipment when the static discharge is insufficient is reduced, and the accuracy and reliability of the static discharge are improved.

A semiconductor device is provided, including an input / output (I / O) pad, a power clamp, an electrostatic discharge (ESD) clamp circuit, a bias circuit, and a voltage-triggered source. The power clamp is coupled between first and second power rails. The ESD clamp circuit is connected to the I / O pad and coupled between an electrostatic discharge bus and the second power rail. The bias circuit is coupled between the first power rail and the electrostatic discharge bus, and is configured to couple the ESD bus to the first power rail during a normal operation mode, and float the electrostatic discharge bus during an electrostatic discharge mode or a fail-safe mode. The voltage-triggered source is coupled between the ESD bus and the second power rail, and provides a trigger voltage for a first electrostatic discharge path in response to an ESD event occurring on the I / O pad.

The present disclosure provides a display substrate including a base substrate, a plurality of data lines, a plurality of multiplexing circuits, a plurality of multiplexing data lines, a plurality of first electrostatic discharge circuits, a plurality of second electrostatic discharge circuits, and a plurality of first signal lines located on the base substrate. The plurality of multiplexing circuits are sequentially arranged along edges of the display region. The plurality of multiplexing circuits are electrically connected with the plurality of multiplexing data lines and the plurality of data lines. The plurality of first electrostatic discharge circuits are electrically connected to the plurality of multiplexing data lines, and the plurality of second electrostatic discharge circuits are electrically connected to the plurality of first signal lines.

A vacuum chuck may include a chuck body formed from silicon carbide. A carbon coating, such as a diamond-like carbon coating, may be deposited on the chuck body. Coating the silicon carbide vacuum chucks with the carbon coatings may control electrostatic discharge events. The carbon coatings may increase the surface resistance of the chuck body and bring the vacuum chucks to within an electrostatic discharge specification which is a tightening specification in the semiconductor industry.

The present disclosure provides a semiconductor device, which includes a control circuit, a driving circuit, a voltage pull-up device, and a discharging circuit. The control circuit is coupled between a first terminal and a second terminal of the integrated circuit, and provides a first voltage at a first node. The driving circuit is electrically connected to the control circuit at the first node, and provides a trigger signal at a second node in response to an electrostatic discharge (ESD) event occurring at the first terminal or the second terminal. The voltage pull-up device is coupled between the first terminal and the first node, and configured to pull up the first voltage at the first node in response to the ESD event occurring at the first terminal. The discharging circuit is electrically connected to the second node, and coupled between the first terminal and the second terminal.

The invention relates to the technical field of display, in particular to an ESD (Electro-Static Discharge) anti-interference method and device for display equipment. Abnormal interruption of a row effective signal DE in an image effective area is monitored in real time, when it is detected that the DE signal is abnormally pulled down due to electrostatic discharge (ESD) interference, an abnormal mark is generated immediately, a cache module is triggered to skip current abnormal row data, and normal image data of a previous row is output repeatedly, so that display abnormities such as a blurred screen, a blank screen or a splash screen are avoided. The device is compatible with mainstream interfaces such as an EDP, a DP, a VBYONE, an LVDS, an MIPI, an HDMI and a VGA, the anti-ESD capability of display equipment can be remarkably improved on the premise of extremely low hardware resource occupation only by additionally arranging DE anomaly detection and line cache control logic at a receiving end, and the device is widely applied to high-standard scenes such as vehicle-mounted scenes, medical scenes and industrial control scenes requiring stable and reliable pictures.

An electrostatic discharge circuit for a semiconductor die includes a plurality of GGNMOS transistors coupled between a first rail and a second rail of the semiconductor die. Each GGNMOS transistor includes a body contact that is coupled to a trigger rail through a ballast circuit and is coupled to the second rail. During the detection of an ESD event of a sufficient severity, the trigger rail is placed in an asserted condition to make the GGNMOS transistors conductive to discharge ESD current from the first rail to the second rail.

The invention discloses an electrostatic discharge device which comprises a feeding assembly and a discharge assembly, the feeding assembly is provided with an inclined surface, the inclined surface can make electronic components slide to at least one discharge position along the inclined surface by means of gravity, and the discharge assembly is arranged at the discharge position and used for conducting electrostatic discharge on the electronic components. According to the invention, the inclined surface of the feeding assembly automatically conveys the electronic components by using gravity, so that the problems of non-standard operation and high labor intensity caused by manual taking are eliminated, and each electronic component can be ensured to be in vertical contact with a discharge position; and the discharging assembly performs automatic discharging at the discharging position, so that mainboard component failure caused by incomplete manual discharging or leakage discharging is avoided. More specifically, the automatic process improves the discharge efficiency, reduces the operation time, and guarantees the discharge quality through a stable discharge point, thereby solving the problems of quality defects and low efficiency.

The invention relates to the field of chip electrostatic protection, in particular to a high-bandwidth flash memory chip ESD protection circuit optimization method and system. The method comprises the following steps: carrying out multi-point synchronous observation through a charge imaging module, and extracting ESD multi-step observation information; identifying a high density charge region based on the ESD multi-step observation information; defining a safe charge threshold value, performing charge safety evaluation on a high-density charge region, and entering a dynamic regulation and control mode; carrying out charge discharge path dynamic planning based on a dynamic regulation and control mode, and calculating real-time residual charge density; and detecting that the real-time residual charge density is lower than a safe charge threshold value, and completing the protection operation of the local bleeder circuit. The electrostatic discharge risk events higher than the safety threshold are quickly responded and efficiently processed, the safety of the chip circuit is improved, and the service life of the chip is prolonged.

The present disclosure relates to the technical field of optoelectronics, and provides a chip for laser detection, a LiDAR, a vehicle, and a photodiode. The chip for laser detection comprises a substrate, an epitaxial layer, an operating circuit, and a protection circuit. The epitaxial layer is formed over the substrate. The operating circuit is formed on the epitaxial layer. The operating circuit comprises a first photodiode and is configured to detect incident laser at an operating voltage. The protection circuit is formed on the epitaxial layer. The protection circuit is connected in parallel to the operating circuit and comprises a second photodiode. The turn-on voltage of the protection circuit is greater than the operating voltage, and the impedance of the protection circuit when it is turned on is less than the impedance of the operating circuit when it is turned on. The present disclosure can reduce the degree of damage caused by electrostatic discharge to operating circuits in chips.

The invention discloses a display panel and a display device. The display panel comprises a substrate, an electrostatic discharge circuit, a first metal layer, an organic film layer, an inorganic packaging layer and a first binding part. The electrostatic discharge circuit includes a first voltage line; the first metal layer is located in the display area, the first area, the second area and the third area; the organic film layer comprises a retaining wall part and a flat part, the retaining wall part is located in the first area, and the flat part is located in the second area; the inorganic packaging layer is continuously arranged in the display area, the first area and the second area, the edge of the side, away from the display area, of the inorganic packaging layer is flush with the edge of the side, away from the display area, of the first voltage line, and the first binding part is electrically connected with the first voltage line. According to the invention, the water oxygen corrosion of the metal wire between the binding area and the retaining wall structure can be reduced, and the display effect is improved.

The utility model provides an electrostatic protection circuit and a radio frequency front-end chip, and the electrostatic protection circuit comprises a plurality of stages of clamping circuits which are sequentially connected and are of a multi-stage stacking structure, and a resistor. Each stage of clamping circuit comprises a first field effect transistor, a second field effect transistor, a capacitor, a driving circuit, a third field effect transistor and a diode; the first end of the resistor is connected to a power supply to be protected, and the second end of the resistor is connected to the second end of the capacitor in the first-stage clamping circuit. The electrostatic protection circuit provided by the utility model can improve the discharge capability of the radio frequency front-end chip, shorten the opening time of the trigger circuit and enhance the effect of electrostatic discharge resistance under the condition of the same layout area of the radio frequency front-end chip.

The invention provides a circuit for laser detection, a laser radar and a carrier, and relates to the technical field of photoelectricity. The circuit for laser detection comprises a working circuit and a protection circuit connected in parallel with the working circuit. The working circuit comprises a first photodiode and is configured to detect echoes under working voltage, the protection circuit comprises a second photodiode, doped ions of the second photodiode and doped ions of the first photodiode are distributed in the longitudinal direction, and the break-over voltage of the protection circuit is larger than the working voltage. And the impedance of the switched-on protection circuit is smaller than that of the switched-on working circuit. According to the invention, the degree of damage to the working circuit caused by electrostatic discharge can be reduced.

An ESD protection circuit in an interface circuit has a first diode coupled between a power source of an integrated circuit device and an input / output pad of the integrated circuit device, a second diode coupled between a first terminal of a first resistive element and the input / output pad, with a second terminal of the first resistive element being coupled to the power source, a second resistive element that couples the second diode to the first diode and to the input / output pad; a first clamping circuit coupled between the power source and a ground reference of the integrated circuit device, and a second clamping circuit coupled between the first terminal of the first resistive element and the ground reference. The power source supplies a driver circuit coupled to the input / output pad.

A VCSEL device with a lithographic aperture and integrated electrostatic discharge event protection. The VCSEL device may comprise a plurality of layers forming a protective diode outside of the lithographic aperture area, wherein the surface area of the protective diode is larger than the surface area of said lithographic aperture.

The present disclosure provides a semiconductor device and an electrostatic discharge (ESD) clamp circuit. The semiconductor device includes a voltage divider, a cascoded inverter, and a discharge circuit. The voltage divider is electrically coupled between a power supply voltage and an output voltage of the semiconductor device. The cascoded inverter is electrically coupled to the voltage divider. The discharge circuit is electrically coupled to the cascoded inverter. The cascoded inverter is configured to turn on the discharge circuit to discharge an electrostatic discharge (ESD) current in response to an ESD event occurring on the power supply voltage or the output voltage when the semiconductor device is in an ESD mode.

The utility model provides a dielectric breakdown measurement circuit and a semiconductor detection device. The dielectric breakdown measurement circuit includes: an adjustable voltage source; the first end of the divider resistor is electrically connected with the adjustable voltage source, and the second end of the divider resistor serves as a voltage division output end; the tested circuit is electrically connected with the partial voltage output end; the input end of the detection circuit is electrically coupled to the voltage division output end, and the detection circuit is configured to convert a signal of the voltage division output end into a detection signal. In the breakdown process of the to-be-detected wafer, the change condition of the signal of the partial pressure output end is detected so as to reflect the breakdown degree of the to-be-detected wafer at any time, intermittent dielectric breakdown of the wafer can be prevented, electric breakdown and overlong detection time are further prevented, and the electric breakdown efficiency, the wafer electrostatic discharge efficiency and / or the wafer detection efficiency are remarkably improved. The voltage provided by the adjustable voltage source can also be used as a breakdown voltage, so that an extra electric breakdown circuit is not independently provided for the wafer to be tested.

The invention relates to the technical field of touch display panels, and discloses a touch display panel which comprises a display module and a touch module, the touch module comprises a substrate, a circuit layer and a protective layer, an electrode layer is arranged on the substrate, an electrode lead is led out of the electrode layer, the circuit layer comprises an electrode lead and a grounding lead, and the protective layer is arranged on the electrode lead. The grounding lead is arranged at the periphery of the electrode lead; the protection layer covers one side, far away from the substrate, of the circuit layer, and the protection layer is provided with a hollow area corresponding to the grounding lead in the vertical direction. According to the scheme, the protection layer is provided with the hollowed-out area above the grounding lead, when ESD is generated outside, the nearest grounding lead is preferentially found to discharge and dredge accumulated charges, electrostatic discharge is achieved, and the ESD resistance of the touch display panel is effectively improved. The invention further discloses an electronic device with the touch display panel.

This invention provides a radio frequency (RF) switch circuit and module. The RF switch circuit includes a first resistor and stacked switching units. Each stacked switching unit comprises multiple stages of stacked field-effect transistor (FET) circuits connected in series. Each stage of the stacked FET circuit includes a FET, a second resistor, and a bootstrap unit, which includes one or two bootstrap circuits. The bootstrap unit in each stage of the stacked FET circuit is used to raise the gate voltage of the corresponding FET during electrostatic discharge (ESD) to assist in turning on the FET and allowing the ESD current to be discharged through the path formed by the FET. This invention can prevent gate oxide breakdown or thermal damage caused by localized overheating of the FET acting as a switch during an ESD event in the RF switch circuit, thereby improving the stability of the RF switch circuit.

The application relates to a multi-axis mechanical arm-based electrostatic protection test system, and relates to the field of electrostatic discharge test, which comprises a workbench, a fixing device, a discharge device, a grabbing device, a detection device and a gun head replacing device; the grabbing device moves the electronic equipment to the fixing device, and the fixing device clamps the electronic equipment; the detection device is used for detecting the electronic equipment; the discharge device comprises an electrostatic gun driving assembly and an electrostatic gun, the electrostatic gun driving assembly drives the electrostatic gun to move, and the electrostatic gun moves to the position of the electronic equipment to discharge; the gun head replacing device comprises a replacing support frame, a replacing driving piece and a plurality of gun head placing seats; when the electrostatic gun abuts against the inner wall of the gun head placing seat, the replacing driving piece drives the gun head placing seat to rotate, so that the gun head of the electrostatic gun is taken off or installed. The application has the effect of improving the detection efficiency of the electronic equipment.

The invention relates to the technical field of ion fan testing, in particular to an analysis processing method and system for ion fan testing data. The method comprises the following steps: acquiring voltage data in a test period, extracting a rapid drop characteristic and a slow attenuation characteristic in electrostatic response data, and respectively generating a first electrostatic discharge characteristic and a second electrostatic discharge characteristic; identifying a corresponding discharge response section according to the difference; a response curve form in the section is extracted, and first neutralization time, first residual voltage, second neutralization time, second residual voltage and other electricity removal performance parameters are obtained; if the neutralization time difference and the residual voltage are both within the set threshold range, it is judged that the fan is in a stable electricity removal state, and blowing output is maintained; otherwise, it is judged that the electricity removal performance is abnormal, testing is stopped immediately, output is locked, and an alarm and data reporting mechanism is triggered; according to the invention, through ion fan testing, ion fan testing is more accurate.

The application belongs to the technical field of electric initiation, and particularly relates to an electric ignition device with a redundant ignition structure. The electric ignition device comprises an electrode plug body made of ceramic material, two cylindrical charge chambers which are independent and symmetrical about the axis of the electrode plug body are arranged on the electrode plug body, the two charge chambers are separated by ceramic, the charge chambers can completely wrap the charge in the ceramic of the electrode plug body and are only open at the top, each charge chamber is provided with a pin, a metallized layer on the bottom surface of the electrode plug body is in conduction with each group of pins, a thermistor NTC is arranged between the two metallized layers, and an electrostatic discharge tip air gap is arranged between the metallized layer and the outer circle of the electrode plug body. Under high-voltage electrostatic, the discharge position between the bridge circuit of the electric ignition device and the metal shell is converted to the bottom surface of the electrode plug. The application improves the ignition reliability, solves the problem of electrostatic ignition between the independent charge chambers, and can be adapted to various electric primers with a diameter not less than 8.7 mm and a height not less than 10.7 mm.

The utility model discloses a kind of circuit board processing auxiliary tool, it is related to circuit board processing technical field, including movable movable frame, the placing assembly for storing circuit board is provided in movable frame upper portion, support assembly is provided in movable frame lower portion, support assembly includes driving part and the moving block of driving part transmission connection, two vertical blowing ion fan of surface fixed mounting is installed on moving block, driving part is configured as driving moving block ion fan is made transverse reciprocating motion along the direction parallel to the bottom surface of placing assembly.By driving part driving ion fan transverse reciprocating movement along placing assembly lower portion, dynamic, uniform electrostatic elimination can be carried out to circuit board, effectively avoid local electrostatic accumulation.Ion fan reciprocating motion coverage range is wide, can ensure that circuit board is always in non-static environment in transport process, significantly reduce the damage risk of electrostatic discharge to precision component.

The application discloses a teaching workbench with a static electricity discharge alarm function, and relates to the technical field of static electricity discharge alarm, which comprises a work desk (1), a table top (2) arranged on the work desk (1), a workbench (3) arranged on the table top, a static electricity alarm device arranged on the workbench (3) and a static electricity discharge alarm module arranged in the workbench (3). The abnormal signals and input signals of the static electricity device are collected through the static electricity device input port arranged on the static electricity alarm device. The static electricity discharge detection is carried out through the static electricity discharge alarm module arranged in the workbench. The abnormal alarm of the static electricity device is carried out through the sound and light alarm indicator arranged on the static electricity alarm device. The problem that the static electricity wearing tool of the wearer cannot be found in time when the static electricity wearing tool is loosened or not correctly worn is solved. The electronic components and instruments are prevented from being damaged due to the static electricity breakdown.

The application relates to a liquid crystal display panel and a preparation method thereof, and a liquid crystal photo-alignment jig. An array substrate of the display panel has a display area and a binding test area located at the periphery of the display area. The display area comprises a plurality of sub-pixels and a plurality of signal lines arranged in an array, and the binding test area comprises a plurality of test terminals arranged at intervals. The test terminals are electrically connected to the signal lines through metal traces. The counter substrate comprises a common electrode layer and a to-be-edged area corresponding to the binding test area. The to-be-edged area comprises a plurality of test electrodes arranged in the same layer as the common electrode layer and arranged at intervals. At least part of the test terminals is provided with a conductive part. At least part of the test terminals is respectively connected to the corresponding test electrodes through the respective conductive parts, so as to transmit a common voltage or a curing voltage to the liquid crystal display panel. The display panel can reduce the number of metal traces in the peripheral binding test area and the cross-line between each metal trace, reduce the risk of electrostatic discharge, and improve the product yield.

The utility model discloses a kind of micro high-output capacity's insensitive electric ignition tube, belong to the technical field of pyrotechnics, including shell (1), in the shell (1) from below to above sequentially provided with insulating sheet (8), electrostatic discharge ring (7) and electrode plug (6), the two pins (61) of the electrode plug (6) from the lower end of shell (1) stretch out shell (1) outside, the upper end surface of the electrode plug (6) is provided with bridge wire (5), the bridge wire (5) is communicated with two pins (61), the upper end surface of electrode plug (6) is provided with charge ring (4), in the charge ring (4) is provided with ignition powder (3), in the upper end surface of the ignition powder (3) is provided with cover sheet (2);The utility model makes the insensitive scheme that satisfies in GJB344A-2020 under the size frame as small as possible, simultaneously has enough big output capacity.