62results about How to "Reduce electrostatic discharge" patented technology

A method to reduce electrostatic discharge susceptibility when assembling a stacked IC device. The method includes coupling a ground plane of a first semiconductor device and a ground plane of a second semiconductor device to substantially a same electrical potential. Active circuitry on the first semiconductor device and active circuitry on the second semiconductor device are electrically coupled after the ground planes are coupled. Electrically coupling the ground planes of the first and the second semiconductor device creates a preferred electrostatic discharge path to ground, thus minimizing potential damage to sensitive circuit elements.

Touch sensor configurations for reducing electrostatic discharge events in the border area of a touch sensor panel is disclosed. Touch sensors (e.g., electrodes formed on the cover material and/or the opaque mask) can be susceptible to certain events such as arcing and discharge/joule heating, which may negatively affect touch sensor performance. Examples of the disclosure can include increasing the trace width, spacing, and/or thickness in the border area relative to the trace width, spacing, and/or thickness in the visible/active area along one or more sides of the touch sensor panel. In some examples, touch electrodes can be located exclusively in the visible/active areas along one or more sides of the touch sensor panel, while dummy sections can be included in both the border and visible/active areas. Additionally or alternatively, one or more gaps between adjacent touch electrodes in the border area or serpentine routing can be included.

A fabricating method of an organic light emitting display device including performing a sheet test as a sheet unit on a mother board formed with panels and sheet wires for supplying test signals to the panels on the mother board, the method including: forming drive elements for driving the panels in each of the panels and forming sheet wires electrically coupled to at least a portion of the drive elements and shorting bar electrically coupling all of the sheet wires; forming organic light emitting diodes in each of the panels and isolating the sheet wires from each other by etching open regions of the shorting bar apart from contact regions of the shorting bar for coupling the shorting bar to the sheet wires; performing the sheet test on the plurality of panels by supplying the test signals to the sheet wires; and separating the panels by scribing the mother board.

The invention discloses a touch panel and an electronic apparatus. The touch panel comprises a substrate, a plurality of first electrode blocks and a plurality of second electrode blocks. The substrate has a display region and a non display region. The first electrode blocks and the second electrode blocks are formed on the substrate, and the second electrode blocks are arranged around the first electrode blocks. Each first electrode block is completely arranged in the display region, and at least one part of each second electrode block is located in the non display region. Each first electrode block comprises a first touch electrode pattern and a first virtual electrode pattern. Each of the second electrode blocks comprises a second touch electrode pattern and a second region; at least one part of the second region comprises at least one second virtual electrode pattern; and the area of the second virtual electrode pattern is smaller than that of the first virtual electrode pattern. According to the touch panel and the electronic apparatus, the electrostatic discharge probability can be reduced.

A display device comprises a display array substrate, a common substrate and a display layer. The display array substrate comprises a display region and a periphery region, and at least one chip-bonding area is formed in the periphery region. The display layer is sandwiched between the display array substrate and the common-electrode substrate. A conductive loop is disposed in the periphery region of the display array substrate, and passes through the chip-bonding area.

Disclosed is a bundle division structure for a flexible circuit cable. The flexible circuit cable includes a plurality of conductor units that extends in an extension direction and is collected together to form a clustered structure. The clustered structure defines at least one bundle division section. The bundle division structure includes a bundle division unit, at least a pair of conductor unit receiving slots. The conductor units of the bundle division section are divided into groups that are respectively received in the conductor unit receiving slot. The bundle division unit is coupled to a protection member for protection and positioning purposes.

The present invention is directed to an electrical contact that incorporates a movable metal connection component such as a contact pin. The metal connection component is mounted within an insulating body. An electrically conducting path, from a contact head of the metal connection component to an interior of a base chassis is created only when a handset has been positioned within a cradle cavity of the base.

Micro-fluid ejection heads and methods for extending the life of micro-fluid ejection heads. One such micro-fluid ejection head includes a substrate having a plurality of thermal ejection actuators. Each of the thermal ejection actuators has a resistive layer and a protective layer thereon. A flow feature member is adjacent the substrate and defines a fluid feed channel, a fluid chamber associated with at least one of the actuators and in flow communication with the fluid feed channel, and a nozzle. The nozzle is offset to a side of the chamber opposite the feed channel. A polymeric layer having a degradation temperature of less than about 400° C. overlaps a portion of the at least one actuator associated with the fluid chamber and positioned less than about five microns from at least an edge of the at least one actuator opposite the fluid feed channel.

A non-conductive carrier having a conductive component comprising a plurality of sections to disrupt the conductive component's conductive path. Each section is isolated from other sections such that a charge accumulated in one section cannot combine with the charge accumulated in another section, thereby minimizing any potential electrostatic discharge from the carrier.

A motor including a frame, a stator fixed relative to the frame, and a bearing assembly fixed relative to the frame may be provided. The bearing assembly may include ball bearings at least partially encompassed by a conductive grease. The conductive grease may include grease and particles including at least one of carbon, metal and a combination thereof. At least one particle may be coated with a conductive polymer. A rotor may be supported by the bearing assembly for rotation relative to the stator.

It is possible to realize an electrostatic discharge protection component having a very small electrostatic capacity suited to a high-frequency equipment and comprising a ceramic insulating substrate, a varistor unit composed of a varistor layer and an internal electrode, which are sintered and integrated on the ceramic insulating substrate, and at least a pair of external electrodes provided on the varistor unit, the varistor unit being formed with a varistor.

A fuel dispensing nozzle includes a body, a handle connected to the body, a handle guard connected to the body and generally surrounding the handle, and a spout extending from the body. Parts of the nozzle are made of, or covered in, static dissipative materials. Additionally, a method for reducing static discharge in existing nozzle installations includes the application of static dissipative material to existing nozzles to address certain static discharge risks.

The embodiment of the invention provides an array substrate, a manufacturing method thereof and a display device, and relates to the technical field of display. The electrostatic discharge of the TFT array substrate in the manufacturing process can be effectively reduced, and the product yield is improved. The method includes the step of forming a thin film transistor and signal lines and further includes the step of forming a signal line communicating wire, wherein the signal line communicating wire at least makes the signal lines of the same type electrically connected. Before the last film layer is manufactured in the array substrate manufacturing process, the method further includes the step of etching via holes in the signal line communicating wire or the positions, close to the signal line communicating wires, of the signal lines, wherein the via holes are used for eliminating the electrical connection of the signal lines. The method is used for manufacturing the array substrate and the display device.

The invention provides an array substrate. The array substrate comprises a test pad located in a test pad area and a routing line located in a routing area, wherein the routing line is connected with the test pad; the routing line comprises a first metal layer, a first insulation layer, a first passivation layer, a second insulation layer, a second passivation layer and a transparent electrode layer which are successively arranged on the substrate and are located in the routing area. The invention also provides a manufacturing method of the routing line and the test pad of the array substrate as well as a liquid crystal panel. In a routing structure of the array substrate, a second metal layer which is a source-drain metal layer of a thin film transistor is eliminated; a pixel electrode layer is in span connection with the first metal layer; a plurality of film layers are arranged between the pixel electrode layer and the first metal layer, and a long distance is formed between the pixel electrode layer and the first metal layer, thus the breakdown threshold voltage can be increased, and the stray capacitance can be reduced, so that the occurrence probability of electrostatic discharge can be reduced.

A thin film transistor (TFT) array substrate for reducing electrostatic discharge damage includes a substrate, a plurality of pixel units, scan lines and data lines. The substrate has a pixel area and a peripheral area adjacent to the pixel area. The pixel units are disposed in the pixel area. The scan lines and data lines are disposed in the pixel area of the substrate and electrically connected with the pixel units, wherein one end of each scan line extending to the peripheral area is a bonding pad for the scan line. One end of each data line extending to the peripheral area is a bonding pad for the data line. The other end of each data line extending to the peripheral area is an end part of the data line. Particularly, the end part of the data line does not exceed the outmost scan line.

An image sensor pixel comprises a first charge storage node configured to have a first charge storage electric potential; a second charge storage node configured to have a second charge storage electric potential and receive charge from the first charge storage node, wherein the second charge storage electric potential is greater than the first charge storage electric potential; and a transfer circuit coupled between the first and the second charge storage nodes, wherein the transfer circuit comprises at least three transfer regions, wherein: a first transfer region is proximate to the first charge storage node and configured to have a first transfer electric potential greater than the first charge storage electric potential and lower than the second charge storage electric potential; a second transfer region is coupled between the first and a third transfer region and configured to have a second transfer electric potential greater than the first charge storage electric potential and lower than the second charge storage electric potential; and the third transfer region is proximate to the third charge storage node and configured to have a third transfer electric potential greater than the first charge storage electric potential and lower than the second charge storage electric potential. Charges are fully transferred from the first charge storage node to the second charge storage node after a plurality of transfer signal pulses.

A protective structure for electrostatic discharge used to guide an electrostatic charge to a ground portion is provided, which comprises at least one press element and a masking piece, wherein an electrostatic charge near the press element is attracted by wrapping the press element with the masking piece, and then the attracted electrostatic charge is directed out of the press element, which greatly reduces the probability that the press element is interfered by the electrostatic charge and effectively shields the press element.

A method for electrostatic discharge depolarization is implemented. The buildup of charge on tool structures in fabrication tools for semiconductor processing may be expected to be of concern whenever high voltage is employed near the structure in a tool. The process herein includes selectively exposing the structure to a plasma for a selected time interval. The duration of the exposure time interval is sufficient to reduce the polarization of the structure whereby the forces due to the polarization do not interfere with the transport or movement of a wafer being processed.