5037 results about "Operating voltage" patented technology

The invention discloses an online aging state monitoring method and system for a silicon carbide MOSFET, and belongs to the technical field of semiconductor device monitoring, and the method specifically comprises the steps: collecting the working voltage, working current and junction temperature data of the silicon carbide MOSFET in real time, analyzing and processing the data through a data processing unit, and extracting the aging state characteristic parameters of the MOSFET; a dynamic aging state evaluation model fusing multi-source data and time sequence information is adopted to evaluate the aging state of the silicon carbide MOSFET, and a result is output to a display unit; according to the method, the aging state of the silicon carbide MOSFET is monitored, multi-level alarm strategies are set, different levels of alarm signals are triggered according to the aging state, meanwhile, feedback data are collected to optimize the state evaluation model, real-time and accurate monitoring of the aging state of the silicon carbide MOSFET is achieved, and the reliability and stability of a power electronic system are improved.

The invention relates to a cleaning operation and maintenance method, device and equipment of a photovoltaic module and a readable storage medium. The method comprises the following steps: acquiring a visible light image and an infrared image of a photovoltaic module, and acquiring working voltages and working currents of the photovoltaic module at a plurality of time points in a preset time period; constructing a current-voltage curve based on the working voltage and the working current, and determining a slope difference of the plurality of time points according to the current-voltage curve and a reference curve; identifying a dust accumulation area in the visible light image, and determining a dust shielding index based on the dust accumulation area; identifying a high-temperature area in the infrared image, and determining a hot spot index based on the high-temperature area; and determining a start-stop strategy of the photovoltaic cleaning robot according to the slope difference, the shielding index and the hot spot index of the multiple time points, and controlling the photovoltaic cleaning robot to clean the photovoltaic module according to the start-stop strategy. By adopting the method, the photovoltaic cleaning operation and maintenance efficiency can be improved.

The invention provides a power supply conversion control method and system for a chip, and relates to the technical field of power supply management, and the method comprises the steps: constructing a power supply conversion optimization model, randomly generating a model training sample for pre-training, generating network parameters, and migrating to an actual control environment, thereby obtaining a trained power supply conversion optimization model; working state parameters and external power supply voltage of a chip to be tested are obtained, an optimal conversion control strategy is generated through forward reasoning, the working voltage of the chip to be tested is adjusted, whether significant change occurs or not is judged, if yes, the optimal conversion control strategy is regenerated, and if not, a running log is generated through packaging; carrying out feature engineering, determining association rules, generating an optimization control rule set, training a base learner and combining to obtain an integrated optimization model, fusing the integrated optimization model with a power conversion optimization model to obtain a candidate conversion model, and carrying out optimization effect evaluation; and taking parameters of the candidate conversion model with the highest optimization effect as optimal parameters for feedback, and performing power supply conversion.

The invention provides a chip power consumption control method and device and a storage medium, and relates to the technical field of chip power consumption control, and the method comprises the steps: obtaining a target power consumption value, a current power consumption value and a current frequency value; determining a power consumption difference proportion value according to the current power consumption value and a target power consumption value; according to the current frequency value and the power consumption difference proportion value, obtaining a frequency increase and decrease value which is in positive correlation with the power consumption difference proportion value; determining a target frequency value according to the frequency increase / decrease value and the current frequency value; and adjusting the working frequency and the working voltage according to the target frequency value. The target frequency value meeting the target power consumption value condition can be quickly determined without step-by-step frequency increasing and decreasing, the frequency modulation efficiency can be improved, the performance and the temperature control performance can be improved, the working power consumption can be controlled to be close to the target power consumption value, and the power consumption requirement can be met. And meanwhile, smaller-granularity frequency modulation is realized, and the frequency for giving full play to the performance of the chip is obtained under the limitation of power consumption, so that the utilization efficiency of the performance of the chip is improved.

The invention discloses a linearity closed-loop optimization method for a semiconductor gas sensor with adjustable voltage dynamic compensation, which relates to the technical field of gas detection and comprises the following steps: controlling the semiconductor gas sensor to start in a clean air environment, outputting an initial test voltage sequence through a voltage regulator, the method comprises the steps of collecting sensor reference resistance under different voltages, screening out initial working voltage with the minimum resistance fluctuation quantity, synchronously collecting initial environment temperature and humidity, and calibrating the sensor reference resistance based on preset temperature and resistance coefficients and humidity and resistance coefficients to obtain initial reference resistance. By dynamically adjusting the working voltage and combining real-time compensation on the environment temperature and humidity, the interference of environment factor fluctuation on the resistance characteristic of the sensitive material can be continuously counteracted, so that the linear relation between the output signal of the sensor and the target gas concentration is kept stable, the dynamic optimization of the linearity in a complex environment is realized, and the sensitivity of the sensor is improved. And more reliable basic data is provided for gas concentration detection in an industrial scene.

The invention relates to the technical field of power system monitoring and fault diagnosis, and particularly discloses a fault diagnosis system of an electrical variable measurement insulator detection device. The system comprises a synchronous acquisition module, a multi-physical field feature extraction module, a self-adaptive fault diagnosis engine and a feedback module. By synchronously acquiring voltage harmonic waves, leakage current and temperature data, extracting feature vectors of coupling electric-thermal influence and performing two-stage collaborative diagnosis by using a dynamic threshold value and a mahalanobis distance, high-sensitivity and self-adaptive accurate identification and early warning of an early latent fault of the insulator are realized. According to the system, by constructing a synchronous data acquisition module and a multi-physical field feature extraction module, two key influence factors, namely an operation voltage harmonic component and an environment temperature, are brought into a diagnosis system in a quantifiable feature form for the first time.

Lateral III-N devices such as AlGaN / GaN HEMTs can have structures which serve to improve performance and reduce current degradation. The III-N device can include a conductive substrate and a III-N material structure that includes a III-N buffer layer, a III-N channel layer and a III-N barrier layer where a compositional difference induces a 2DEG channel therein. The first portion is in ohmic contact with the 2DEG channel and the second portion extends over a top surface of the III-N barrier layer and is in direct contact with the top surface of the III-N barrier layer. The device further includes a drain-to-substrate pinch-off voltage and a maximum rated drain-to-source operating voltage which is greater than the drain-to-substrate pinch-off voltage, and the 2DEG channel is fully depleted of charge below the second portion of the drain electrode when the III-N device is biased at or above the maximum rated drain-to-source operating voltage.

The invention provides a high-low voltage isolated energy storage battery management system, and relates to the technical field of battery management systems or other related fields, the system comprises a power supply isolation unit, a high voltage acquisition unit and a communication isolation unit, the power supply isolation unit is used for providing working voltage for the high voltage acquisition unit, and the communication isolation unit is used for providing communication voltage for the high voltage acquisition unit; the power supply isolation unit comprises a low-voltage power supply, a first transformer, a voltage conditioning circuit, a second transformer, a diode module and a voltage stabilizer, and the high-voltage acquisition unit is used for acquiring battery cluster information, converting a signal format of the battery cluster information into a digital signal and transmitting the battery cluster information to the communication isolation unit; the communication isolation unit is used for transmitting the battery cluster information to the micro-processing chip, the micro-processing chip generates a battery cluster control instruction based on the battery cluster information, and the communication isolation unit comprises a third transformer, a fourth transformer and a bridging chip. According to the invention, the technical problem that high-voltage and low-voltage isolation cannot be carried out on a high-voltage energy storage battery management system in the prior art is solved.

The invention discloses a method and system for testing the electrical performance of a semiconductor chip, and the method comprises the steps: building a mapping relation between dielectric loss and loss frequency through obtaining the dielectric loss data, internal material characteristics and dynamic load power factors of the chip under each frequency band, recognizing a loss abnormal region, and analyzing the influence of the loss abnormal region on the performance of the chip; correcting test data by adopting a minimum mean square error algorithm, and optimizing the impedance of the power supply network and the dynamic switching characteristic of a functional module; calculating the breakdown voltage distribution of each layer in the chip, identifying a high-voltage risk region, optimizing the voltage distribution by using a gradient descent algorithm, and dynamically adjusting the working voltage and current; power factor fluctuation is analyzed through a sliding window algorithm, an abnormal area is identified, a power factor is optimized through a PID algorithm, and the working state and transient response of a chip in a dynamic load are improved. According to the method, the problems of nonlinearity of high-frequency dielectric loss, non-uniform breakdown voltage distribution and unstable power factor response under a dynamic load are solved, and comprehensive and accurate evaluation and optimization of chip performance are realized.

The invention relates to the technical field of chip encryption, in particular to an E-type effect amplifier electromagnetic heating method and system based on gallium nitride. The real-time resistance correction value is calculated by acquiring the real-time resistance data and the real-time temperature data and combining the working characteristic information and the ideal parameter information of the gallium nitride device, so that the temperature change of the gallium nitride device can be quickly responded, and then the resistance division subset and the temperature division subset are respectively acquired; a plurality of temperature-resistance correlation groups are obtained after permutation and combination, a data basis is provided for establishing a working voltage prediction model, then the working voltage prediction model is trained through historical data, and finally a real-time resistance correction value and a real-time temperature value are input into the corresponding working voltage prediction model to obtain a working voltage simulation value. And a circuit where the gallium nitride device is located is adjusted according to the working voltage analog value, so that the working voltage and the working current of the gallium nitride device are close to ideal values, and stable power output of the device is ensured.

The invention relates to the technical field of semiconductors, and provides a method for determining a working curve of a chip, a program product, a storage medium and electronic equipment. The method for determining the working curve of the chip comprises the steps that by running a test case for a target chip, the corresponding minimum working voltage of the target chip at a plurality of target frequency points is obtained, and the minimum working voltage is the minimum working voltage enabling the target chip to correctly execute the test case; and fitting a working curve of the target chip by using the plurality of target frequency points and the corresponding minimum working voltage, wherein the working curve is a curve representing the relationship between the frequency and the minimum working voltage. According to the method, the working curve of the target chip can be simply and efficiently determined, and the minimum working voltage of the target chip under the frequency can be obtained by randomly assigning one working frequency based on the working curve, so that great convenience is provided for obtaining the minimum working voltage of the target chip under different frequencies, and the working efficiency of the target chip is improved. And the method has good universality.

The invention discloses a leakage current test analysis method and platform for a low-power-consumption chip, and belongs to the field of semiconductor testing, and the method comprises the steps: collecting the chip feature data of a target low-power-consumption chip, and determining a plurality of environment parameter test ranges and working voltage test ranges of the target low-power-consumption chip; generating an environment test sequence and a voltage test sequence, combining the environment test sequence and the voltage test sequence, and generating an adaptive test scheme; constructing a leakage current data matrix based on the adaptive test scheme; obtaining a first analysis result; obtaining a second analysis result; and obtaining a leakage current characteristic evaluation result of the target low-power-consumption chip based on the first analysis result and the second analysis result. The technical problems that in the prior art, the leakage current testing condition is single, the characteristics of the low-power-consumption chip under the multi-environment parameter and voltage condition are difficult to comprehensively evaluate, and consequently the accuracy and applicability of the testing result are insufficient are solved.

The present disclosure relates to the technical field of high-voltage direct-current power transmission, and provides a surge protection method and apparatus for a fully controlled valve in a controllable line-commuted converter, a computer device, a computer readable storage medium and a computer program product. The method comprises: monitoring a terminal voltage of a fully controlled valve in real time; when a wave turn-off voltage per cycle of a primary IGBT valve exceeds an operating voltage of a surge arrester, subtracting 1 from an available action count of the surge arrester of the primary IGBT valve, and when a wave turn-off voltage per cycle of a secondary IGBT valve exceeds an operating voltage of a surge arrester, subtracting 1 from an available action count of the surge arrester of the secondary IGBT valve; when the available action count of the surge arrester of the primary IGBT valve is less than a second preset count, or when the available action count of the surge arrester of the secondary IGBT valve is less than the second preset count, controlling a converter to return to a power grid line-commutation operation mode; and when the available action count of the surge arrester of the primary IGBT valve is greater than a third preset count, or when the available count of the surge arrester of the secondary IGBT valve is greater than the third preset count, controlling the converter to enter a controllable line-commutation operation mode.

A semiconductor die includes an on-die power switch and a target device. The on-die power switch includes a plurality of power input nodes, a power output node, and a switch circuit. The power input nodes receive a plurality of operation voltages from a plurality of different power sources, respectively. The power output node outputs a target operation voltage selected from the operation voltages. The switch circuit selectively couples one of the power input nodes to the power output node. The target device operates according to the target operation voltage supplied from the on-die power switch. The on-die power switch and the target device are separate circuit blocks of the semiconductor die.

The embodiment of the invention discloses a chip control method and device, equipment, a medium and a product, and relates to the field of chips. The method comprises the following steps: acquiring a chip parameter of a first chip; analyzing the chip parameters of the first chip through a pre-trained voltage frequency model to obtain a voltage frequency point corresponding to the first chip; and controlling the first chip to operate at the working voltage and the working frequency based on the voltage frequency point. The voltage frequency point is a personalized customized voltage frequency point for the first chip and accords with the chip parameter of the first chip, that is, the adaptation degree between the voltage frequency point and the chip parameter of the first chip is improved, the performance of the first chip is improved under the dynamically determined voltage frequency point, and the performance of the first chip is improved. The problem that the performance of the unified voltage frequency point on the first chip is poor is avoided.

To provide an in-situ electrochemical passivation and repair method for a solid-state lithium battery.SOLUTION: A sulfide-based solid-state battery is discharged to a specific lithiation degree according to a specific discharge mode under low current density, so that in-situ electrochemical passivation and / or repair of the battery are / is realized. Through the electrochemical reduction method, the interface of the sulfide-based solid-state battery can be passivated and stabilized, and the sulfide electrolyte is prevented from being continuously decomposed in the charging and discharging process, so that the sulfide solid-state electrolyte can be matched with an oxide positive electrode material with relatively high operating voltage; and an oxidation product generated by decomposition in the cycle process is converted into a lithium-rich reduction product with ion conductivity again, so that the activation and repair effects are achieved, and the battery has more excellent cycle stability.SELECTED DRAWING: Figure 13

The invention discloses a hydrogen production electrolytic cell dynamic performance control method based on an improved particle swarm optimization algorithm, which comprises the following steps of: extracting index parameters of an electrolytic cell, constructing a mathematical model which comprises operating voltage, hydrogen production rate and hydrogen production efficiency, and calculating the dynamic performance of the electrolytic cell according to the operating voltage, the hydrogen production rate and the hydrogen production efficiency. The operating voltage, the hydrogen production rate and the hydrogen production efficiency of the mathematical model are calculated to obtain multi-target optimization parameters for constraining the operating temperature of the electrolytic cell, the weight of existing linear quadratic programming control is optimized through a self-adaptive weight multi-target particle swarm algorithm, the dynamic temperature model of the electrolytic cell is constructed, and the optimal temperature of the electrolytic cell is obtained. And controlling the operating temperature of the electrolytic cell to be within a constrained electrolytic cell operating temperature range through the electrolytic cell temperature dynamic model. According to the method, the weight of linear quadratic programming control is optimized through the self-adaptive weight multi-target particle swarm algorithm, and the electrolytic bath temperature dynamic model is constructed, so that stable and rapid feedback control can be performed on the operating temperature of the electrolytic bath.

The invention belongs to the technical field of board card testing, and particularly relates to a board card voltage and current measurement and insulation voltage resistance testing method and system, and the method comprises the steps: starting a testing cabinet of a board card testing system, carrying out the self-inspection, and setting system parameters; a power supply is loaded according to set system parameters, and a load mode is selected according to different product requirements to provide working voltage and current for the board card; after the load mode is confirmed, voltage and current measurement and insulation voltage resistance test are carried out on the board card in a probe contact mode, and test data are transmitted to the data processing and analyzing module in real time; and the data processing module judges according to preset upper and lower limit standards after receiving the measurement and test data, and stores the data and an evaluation result to the storage unit at the same time. Through unified control and data processing, voltage and current measurement and insulation voltage resistance testing of the board card are integrated in one system, automatic board card comprehensive testing is achieved, and the accuracy and efficiency of board card comprehensive testing are improved.

The sodium ion battery comprises a positive electrode and a negative electrode, an active material of the positive electrode comprises a polyanionic sodium storage material, an active material of the negative electrode is hard carbon, the ratio of the capacity of a slope region of the negative electrode to the capacity of the positive electrode is 1.1-1.2, and the working voltage of the negative electrode is 0.1-1.0 V. The NP ratio is limited, the working voltage of the negative electrode is limited in a slope region, sodium ions are mainly adsorbed on the surface, and sodium metallization in micropores is avoided; na < 3 > Ti < 2 > (PO4) < 3 > is added into a positive active material, a sodium source is provided for formation of an SEI film by utilizing a reversible decomposition reaction of Na < 3 > Ti < 2 > (PO4) < 3 > at 2.1 V or above, and a sodium pre-treatment process is not needed; the positive electrode and the negative electrode adopt gradient porosity design, so that the dynamic bottleneck of a high-load electrode is effectively solved.

The invention provides a clock input buffer and electronic equipment. The clock input buffer comprises a multi-protocol input circuit, a level conversion circuit, a step-down circuit and a clock buffer circuit. The multi-protocol input circuit is adjusted to different working modes through a control signal transmitted by the control unit so as to be compatible with various input protocols, the multi-protocol input circuit processes an input signal based on a target working mode, and the level conversion circuit performs level shifting on an output signal of the multi-protocol input circuit so as to realize multi-protocol conversion. The voltage reduction circuit is used for converting the output signal into a low-voltage domain signal so as to meet the working voltage requirement of the clock buffer circuit, and meanwhile, the voltage reduction circuit is used for reducing the power supply voltage so as to provide low-voltage power supply voltage for the clock buffer circuit; therefore, the clock buffer circuit can buffer high-speed signals in different input protocols and voltage ranges by using a low-voltage domain device, and the application scenarios of the clock input buffer are greatly expanded.

The invention discloses an AlScN device with low working voltage and low leakage current and a preparation method of the AlScN device. The device comprises a bottom electrode layer, a functional layer and a top electrode layer which are stacked in sequence, the functional layer comprises an AlScN ferroelectric material, and the bottom electrode layer is in ohmic contact with the functional layer; the top electrode layer is made of low-melting-point metal with the melting point lower than 200 DEG C, and part of the low-melting-point metal element is diffused and permeated into the functional layer. According to the invention, the low-melting-point metal is used as the top electrode, the working voltage and leakage current of the top electrode can be remarkably reduced, and preferably, the low-melting-point metal is melted and diffused and permeated into the functional layer through annealing treatment to form good contact and permeation doping with the functional layer, so that deep modification of electrical properties of the functional layer is formed; the working voltage and the leakage current of the AlScN-based ferroelectric memory device can be further reduced at the same time, and the AlScN-based ferroelectric memory device has far-reaching significance for the development of the AlScN-based ferroelectric memory device.

The invention relates to the technical field of electric leakage protection, and particularly discloses a full-working-condition self-adaptive electric leakage protection device, which comprises a data acquisition module used for acquiring electrical data of electrical equipment in real time, including load current, active power and operating voltage value, and calculating the real-time electric data of the electrical equipment by combining the real-time electrical data of the electrical equipment; the real-time load state influence coefficient of the electrical equipment can be obtained through calculation in a diversified data fusion mode, the data can reflect the real-time operation condition of the electrical equipment, namely, which operation state the electrical equipment is in a no-load state, a light-load state and a heavy-load state, and on this basis, the real-time load state influence coefficient of the electrical equipment can be obtained through calculation. According to the invention, the leakage current monitoring threshold is adjusted in real time based on the real-time operation condition of the electrical equipment, so that the situation of malfunction or leakage protection caused by significant difference of parameters such as current characteristics, harmonic content and insulation stress of a power grid under different loads can be avoided, and the accuracy of a leakage monitoring result is improved.

The invention provides a temperature rise test system, and relates to the field of heating characteristic testing of power equipment. The system comprises a power supply control system, an electric field regulation and control system, an environment simulation system, a discharge detection system, a three-dimensional temperature field monitoring system and a processing system. The power supply control system simulates equipment operation voltage; the electric field regulation and control system simulates a non-uniform electric field in the equipment; the environment simulation system simulates external environment conditions; the discharge detection system detects the partial discharge condition of the equipment under the simulation condition, obtains discharge parameters and transmits the discharge parameters to the processing system; the three-dimensional temperature field monitoring system monitors temperature distribution on the surface and in the equipment and transmits the temperature distribution to the processing system; and the processing system determines an association relationship between the partial discharge condition and the temperature rise based on the temperature distribution and the discharge parameters. Through cooperation of multiple systems, the influence of the external environment and internal electrical parameters on heating of the equipment is comprehensively simulated, and the heating behavior of the equipment under the actual working condition is reflected more truly, so that the accuracy of temperature rise simulation is improved.

A compensation circuit, including: a power management circuit and a switch circuit. The switch circuit is connected to a display panel and an operational amplifier circuit connected to the display panel. In case that a feedback voltage is greater than or equal to a target threshold, the switch circuit outputs a common voltage and an operating voltage to the operational amplifier circuit and stops outputting the common voltage to the display panel; and the operational amplifier circuit receives the common voltage and the operating voltage and outputs a compensation voltage to the display panel. In case that the feedback voltage is smaller than the target threshold, the switch circuit outputs the common voltage to the display panel and stops outputting the common voltage and the operating voltage to the operational amplifier circuit; and the operational amplifier circuit stops receiving the feedback voltage and stops outputting the compensation voltage.

The invention relates to the technical field of semiconductor materials, and discloses an LED epitaxial structure with high luminous efficiency and a preparation method of the LED epitaxial structure with high luminous efficiency. Comprising a substrate, and a buffer layer, an undoped GaN layer, an n-type doped GaN layer, a multi-quantum well layer, an electron barrier layer, a p-type doped GaN layer and a hole tunneling layer which are sequentially stacked on the substrate. By implementing the invention, a PN junction is formed in the hole tunneling layer, so that a built-in cell can be formed, the current expansion effect is effectively improved, the tunneling probability of holes can be obviously improved, the luminous efficiency of an LED is improved, and meanwhile, the working voltage can be reduced.

Systems, apparatuses, and methods are described for DC bus management. During startup, a power device may provide power at different voltages to the DC bus to ramp up the voltage of the DC bus from a zero voltage level to an operating voltage level. For example, the power device may be configured to provide power at different voltage levels during the ramp up. During the ramp up, the power device may send communications to query additional devices. Based on a response to the query the power device may set the voltage level. Protocols for over-current, sleep mode, and shutdown mode may include decreasing a higher voltage level to a lower voltage level.

The invention provides a chip power consumption measurement system and method.The chip power consumption measurement system comprises a test board, a power consumption collection module and a control module, the control module sends task instructions to a chip to be tested, and the task instructions comprise any one or more of a voltage instruction, a frequency instruction and an operation core instruction; when the chip to be tested executes a task instruction, the power consumption acquisition module acquires voltage information of each test resistor and transmits the voltage information to the control module; the control module determines the test power consumption of the to-be-tested chip according to the voltage information. According to the technical scheme, the task instruction can be sent to the to-be-tested chip, any one or more of the working frequency, the working voltage and the number of the running cores of the to-be-tested chip can be changed, different use scenes can be simulated, power consumption measurement of the to-be-tested chip can be completed in different scenes, and the test power consumption of the to-be-tested chip can be accurately and rapidly obtained.

The invention provides an automobile collision unlocking method, device and equipment, a storage medium and a program product, and the method comprises the steps: detecting a collision signal in a target memory when the power supply voltage of a whole automobile recovers to a normal working voltage value from a normal working voltage value or below; and if the collision signal is detected, a vehicle door unlocking instruction is sent to a vehicle body control module. The target memory is arranged to record the collision signal, the collision signal in the target memory is detected when the power supply voltage of the whole vehicle recovers to the normal working voltage from below the normal working voltage, the target memory can still record the collision signal after power failure, and even if the power supply of the whole vehicle is switched to a closed gear after the vehicle is collided, the collision signal can be detected. After the vehicle body controller is reset, the unlocking instruction cannot be executed, collision can still be detected through the collision signal in the target memory, the vehicle door unlocking instruction is sent to the vehicle body control module to unlock the vehicle door, and reliable unlocking of the vehicle door after collision is achieved.

The invention discloses a laser wireless energy transfer dynamic MPPT control method based on an RL-PSO hybrid algorithm and a reconfigurable array system, and aims to solve the problems of power oscillation and mismatch loss caused by light spot offset of a photovoltaic array under laser dynamic irradiation. According to the method, reinforcement learning (RL) and particle swarm optimization (PSO) are fused, dynamic parameters such as the light spot moving speed and irradiance are sensed in real time through the RL, the inertia weight and learning factors of the PSO are adjusted in a self-adaptive mode, and collaborative optimization of global search and local tracking is achieved. According to the system level, a reconfigurable photovoltaic array is designed, and according to data of a light spot position sensor, battery series-parallel topology is dynamically adjusted through a switch matrix, and current matching is optimized. According to the method, double-loop control is adopted, wherein an outer-layer RL decision module dynamically switches PSO working modes according to the environment, and an inner-layer PSO module optimizes the working voltage. The system efficiency in a dynamic scene can be improved by 15%-30%, mismatch loss is reduced by 40% or above, and the method is suitable for unsteady-state energy supply scenes such as unmanned aerial vehicles and mobile robots.

Disclosed is a reset semiconductor integrated circuit that outputs a reset signal in response to a power supply voltage of a monitoring target becoming lower than a predetermined level, the reset semiconductor integrated circuit including: a voltage detection circuit; an output stage including a CMOS circuit that generates and outputs a signal according to a detection result of the voltage detection circuit; a monitored voltage input terminal to which the power supply voltage of the monitoring target is input; a reference potential terminal to which a voltage as a reference potential of a circuit is applied; an external voltage terminal which is connected to a power supply voltage terminal of the output stage to allow a power supply voltage as an operation voltage of the output stage to be applied from outside; and an output terminal to output the signal generated by the output stage.