2532 results about "Level converter" patented technology

Level shifter circuits are used to configure analog or multilevel memory cells. A level shifter circuit generates an output voltage that is above the input voltage by an offset voltage value. The magnitude of this offset voltage or the relationship between the input and output voltages of the level shifter is adjustable or programmably selectable. Adjustments can be made after the integrated circuits is fabricated and packaged. Adjustments are made by configuring bits of data in the integrated circuit to indicate the offset voltage or other parameters. These configuration bits are implemented using latches, flip-flops, registers, memory cells, or other storage circuits.

A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth. The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate.

A system, in one embodiment, includes a photovoltaic power converter. The photovoltaic power converter includes one or more photovoltaic arrays configured convert solar energy into a DC signal and two or more N-level converters coupled to a common DC bus (N being an integer greater than 2).

The invention discloses a mixed MMC-based mixed direct current power transmission system, comprising a rectifying converter station and an inversion converter station, wherein the inversion converter station adopts a mixed MMC. The direct current power transmission system has the active and reactive decoupling control capacity, can transmit power to a reactive network without the phase change failure risk and has direct current fault self-cleaning capacity; under the condition that a feeding end alternating current system has a fault; the mixed MMC has the capacity of outputting a negative level by using a full-bridge submodule, the direct current voltage output by the system can be reduced under the premise of ensuring the controllability and stability of the system, the direct current voltage can be matched with the direct current voltage of a rectifying station, and the direct current power is maintained to be continuously transmitted; due to the optimization on the number of two types of submodules in the mixed MMC, the use number of power electronic components is greatly reduced and the investment cost is reduced under the condition that the mixed modularized multi-level converter meets the stable and transient operation demands of the direct current system.

The speed of a level shifter is increased by utilizing an additional transistor to pull down the voltage on a first intermediate node, and an additional transistor to pull down the voltage on a second intermediate node. In addition, a precharge circuit is utilized to precharge the voltage on the first and second intermediate nodes to further increase the speed of the level shifter.

The present invention comprises a controller for the cascade H-bridge three-phase multilevel converter used as a shunt active filter. Based on the proposed mathematical model, the controller is designed to compensate harmonic distortion and reactive power due to a nonlinear distorting load. Simultaneously, the controller guarantees regulation and balance of all capacitor voltages. The idea behind the controller is to allow distortion of the current reference during the transients to guarantee regulation and balance of the capacitors voltages. The controller provides the duty ratios for each H-bridge of the cascade multilevel converter.

The present invention describes an electrical converter system for power supply systems, comprising at least two identical individual modules connected consecutively, characterised in that each individual module have at least four internal switching elements, at least one energy storage element and at least four connectors, wherein the connectors are paired and serve as a first and a second terminal pair; the internal switching elements of each individual module are designed in such manner that they are able to selectively connect one or both connectors of each terminal pair to the energy storage element; the cascaded connection of at least two individual modules is made in such manner that the connectors in the second terminal pair of a preceding individual module are each connected to the connectors of the first terminal pair in the respective following individual module, and at least one terminal of the first terminal pair of the first individual module of the cascaded connection and at least one terminal of the second terminal pair of the last individual module of the cascaded connection serve as terminals for the cascaded connection; and wherein the switching elements of the respective individual modules in the cascaded connection of at least two individual modules connect their respective energy storage element to the terminals of the cascaded connection in such manner that a selective serial or parallel connection of the energy storage elements is made.

An improved level shifter circuit that toggles a "flying Flip-Flop" comprising a cross-coupled inverter pair with control devices driven out of phase through a pair of cascode transistors. The cross-coupled inverter pair provides pull-up to the positive rail, clamping to a High Side-Common (HSC), and providing Hysteretic Switching. The cascode transistors restrict the pull-down of the control devices, thereby preventing continuous current conduction.

A control system for a multilevel converter includes a differential mode current regulator, a neutral point (NP) controller and a PWM controller for generating switching pulses for the multilevel converter. The differential mode current regulator generates reference voltage command signals based on a difference between reference current command signals and actual current command signals, and the NP controller determines a modified neutral point current signal in response to a DC link voltage unbalance. The NP controller utilizes the modified neutral point current signal to generate a common mode reference voltage signal. The switching pulses are generated by the PWM controller based on the reference voltage command signals and the common mode reference voltage signal.

A method of balancing the voltage of DC links in a cascaded multi-level converter (CMC) semiconductor circuit, including the steps of providing a plurality of H-bridge converters per phase in the CMC circuit and utilizing a three phase duty cycle value from the main controller to determine a normalized duty cycle value, a ceiling duty cycle value and a floor duty cycle value. The normalized duty cycle value and an output current of the CMC is used to determine the direction and polarity of a capacitor current, and utilizing the capacitor current to determine a plurality of output capacitor voltages. A voltage summation result and direction is obtained from a ceiling index pointer and a floor index pointer and the voltage summation result, direction from the ceiling index pointer and a floor index pointer are used to create a combined switching table for the H-bridge converters. A pulse width modulator is utilized to balance the voltage of the DC links and thereby eliminate DC-capacitor voltage imbalance.

The embodiment of the invention discloses an over-current protection circuit and an over-current protection method. The over-current protection circuit comprises a power source management chip, a level shifter, a GOA circuit driven by a baseplate array row and a current detection circuit, wherein the current detection circuit comprises a current detection module, a current-to-voltage converter and a voltage comparer, a first control end of the power source management chip is connected to an input end of the level shifter, an output end of the level shifter is connected to an input end of the GOA circuit, an output end of the GOA circuit is connected to a first input end of the current detection module, an output end of the current detection module is connected to an input end of the current-to-voltage converter, an output end of the current-to-voltage converter is connected to an input end of the power source management chip, and a second control end of the power source management chip is connected to a second input end of the current detection module. By implementing the over-current protection circuit and the over-current protection method disclosed by the embodiment of the invention, a panel can be prevented from being burnt.

A power conversion system includes two three-level converters, and a phase shifted transformer coupled to the converters.

The embodiment of the invention discloses an overcurrent protection circuit, and the circuit comprises a level converter and a substrate array line drive (GOA) circuit in electrical connection with the level converter. The circuit also comprises a current detection circuit, a current-voltage converter, a voltage comparator, a timer control register, and a logic gate circuit. The GOA circuit is connected with the current detection circuit, and the current detection circuit is connected with the current-voltage converter. The current-voltage converter is connected with the in-phase input end of the voltage comparator, and the inverted-phase input end of the voltage comparator is connected with a reference voltage. The output end of the voltage comparator is connected with the input end of the timer control register and the first input end of the logic gate circuit. The output end of the timer control register is connected with the second input end of the logic gate circuit. The output end of the logic gate circuit is connected with the level converter. According to the embodiment of the invention, the circuit can prevent the wrong triggering of an overcurrent protection operation. The invention also provides a liquid crystal display comprising the circuit.

Level shifter circuit which can make an efficient level shift to level up or level down according to a change of a digital logic characteristic, including a comparator for comparing an up/down control signal to a reference signal in disabling either one of the level up shifter or the level down shifter according to the up/down control signal, a level up shifter unit for leveling up of an input voltage in response to a level up shifter/level down shifter disable signal from the comparator, a level down shifter unit for leveling down of an input voltage in response to a level up shifter/level down shifter disable signal from the comparator; and an analog multiplexer for selectively providing a leveled up signal or a leveled down signal from the level up shifter unit or the level down shifter unit.

Recent efforts are underway to develop LSI circuits that operate at power supply voltages of 1-V or lower. It is a desire that this low core voltage circuits interface to 3.3-V I/O supply. A charge pump level converter for dual power supply application is proposed using low power and high speed interface to higher I/O supply. This circuit does not consume DC power it is suitable for low power and high speed interface and can be implemented using complementary metal-oxide-semiconductor (CMOS) fabrication processes.

The present invention provides a voltage level shifter for use in a digital circuit having a low voltage portion and a high voltage portion. The voltage shifter comprises an interface circuit 20,32,60 that senses transitions in a low voltage digital signal from an old value to a new value and uses these to trigger latching of the new value. The latch can be a SR latch 34,62 with its set 40 and reset 42 inputs coupled to pulse generators 46,68,58,70 respectively responsive to rising and falling edges in the input low voltage signal being passed from the low voltage portion to the high voltage portion. Feedback from the output on the latch 62 can be controlled to limit the duration of the pulses from the pulse generators 68,70 and thereby reduce power consumption due to the dc current leakage associated with a low voltage to high voltage signal interface.

The invention relates to a modularized multi-level converter sub-module control and protection method. The control and protection method comprises the following processing modes: in four control models of a sub-module, executing different control and protection logics by using a sub-module controller; generating a sub-module internal interface output signal, detecting an input signal and diagnosing a plurality of faults; executing control and protection actions by using the sub-module controller according to an action priority level; detecting the voltage of an energy storage capacitor C by using the sub-module controller; and performing asynchronous serial communication between the sub-module controller and a valve-based controller. In the method, a complete and intelligent control and protection scheme is designed aiming at the structure of the modularized multi-level converter sub-module, the coordinated control and protection of the overall sub-module can be realized, so that the stable and reliable operation of the sub-module in a converter and the coordinated matching with an overall control and protection system of the converter are ensured.

Disclosed is a controller of a grid coupled type doubly-fed induction generator having a multi-level converter topology, which can control the doubly-fed induction generator having a high voltage specification and can perform a fault ride-through function, an anti-islanding function and a grid voltage synchronization function required for a dispersed power generation facility. The controller makes a H-bridge multi-level converter generate a three-phase voltage waveform resulted from the structure that single-phase converters each being composed of a 2-leg IGBT are stacked in a serial manner, and controls a rotor current so as to make the rotor coil of the doubly-fed induction generator in charge of a slip power only. The boost converter is composed of a 3-leg IGBT and a boost inductor generating a direct current voltage of its source required for the H-bridge multi-level converter.

A tri-phase modular multi-level converter and a fault-tolerate detecting method for an IGBT (insulated gate bipolar translator) open circuit fault in sub-modules thereof belong to the field of electronics and aim to solve the problem that the whole machine cannot work caused by the open circuit fault of the existing MMC. The invention adopts a method of connecting two hemi-bridge power units in parallel in each sub-module of the converter, and the IGBT with the open circuit can be positioned by measuring the output voltage UA of the sub-modules and simultaneously applying a certain phase shift control on the IGBTs in the two hemi-bridge power units in at most half alternating current period, and the modular multi-level converter can be continuously operated when any IGBT in any sub-module is subjected to open circuit fault, thus solving the problem of low reliability and frequent halt for repairing of the traditional modular multi-level converter. In addition, the conducting loss of the IGBT can be reduced due to the parallel connecting work mode of the power units and the converting efficiency of the electric energy of the converter is improved.

A voltage level shifting circuit (10) transitions an input signal at a first voltage to a second voltage higher than the first voltage. A cross-coupled latch provides the second voltage. Cascode configured transistors (16, 26) are connected in series with input transistors (18, 28) that receive the first voltage in complementary form. Capacitive devices (34, 40) are connected between the first voltage and gates of the cascode configured transistors for allowing independent small signal variations to occur on the gates of the cascode configured transistors for better control of duty cycle and rise and fall time matching of the level shifting circuit. Isolation devices (32, 38) permit independent modification of small signal voltages to occur on the gates of the cascode configured transistors.

The invention relates to a complex control system and method of a modular multi-level converter. The method is characterized in that each submodule capacitor voltage of an upper bridge arm and a lower bridge arm on the modular multi-level converter, currents of the upper and lower bridge arms and a power supply voltage of an alternating current (AC) side are detected, and a master controller carries out an operation on each submodule capacitor voltage, the currents of the upper and lower bridge arms and the power supply voltage of the AC side to obtain the public pulse-width modulation (PWM) duty ratio of the upper and lower bridge arms; an upper and lower bridge arm controller carries out an operation on each submodule capacitor voltage of the upper and lower bridge arms and the public PWM duty ratio of the upper and lower bridge arms to obtain the PWM duty ratio of each submodule of the upper and lower bridge arms; and the PWM duty ratio of each submodule is processed by a PWM signal generator so as to generate PWM control signals of each submodule, thus realizing balance control of each submodule capacitor voltage of the convertor and current and voltage control of the convertor. The complex control system is not required to use a special charge-discharge power circuit for a capacitor, can be applied to any PWM node, controls circulating flow flexibly, meets special demands, and is specific in physical significance and sufficient in theoretical foundation.

Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. Timing of control signals can be adjusted via internal and/or external components so as to minimize shoot trough currents in the high voltage devices. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.

The present invention relates to a device for individually driving OLED/LED elements of an OLED/LED string, comprising for each OLED/LED element of the string: a controllable shunting switch (22, 42) coupled with the respective OLED/LED element (14, 15), switch controller means (30, 44) for controlling said shunting switch (22, 42) and having a control output port coupled to said switch (22, 42), a data input port and a clock input port, level shifting means (32) assigned to said switch controller means (30, 44) and adapted to bring the control input data to a level sufficient to be accepted by the switch controller means (30, 44) during a programming mode and to allow the control of said shunting switch (22, 42). Said switch controller means (30, 44) of said OLED/LED elements (14, 15) are provided to form a serial-to-parallel converter means (31).