50 results about "RC circuit" patented technology

The invention relates to the technical field of power electronics, and discloses an alternating-current static switch topology with a buffering function and a design method of the alternating-current static switch topology. The alternating-current static switch topology comprises a bridge circuit and a buffer circuit, the buffer circuit comprises a first resistor, a first capacitor and a piezoresistor, the first resistor and the first capacitor are connected in series and then connected to the two ends of the bridge circuit in parallel, and the piezoresistor is connected to the two ends of the bridge circuit in parallel. According to the alternating-current static switch topology, the IGBT transistors of the bridge circuit achieve circuit mu s-level rapid opening and closing switching, and opening and closing rapidity is guaranteed; when the IGBT transistor of the bridge circuit is switched off, the piezoresistor of the buffer circuit and the RC circuit absorb the peak voltage of the IGBT transistor when the large current is switched off, so that the IGBT transistor is prevented from generating relatively high voltage stress due to system inductive reactance, the safe and stable work of the IGBT transistor in the bridge circuit is ensured, and the reliability and the stability of the application of the alternating current static switch are improved.

The present disclosure relates to a battery cell balancing apparatus and method, and a battery management system, and provides a battery cell balancing apparatus and method for balancing a battery cell even when an abnormality has occurred in an internal circuit of a battery management system (BMS). A mechanism can also extend the service life of the battery pack by allowing a balancing function to be used to the maximum within a range in which cell voltage measurement errors can be compensated. To this end, the present disclosure provides a configuration to determine whether an abnormality has occurred in an RC circuit of a BMS based on a cell voltage of a battery cell measured by the RC circuit, and to control a switching time of a balance switch to compensate for a cell voltage measurement error caused by the abnormality in the RC circuit.

The invention relates to the technical field of power electronics, and discloses an alkaline electrolytic cell shutdown discharge circuit which comprises a voltage sampling module, a logic control module, a solid-state switch driving module, a bleeder resistor module and a protection module. The voltage sampling module monitors direct-current high voltage of the electrolytic cell in real time and generates low-voltage signals. The logic control module receives the low-voltage signal, compares preset upper and lower threshold voltages, and generates a control signal or a stop signal. And the solid-state switch driving module amplifies the control signal and drives the power switch device to be switched on. The bleeder resistor module converts electric energy into heat energy for dissipation through a power switch device and a bleeder resistor. The protection module absorbs turn-off surges through a fast recovery diode or an RC circuit to protect the power switch device. The system adopts an all-solid-state device to replace a mechanical relay, avoids arc generation, realizes rapid and controllable discharge through closed-loop control, prolongs the service life of equipment, and is suitable for shutdown discharge requirements of the alkaline electrolytic cell in an industrial environment.

Disconnecting device (30, 30') for a battery comprising several interconnected battery cells (21, 22, 23, 24) and a first and a second power supply connection (18, 19), wherein the disconnecting device (30, 30') comprises a disconnecting element (31), in particular a pyrotechnic disconnecting element (31), with which the battery cells (21, 22, 23, 24) or a part thereof can be disconnected from at least one power supply connection (18, 19) in the event of a short circuit, and wherein the disconnecting device (30, 30') further comprises a passive current- or voltage-controlled release circuit (32) which is connected in parallel to one or more battery cells (21, 22, 23, 24), wherein the release circuit (32) is a current-controlled release circuit and the release element (321) is an RC circuit (C1, R11, R12) with a capacitor (C1) serving as a current source, which is connected in series with at least one series resistor (R11, R12),wherein the triggering circuit (32) further comprises an ignition circuit (33) connected in parallel to a triggering element, which is adapted to trigger upon a predefined voltage drop in one or more of the battery cells (21, 22, 23, 24) and to close the current path to the pyrotechnic isolating element (31), and the ignition circuit (33) comprises at least a fuse resistor (R2) and a thyristor (T1), characterized in that the triggering circuit (32) is a current-controlled triggering circuit and the fuse resistor (R2) is smaller than a series resistor (R11, R12).

The invention provides a down-sampling repetitive controller applied to a three-phase four-leg inverter, and the controller comprises an ADC sampling unit which is used for sampling an output phase voltage and an inductive current of the three-phase four-leg inverter at a switching frequency F (S), and converting the output phase voltage and the inductive current into an alpha beta 0 reference system through Clark transformation; the repetitive control unit is used for subtracting the output phase voltage and the inductive current after the Clark transformation from a reference voltage and a reference current to obtain an error voltage signal and an error current signal, applying the error voltage signal and the error current signal to an RC (Resistance-Capacitance) circuit, and performing down-sampling according to a preset proportion; and performing state feedback control on the output of the RC circuit so as to generate a three-dimensional space vector modulation component to act on the three-phase four-leg inverter. The method has the advantages that (1) a closed-loop system pole is arranged by using a state feedback strategy to stabilize the system, so that LPF does not need to be introduced; and (2) designing an integer phase lead compensator.

The invention discloses a gate oxide layer protection circuit, a chip and electronic equipment, and belongs to the technical field of electronic circuits. Two trigger signals are sent out in response to the voltage of a power rail through a series RC (Resistance-Capacitance) circuit; the series RC circuit responds to the condition that the voltage of the power rail is larger than a preset value, sends a connection trigger signal from a first node to connect the switching circuit, responds to the condition that the voltage of the power rail is smaller than the preset value and peak voltage appears, and sends a disconnection trigger signal from the first node based on the coupling effect of the first capacitor to cause the switching circuit to be disconnected. The first node is a common contact of the first resistor and the first capacitor; the functional circuit is connected with the first power rail, comprises a field effect transistor and is used for executing corresponding functions; the switching circuit responds to the connection trigger signal to connect the grid electrode of the field effect transistor and the second power rail, and responds to the disconnection trigger signal to disconnect the connection between the grid electrode of the field effect transistor and the second power rail; therefore, the reliability of the chip is improved.

The present invention provides a clock signal generator and a frequency trimming method that can trim the clock frequency with high resolution. [Solution] The clock signal generator includes an oscillator circuit and a charge transfer capacitor. The oscillator circuit is configured to generate a clock signal and includes a comparator and a resistor-capacitor (RC) circuit, the RC circuit including a capacitor. The charge transfer capacitor is connected to the RC circuit. The frequency of the clock signal is trimmed by injecting or extracting charge associated with the RC circuit through the charge transfer capacitor.

The utility model discloses a dead zone insertion circuit based on a gate-level circuit, and belongs to the technical field of gate-level circuits. A first input end of a first NAND gate is connected with a first complementary signal; the input end of the first NOT gate is connected with the first input end of the first NAND gate; the first resistance-capacitance circuit is connected with the output end of the first NOT gate through a first resistor; the first input end of the second NAND gate is connected with a second complementary signal, and the second input end of the second NAND gate is connected with the first resistance-capacitance circuit through a second resistor; the input end of the second NOT gate is connected with the first input end of the second NAND gate; the second resistance-capacitance circuit is connected with the output end of the second NOT gate through a third resistor; the first end of the fourth resistor is connected with the second input end of the first NAND gate, and the second end of the fourth resistor is connected between the third resistor and the second resistance-capacitance circuit. The beneficial effects are that through cooperation of the NAND gate, the NOT gate and the resistance-capacitance circuit, the circuit structure is simple, the safety and reliability of circuit work are improved, and the cost is low.

This utility model relates to the field of general circuit technology, specifically to a stable and anti-interference fast power-on / off RC reset circuit; it includes an RC reset circuit and a MOSFET interlock circuit. The RC reset circuit includes resistors R1 and R2, capacitor C, diode D1, and power supply equivalent impedance RL. The MOSFET interlock circuit includes transistors M1, M2, M3, M4, M5, and I1, where I1 is a logic gate OR gate. The RC reset circuit of this design adds a MOSFET interlock structure to the traditional circuit architecture to generate high and low levels, which are then used by logic gate circuits to generate high and low voltage signals, suppressing reset signal jitter that may be caused by power supply noise or environmental interference. At the same time, the RC reset circuit uses a MOS resistor instead of a traditional resistor and utilizes its own substrate diode as a capacitor discharge diode, which can accelerate the discharge of capacitor C. Furthermore, a resistor discharge branch connected in parallel with capacitor C is added to achieve fast reset of the RC circuit when the power supply is rapidly powered on or off.

The application provides a bus fast-charging station orderly charging method considering battery dynamic charging loss, comprising: determining the power demand meeting bus line operation according to the operation time of the charging station, equipment power limit, quantity limit and bus departure plan; establishing a battery heat loss model and the relationship between charging energy conversion efficiency and the actual charging power of the vehicle-mounted energy storage system based on a first-order RC circuit model; taking the minimum actual power consumption of the charging station in a day or the minimum actual electricity cost of the charging station in a day as an objective function, wherein the battery heat loss is considered, and an optimization model is established with the charging station operation time, charging pile number, charging pile maximum power, power distribution capacity, electric bus travel power demand, electric bus charging time continuity as constraint conditions; using piecewise linearization to convert the nonlinear optimization objective function model into a mixed integer convex programming problem, and solving the mixed integer convex programming problem to obtain the optimal charging plan, including the optimal charging time and corresponding charging power of each vehicle. The method improves the charging energy conversion efficiency, reduces the battery heat loss and prolongs the service life of the battery, reduces the charging cost of the bus while improving the charging energy conversion efficiency, and improves the economy.

The application discloses a radio frequency chip integrated with an RC circuit on a chip, which comprises a substrate, an epitaxial layer, an active region arranged on the epitaxial layer, a plurality of resistance-capacitance combination structures arranged between a gate of the active region and an input metal pad on the epitaxial layer, resistance and capacitance of the resistance-capacitance combination structure being connected in parallel, and the gate of the active region being connected to the input metal pad through the resistance-capacitance combination structure. The radio frequency chip integrated with the RC circuit on the chip integrates the RC circuit in the chip, and the gain and robustness of a radio frequency power device at low and high frequencies are improved.

The application provides a leakage current switching control circuit and a laser treatment instrument, and the circuit comprises a power grid EMC unit, an auxiliary power supply unit, a power grid EMI unit, a sampling comparison unit and a leakage current switching unit; the power grid EMI unit comprises a first RC circuit, a second RC circuit, a third RC circuit and a fourth RC circuit; the sampling comparison unit comprises a comparator, and the leakage current switching unit comprises a first relay and a second relay; the comparator outputs a low-level signal to the coils of the first relay and the second relay when an alternating current power supply inputs a first voltage, so that the normally open switches of the first relay and the second relay are kept in a normally open state; the comparator outputs a high-level signal to the coils of the first relay and the second relay when the alternating current power supply inputs a second voltage, so as to control the normally open switches of the first relay and the second relay to switch to a closed state; and the first voltage is greater than the second voltage. The application can control the leakage current to be unchanged when the input voltage is reduced.

A condition monitoring system for determining the presence of a change in moisture content in a fat. The system includes a sensor electrode disposed within a space in which the grease is located. Suitably, the electrode is a plate having a surface area that generates capacitance C. The resistor R is combined with the resistor R to generate an RC circuit. The system senses the RC circuit. The dielectric constant of the monitored grease varies according to the moisture content of the grease. The change in dielectric constant will change RC, which is then sensed by the system. Analysis of RC changes will determine whether there is a change in the water content level in the monitored fat.

The application discloses a voltage reduction power supply circuit and electronic equipment, and belongs to the technical field of electronic circuits. The voltage reduction power supply circuit comprises a series RC circuit, a power-down circuit and a switch circuit. The series RC circuit comprises a first capacitor component and a first resistor component in series connection. The series RC circuit is connected to an input voltage, and outputs a voltage signal on the first capacitor component according to the input voltage. The power-down circuit is used for discharging the energy on the first capacitor component in response to the input voltage being less than a preset voltage. The switch circuit is connected to the input voltage. The switch circuit converts the input voltage into an output voltage in response to the voltage signal being greater than or equal to a preset value, and disconnects the output voltage in response to the voltage signal being less than the preset value. Therefore, the voltage reduction power supply circuit meets a timing constraint.

A hybrid solid-state switching device relates to the field of low-voltage electrical technology and comprises a control module and a body, the body comprises a power supply module, a main control board, a first drive control board, a second drive control board, an isolation switch and two hybrid switches, and the two hybrid switches are sequentially connected with an external power supply in series; the hybrid switch comprises a piezoresistor, a mechanical switch, an insulated gate bipolar transistor and an RC circuit which are connected in parallel; the isolating switch is electrically connected with the first driving control board and is connected in series with any hybrid switch, or is connected in series with an insulated gate bipolar transistor of any hybrid switch and then is connected in parallel with the piezoresistor, the mechanical switch and the RC circuit; the mechanical switch is electrically connected with the second driving control board; the control module is in signal connection with the main control board, the main control board is in signal connection with the first drive control board and the second drive control board, and the power supply module is electrically connected with the main control board, the first drive control board, the second drive control board and a branch where the insulated gate bipolar transistor is located. The device has the characteristics of high on-off speed, no arc generation, low on-state loss and long service life.

This disclosure provides a parameter calibration method, a resistive-capacitive circuit, a traction power supply system, and a train, relating to the field of rail vehicle technology. The parameter calibration method includes: performing spectral analysis on the overvoltage signal of an on-board voltage transformer to obtain multiple oscillation frequency components of the overvoltage signal; based on the suppression effect of the first resistive-capacitive sub-circuit on the multiple oscillation frequency components in the overvoltage signal, determining a first constraint condition between the first resistance value and the first capacitance value of the first resistive-capacitive sub-circuit through network function analysis; based on the first constraint condition, analyzing the influence of the first resistive-capacitive sub-circuit on the electrical characteristics of the on-board voltage transformer to determine the first resistance value and the first capacitance value; and based on the impedance suppression effect of the second resistive-capacitive sub-circuit, determining the second resistance value and the second capacitance value of the second resistive-capacitive sub-circuit through equivalent impedance analysis.

An integrated circuit is disclosed. The integrated circuit comprises an input interface and an optical receiver. The optical receiver includes a photodiode, level shifter, and differential transimpedance amplifier (TIA). The photodiode has a cathode and anode terminal and is configured to receive an optical signal via the input interface. The level shifter includes a parallel RC circuit. The differential TIA has first and second conversion circuits. The first conversion circuit is connected to the cathode terminal and a first output terminal of the optical receiver. The second conversion circuit is connected between the anode terminal and a second output terminal of the optical receiver. The parallel RC circuit is connected between the cathode terminal of the photodiode and the first conversion circuit. The differential TIA is configured to provide a differential voltage signal at the first and second output terminals of the optical receiver based on the optical signal.

The invention provides a selection switch, an on-load voltage regulation decomposition switch and a distribution transformer thereof, and relates to the technical field of on-load voltage regulation of distribution transformers, and the selection switch comprises a first silicon carbide N-type insulated gate bipolar transistor, a first RC circuit, a second RC circuit and a second silicon carbide N-type insulated gate bipolar transistor, the collector electrode of the first silicon carbide N-type insulated gate bipolar transistor, the first end of the first RC circuit, the second end of the second RC circuit and the emitter electrode of the second silicon carbide N-type insulated gate bipolar transistor are connected; the emitter of the first silicon carbide N-type insulated gate bipolar transistor, the second end of the first RC circuit, the first end of the second RC circuit and the collector of the second silicon carbide N-type insulated gate bipolar transistor are connected. According to the invention, arc-light-free switching of the distribution transformer can be realized.

The utility model relates to the technical field of energy storage, in particular to a maximum pulse width limiting circuit based on a DQ trigger and a logic gate, which comprises the DQ trigger, a logic AND gate circuit and an RC circuit, the clock end of the DQ trigger is connected with the PWM generator, and the data end D and the setting end Sn of the DQ trigger are connected with a fixed high level; and a negative output pin Qn and a reset pin Rn of the DQ trigger are connected to the RC circuit. The maximum pulse width limitation is directly realized through hardware logic, and the problems of high response delay and dependence on software reliability in the prior art are solved by utilizing the rising edge detection characteristic of the DQ trigger, the charging and discharging characteristic of the RC network and the real-time comparison function of the logic gate without software intervention.

The utility model discloses a power adapter capable of realizing automatic power off after full charge, which comprises a shell, an adapter body and a charging seat, a cavity is arranged in the middle of the shell, one side of the adapter body is slidably connected in the cavity, a driving structure for driving the adapter body to slide is arranged in the cavity, and the charging seat is arranged in the cavity. One end of the adapter body is fixedly provided with a contact head, the other end of the adapter body is provided with a USB interface, and one side of the shell is provided with a 555 timer; according to the utility model, the 555 timer is adopted, the charging duration is preset, the power-off time is accurately controlled in combination with the RC circuit, active mechanical power-off can be realized through the structure of the electric motor and the gear rack in the driving structure, and when the charging time of the adapter reaches the set duration, the adapter body is physically separated from the charging seat, the circuit is thoroughly cut off, and the power-off efficiency is improved. Standby power consumption and device aging risks are avoided, and use is safer.

The invention discloses a lithium battery RC circuit model characteristic parameter lossless direct identification method, which comprises the steps of initializing a lithium battery to be detected to be in a zero state, connecting a load RL to the output end of the lithium battery, applying constant direct-current voltage excitation, collecting a current response signal of the lithium battery, calculating a transient response difference factor, a basic identification factor and an average value of the transient response difference factor and the basic identification factor, calculating a discrete characteristic transfer factor and a dynamic attenuation characteristic quantity, calculating a dynamic identification construction coefficient, an average value of the dynamic identification construction coefficient and a dynamic response estimation parameter, and analyzing characteristic parameters of an internal resistance value, a polarization resistance value and a polarization capacitance value of the lithium battery circuit model; according to the method, the lithium battery is used as a monitoring object, the characteristic parameters of the lithium battery are monitored in real time, a simulation model of the lithium battery is constructed, the identification method is verified through experiments, and experimental results confirm that on the premise that the lithium battery is not disassembled or damaged, the identification efficiency of the lithium battery is greatly improved. And the size of the characteristic parameters of the RC circuit model of the lithium battery can be accurately estimated.

The invention provides a low-power RC oscillator circuit and a working method thereof. The low-power RC oscillator circuit comprises a chopper circuit, a path delay offset loop, a power supply structure and an RC circuit, the chopper circuit is connected with the path delay offset loop and the RC circuit and is used for eliminating the offset influence of the comparator; the path delay counteracting loop is also connected with the RC circuit and is used for extracting delay to counteract path delay; the power supply structure is used for supplying power to the chopper circuit, the path delay offset loop and the RC circuit; the RC circuit is used for generating an oscillation signal; therefore, the frequency precision of the circuit is improved, the performance of low voltage and low power consumption is realized, and a more stable clock signal is realized under the condition that the temperature and the power supply change.

The present disclosure relates to a method for detecting a user (U1) approaching a terminal (T1) within a detection distance (D), the method comprising: feeding a LED, by electrical pulses, between an RC circuit connected to a voltage source and a first resistor connected to ground, the LED illuminating a detection zone with light pulses; capturing by a photodiode light pulses coming from the detection zone; determining a pulse count representative of a time-of-flight of a light pulse emitted by the LED and received by the photodiode; computing a count variation by subtracting a reference count from the pulse count, the reference count being determined when no object is present in the detection zone; comparing the count variation with a threshold corresponding to the detection distance; and triggering an operation when the count variation is lower than the first threshold.

The present disclosure relates to a battery cell balancing device and method, and a battery management system, and the technical problem to be solved is to provide a mechanism capable of increasing a service lifespan of the battery pack by allowing a balancing function to be maximally used in a range in which a cell voltage measurement error may be compensated for even when an abnormality has occurred in an internal circuit of the battery management system (BMS). To this end, the present disclosure provides a configuration of determining whether an abnormality occurs in an RC circuit based on a cell voltage of a battery cell measured through the RC circuit of the BMS, and controlling a switching time of a balancing switch to compensate for a cell voltage measurement error caused by the abnormality in the RC circuit.

This utility model discloses a circuit structure for automatic power-on reset of a chip to enter a readable mode, including an RC circuit, an oscillator, logic gates, and D flip-flops. The logic gates are connected to the RC circuit, the oscillator, and the D flip-flops respectively. When the RC circuit is powered on, it generates a high-level active power-on reset signal POR_1. The oscillator internally generates a high-level active synchronous reset signal POR_2 and a clock signal. After receiving the power-on reset signal POR_1 and the synchronous reset signal POR_2, the logic gate generates a low-level active clear signal, which clears all D flip-flops inside the chip. After all D flip-flops are cleared, the clock of the D flip-flops operates normally, outputting a POR signal of 1. Simultaneously, the synchronous reset signal POR_2 of the oscillator is turned off, releasing the reset state, and the chip's registers automatically enter a forced data read mode. This allows the chip to directly read data without configuring the registers after power-on.

The application discloses a timing control circuit and method, relates to the field of electronic system power management, and aims to solve the problems of high cost of an existing integrated chip scheme and timing contradiction of a traditional RC circuit. The circuit comprises a timing control signal module and three types of control branches, namely, a first control branch, a second control branch and a special control branch, and capacitors are connected to a preset voltage V. A unidirectional control charging and discharging circuit is controlled by a Schottky diode, the charging timing is determined by the resistance value of a branch charging resistor and the capacitance value, the power-off timing is determined by the discharging resistor and the capacitance value, the core voltage is powered on first, the IO voltage is powered on later, the IO voltage is powered off first, and the core voltage is powered off later. The method comprises the steps of capacitor resistor configuration, power-on and power-off triggering, charging and discharging control and completion determination, can be expanded to more than two paths, and is low in cost and high in timing precision.

The invention relates to the field of power electronic converter devices and technologies, in particular to a CPLD (Complex Programmable Logic Device)-based power converter front-back stage time delay circuit and a control method, aims to realize front-back stage time sequence control of a two-stage switching power supply by adopting logic devices such as a CPLD and the like, and is particularly suitable for a Buck-LLC switching power supply topological structure. According to the invention, accurate and rapid delay setting and adjustment are realized by matching a logic gate in the CPLD device with an external RC circuit. By means of the method, the occupancy rate of macro cells in the CPLD can be greatly reduced (actually measured from 83% to 55%), the overall scheme is simple and easy to implement, the development period is short, the circuit is simple, and meanwhile the stability and safety of the switching power supply converter are effectively improved.

The invention discloses a TTL signal verification device and method, and relates to the technical field of electronic information automation component manufacturing, and the device comprises a 555 timer which receives an input BIN signal; the RC circuit is configured outside the 555 timer, the pins of the 555 timer comprise output pins, when the BIN signal is lower than a first voltage threshold value, the 555 timer outputs high-level voltage through the output pins, and when the voltage of the charging capacitor reaches a second voltage threshold value, the 555 timer outputs high-level voltage through the output pins. The 555 timer is used for outputting a low-level voltage through the output pin; the LED indicating lamp is lightened when the 555 timer outputs the high-level voltage through the output pin, so that the LED indicating lamp can be seen by naked eyes; when a new machine is accepted and accepted, the TTL signal can be verified to be separated from the sorting machine for detection, the production efficiency of the sorting machine is effectively improved, meanwhile, the correctness of the TTL signal is judged in the mode that an LED lamp is triggered through a BIN signal, and the TTL signal verification time of a testing machine is saved.