588 results about "RC circuit" patented technology

A micropower RC oscillator having stable frequency characteristics with varying temperature includes a number of inverting circuits which are driven by an external driving voltage and connected in series with each other and an RC circuit having a resistor disposed in between a head-inverter and a tail inverter to form a closed loop and a capacitor disposed between the tail-inverter and the head-inverter. The resistor comprises a plurality of unit resistors constituting of a P+ diffusion resistor and a polysilicon resistor having opposing characteristics with respect to temperature variation at a predetermined ratio. A resistance regulator controls the resistance of the resistor by decoding an external resistance setting data to select a unit resistor that determines the oscillation frequency effectively. A driving voltage circuit receives a reference signal having the voltage level which is stable against the temperature variation by using a current source and a load having opposing characteristics with respect to the temperature variation and provides as a driving voltage of the RC oscillating circuit after increasing a fan-out capacity of the reference signal. An output level shifting circuit can be added to the rear side of the RC oscillating circuit to adjust the voltage level of the oscillation signal with the appropriate standard required at a receiving end.

An active radio frequency identification (REID) tag implemented on a flat label. The tag includes a battery printed on the label, a flat wide-band antenna printed on the label and a wide band communication circuit implemented as a chip inlay inside the label. The circuit is attached to the battery and to the antenna. The combined thickness of the battery, the antenna and the circuit as printed on the flexible label is less than one millimeter. The battery, the antenna and the circuit are printed on the label so as to render substantial flexibility to the RFID tag. The circuit operates at a center frequency of at least one gigahertz and a bandwidth at least twenty percent of said center frequency or a bandwidth at least 500 Mhz. The tag typically includes an inaccurate clock source such as an RC circuit and does not include a crystal. Average power consumption of the battery is preferably reduced by operating the tag with a low duty ratio between an active and an inactive interval; and during the active interval transmitting in bursts while turning off parts of the tag between the bursts. The communications circuit performs timing measurements on incoming received waveforms and transmits transmit signals in response to the received waveforms with timing based on the timing measurements. The receiver circuitry locks on a repetition frequency of the incoming received waveforms, and based on the repetition frequency generates a pulse repetition frequency of the transmit signals.

A semiconductor integrated circuit device includes: a protected circuit protected against electro-static discharge applied from outside the device; an SCR protection circuit having an anode terminal connected to a power line, a cathode terminal connected to a ground line and a trigger terminal; and a trigger circuit connected to the trigger terminal and including an RC circuit connected between the power line and the ground line.

A method of remote sensing a charge includes charging or discharging a capacitor of an RC circuit to a predetermined threshold voltage using a power source. A response signal is provided from a communications module to a handheld computing device comprising a reader system once the capacitor reaches the predetermined threshold voltage. An amount of time taken for the handheld computing device to receive the response signal is determined using a processor. The processor determines charge information using the amount of time.

A method of transforming a first topology to a reduced topology is disclosed. One preferred embodiment of the present invention includes a method of transforming a circuit from a first topology to a reduced topology, said first topology comprising a plurality of inter-connected circuit elements. The method comprises the steps of: (a) identifying one or more circuit elements; (b) analyzing the effect of reducing one or more of said identified circuit elements on the topological and physical characteristics of said circuit; and (c) if the effect satisfies a first standard, generating a second topology reflecting the reduction of one or more identified circuit elements.