72 results about "Off time" patented technology

The application relates to a critical conduction mode control method of a totem-pole PFC converter, which utilizes energy equivalence to determine the resonance process of inductor current at switching commutation, carries out totem-pole Boost inductor current value estimation, and on this basis, utilizes a current zero-crossing point prediction algorithm to calculate the turn-on and turn-off time to generate corresponding active tube-synchronous rectifier tube commutation dead time T d,f , synchronous rectification conduction time T SR , rectifier tube-active tube commutation dead time T d,r ; the PWM drive signals of high-speed switching tubes Q1 and Q2 are generated by T on , T d,f , T SR , T d,r ; the power frequency drive signals of low-speed switching tubes Q3 and Q4 are generated by comparing the input alternating voltage v ac with a hysteresis comparison loop and 0. The method can effectively get rid of the dependence on a current zero-crossing detection circuit and a current sensor, reduces the cost and improves the system stability.

This utility model discloses a switch control circuit with adjustable on / off phase, including a parameter setting unit that inputs a preset on / off phase value or a preset on / off time value; a zero-crossing detection unit that generates and outputs a zero-crossing synchronization signal; a control unit that uses the zero-crossing synchronization signal as a phase calculation reference and controls the switch unit to perform on / off actions based on the preset on / off phase value or preset on / off time value; a correction detection unit that outputs a phase correction signal; and a control unit that calculates and corrects the phase deviation of the control unit's on / off actions based on the phase correction signal. Thus, the zero-crossing detection unit continuously outputs a zero-crossing synchronization signal, the control unit uses the zero-crossing synchronization signal as a phase calculation reference, combines the preset on / off phase value or preset on / off time value to control the switch unit to perform on / off actions, and corrects the phase deviation based on the phase correction signal from the correction detection unit, ensuring stable on / off control. It features flexible sampling methods, high control accuracy, and a wide range of applications.

The application discloses a backlight erasing method and device, equipment and storage medium, relates to the display technical field, and is applied to a display device. The display device contains multiple rows of physical backlight partitions, and the method comprises the following steps: acquiring a preset lighting frequency of each row of physical backlight partitions within a frame time; dividing each row of physical backlight partitions into multiple logical rows according to the preset lighting frequency; determining the total number of logical rows that need to be lighted within the frame time according to the total number of physical backlight partitions and the preset lighting frequency; determining the reference time occupied by each logical row according to the total number of logical rows and the refresh rate of the display device; generating the on-off time sequence of the multiple rows of physical backlight partitions within the frame time based on the total number of logical rows and the reference time; and controlling the multiple rows of physical backlight partitions to perform lighting and extinguishing operations according to the on-off time sequence, so as to realize backlight erasing. The application realizes stable and flicker-free backlight erasing effect.

The application discloses a fixing device for solving the difficulty in connecting a 10kV line cable and a bypass cable, and mutually clamped first clamping jaws and second clamping jaws, one end of the first clamping jaws and the second clamping jaws is connected with a clamping piece, the inside of the upper end clamping piece of the first clamping jaw is provided with a hanging head, and the inside of the lower end clamping piece of the second clamping jaw is provided with a cable bridging device. The device is provided with safety reduction safety risks. In the load transfer work of the 10kV line cable head in the station, after the device is used, the phase-to-phase short circuit risk is reduced, the safety of the operating personnel is effectively guaranteed, and the economic benefit of the company is effectively improved. Under normal circumstances, the 10kV line in the transformer substation needs to be powered off for primary and secondary equipment maintenance, testing, and comprehensive self-reconstruction, which causes a large number of households to be powered off and a long power-off time. After the device is used, the whole station power-off can be avoided, the power supply capacity is improved, and the labor intensity is reduced.

The application discloses a dead time control circuit and electronic equipment, and belongs to the technical field of electronics. The dead time control circuit comprises an inductive element, a first field effect tube connected with the inductive element, a second field effect tube connected with the inductive element and the first field effect tube, a detection circuit for detecting a first switching state of the first field effect tube, a second switching state of the second field effect tube and a current flow direction of the inductive element, a logic judgment circuit for outputting an adjustment mode signal of a dead time, a first off time and a second off time according to the first switching state, the second switching state and the current flow direction, an operation circuit for outputting a dead time control signal according to the first off time and the second off time in an adjustment direction indicated by the adjustment mode signal, and a time delay circuit, wherein the dead time control signal is used for adjusting a time delay value of the time delay circuit to adjust the dead time of the first field effect tube and the second field effect tube.

The application discloses a decay control method and a current regulating device, and relates to the technical field of motor control. Actual voltage values corresponding to a motor driving circuit are acquired in a blanking time in a motor driving stage and a first preset time after the blanking time. The actual voltage values in respective first conduction times are compared with subsequent target voltage values. According to the relative size values between the respective actual voltage values and the target voltage values, deviation states between the actual voltage values and the target voltage values are recorded, so that respective corresponding decay times are determined in the two durations to realize an adaptive hybrid decay function. The motor driving circuit is controlled and processed according to the determined decay times. By adjusting the PWM off time to enter the next chopping cycle in advance, the motor current can reach the target current more quickly, noise and power consumption are reduced, and the chopping frequency is improved, so that the motor current ripple is less.

This application proposes a communication configuration method and apparatus, relating to the field of communication technology. The method includes: determining first configuration information based on the configuration time of the CP-E, the first configuration information being used to configure a first power transient period of the terminal device during the start phase of SL TX; and determining second configuration information based on the GP in the transmission frame of the sidelink, the second configuration information being used to configure a second power transient period of the terminal device during the end phase of SL TX. By applying the technical solution of this application, a configuration scheme for the ON / OFF time mask of SL-U is provided to ensure that the terminal device retains sufficient LBT time while having sufficient switching time, without affecting the data transmission of the sidelink.

This application relates to the field of semiconductor lighting driving control technology, and discloses a method for compensating for the luminous stability of a copper wire lamp under low-temperature conditions. This method injects a diagnostic current into the copper wire lamp during the turn-off time slot of a single-cycle driving sequence to obtain the transient voltage decay sequence of the light-emitting device. Based on this sequence, it decouples and calculates the equivalent ambient temperature and the mechanical stress deviation caused by the cold shrinkage of the packaging material. When the mechanical stress deviation exceeds a safety threshold, it calculates the corresponding active heat injection waveform parameters. Based on these parameters, it performs charge equivalence conversion, corrects the loss in the steady-state luminous time of the current cycle, and reconstructs and outputs a composite driving waveform including the heat injection and steady-state luminous stages. This invention improves the structural reliability and luminous stability of the device without adding external sensors by detecting and utilizing Joule heating to release low-temperature mechanical compressive stress through electrical signal quantization and Joule heating.

The application provides a control method, a soft switch control loop, a module, a system, a device and a chip. The method comprises the following steps: calculating the difference between the zero-voltage turn-on current reference value of a target switch in a target power converter at a target time and the preset zero-current turn-off current reference value; judging whether dead-time compensation is needed according to the numerical size relationship between the absolute value of the difference and the preset error threshold value; in the case where the dead-time compensation is needed, compensating the dead-time of the target switch at the target time, and outputting the compensated dead-time and the zero-current turn-off current reference value; or in the case where the dead-time compensation is not needed, outputting the predetermined dead-time and the zero-voltage turn-on current reference value. According to the principle that the inductor current of the power converter at the turn-on time and the turn-off time is opposite, in the case where the dead-time compensation is needed, the dead-time is pre-compensated, so that ZCS and ZVS are realized; otherwise, the realization of ZVS is preferentially guaranteed.

A non-intrusive load identification method employs a non-intrusive detection device to detect a total current on the main power line (i.e., power entrance) of a power system to identify the types of primary loads. The non-intrusive load identification method obtains a turned-on time interval when the present load of the primary loads is turned on or a turned-off time interval when the present load of the primary loads is turned off, obtains a transient turned-on current or a transient turned-off current based on the turned-on time interval or the turned-off time interval, and converts the transient turned-on current or the transient turned-off current into the present power feature of the present load, thereby identifying the type of the present load.

The application discloses a pumped storage full-power frequency converter power unit variable frequency control method and device, N power units are cascaded at an AC end to form a test valve, and M power units are cascaded at the AC end to form a test valve; the method is used for controlling the test valve to output several AC frequency target values, and the method comprises the following steps: pre-charging DC capacitors in the test valve and the test valve to target values; determining corresponding output current / power target values according to the AC frequency target values to be output; controlling the turn-on and turn-off time of the turn-off semiconductor of each power unit in the test valve and the test valve, so that the actual output current / power of the test valve is the output current / power target value, and the actual output frequency of the test valve is the AC frequency target value. The application can simulate the continuous speed regulation operation condition of the pumped storage full-power frequency converter power unit on the pumped storage unit.

This invention discloses an automatic switching system, method, and drive circuit for an uninterruptible power supply (UPS) in the field of power electronics. It includes a power module for providing electrical energy to the system; a relay switch unit for controlling the switching of mains power input; an accelerated turn-off unit for accelerating the turn-off of the relay switch unit; a circuit switching unit for switching a high-current drive circuit to a low-current drive circuit after a predetermined delay; and a control module for outputting a high-level signal to control the circuit switching unit to switch the high-current drive circuit to accelerate the closing of the relay switch unit, and outputting a low-level signal to control the accelerated turn-off unit to accelerate the turn-off of the relay switch unit. This invention employs a delayed switching drive design and an accelerated turn-off unit, which significantly simplifies the power supply hardware design, reduces the power requirements of the auxiliary power module, and significantly shortens the relay turn-off time, ensuring the stability and reliability of the UPS during the switching process.

Power conversion device (1) with a high-potential line (11H) and a low-potential line (11L), an upper branch semiconductor device (2H) connected to the high potential line, a sub-branch semiconductor device (2L) connected in series with the upper-branch semiconductor device (2H) and connected to the low-potential line, and a capacitor (3) which is connected between the high potential line and the low potential line, wherein from the upper branch semiconductor device and the lower branch semiconductor device connected in series, the upper branch semiconductor device forms a parallel circuit body (20) configured from two or more switching elements (2) connected in parallel to each other, and / or the lower branch semiconductor device forms a parallel circuit body (20) configured from two or more switching elements (2) connected in parallel to each other, in the upper branch semiconductor device and the Sub-branch semiconductor device connected in series, a return flow element (21) in the parallel circuit body is provided to allow current flow from a low-potential line side to a high-potential line side, The switching elements that form the parallel circuit body are controlled in such a way that the switching-off times are different from each other. a last-off element (22) that switches off last, and a non-last-off element (23) as the other element among the switching elements that form the parallel circuit body, an inductance of a closed last-off circuit (101) in which current flows through the last-off element, the return element in an opposite branch opposite to the last-off element, and the capacitor, is smaller than the inductance of a closed non-last-off circuit (102) in which current flows through the non-last-off element connected in parallel to the last-off element, the return element in an opposite branch opposite to the last-off element, and the capacitor, wherein the parallel body of the upper branch semiconductor device comprises the last-off element, the non-last-off element and the return element, and the parallel body of the lower branch semiconductor device comprises the last-off element, the non-last-off element and the return element, the last-off element, the non-last-off element and the reflux element in the upper-branch semiconductor device are mounted on a common upper-branch module (50H) as a single common semiconductor device, and the last-off element, the non-last-off element and the reflux element in the sub-branch semiconductor device are mounted on a common sub-branch module (50L) as a single common semiconductor device, the common upper branch module and the common lower branch module are each configured such that two power connections (551, 552) project from a module body (550), and the inductance of a wiring path in the module body that connects the power terminals via the last-off element is smaller than the inductance of a wiring path in the module body that connects the power terminals via the non-last-off element, wherein the common upper branch module and the common lower branch module are configured such that the two power terminals project from the module body in the same direction, and a center position (C) in a base section of the two power terminals is closer to the last-off element than to the non-last-off element in a direction in which the last-off element and the non-last-off element are arranged.

Headlights (SW), in particular for use in vehicles,- with at least one first LED (LED1) as a light source and- wherein the headlight (SW) may include further light sources and- wherein the headlight (SW) emits light in a emitted wavelength range (AWB) in the visible wavelength range and- wherein the headlight (SW) is capable of emitting light pulses in at least one visible wavelength range, the light pulsed wavelength range (LPWB) and- wherein the light pulsed wavelength range (LPWB) is a sub-range of the emitted wavelength range (AWB) of the headlight (SW) or is equal to the emitted wavelength range (AWB) of the headlight (SW) and- wherein the first LED (LED1) can emit light in this light pulsed wavelength range (LPWB) and- with an H-bridge (H) for controlling and supplying the first LED (LED1) with electrical energy,- wherein the H-bridge (H) is controlled by a control device (ST) and- wherein the H-bridge (H) can be operated by the control device (ST) in pulsed mode (GPB) and in quasi-continuous mode (QDB) and- wherein the control device (ST) is designed such that in pulsed mode (GPB) a "PAn" state, in which a forward voltage in the forward direction of the LED (LED1) is applied to the LED (LED1) by the H-bridge (H), is not maintained by the H-bridge (H) for longer than a turn-on time (τpp) and- wherein the control device (ST) is designed such that in pulsed mode (GPB) a "PAus" state, in which a reverse voltage is applied to the LED (LED1) by the H-bridge (H), is not maintained by the H-bridge (H) for longer than a turn-off time (τpn)and- where the clearing time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1) and- where the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1).

Headlight (SW), in particular for use in vehicles,- with at least one first LED (LED1) as a light source and- with an H-bridge (H) for controlling and supplying the first LED (LED1) with electrical energy,- wherein the headlight (SW) has a first operating mode (QDB) in which the first LED is used as a light source for illumination purposes and- wherein the headlight (SW) has a second operating mode (GPB) in which the first LED is used as a light source for generating light pulses (LP) in a function as a component of an optical data communication device and- wherein the H-bridge (H) is controlled by a control device (ST) and- wherein the H-bridge (H) can be operated by the control device (ST) in pulsed operation (GPB) in the second operating mode and in quasi-continuous operation (QDB) in the first operating mode and- wherein the control device (ST) is designed tothat in pulsed operation (GPB) a "PAn" state, in which a forward voltage in the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-on time (τpp) by the H-bridge (H), and- wherein the control device (ST) is designed such that in pulsed operation (GPB) a "PAus" state, in which a reverse voltage against the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-off time (τpn) by the H-bridge (H), and- wherein the turn-off time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1), and- wherein the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1) is.,

The application discloses a full-bridge soft switching control method of a resonant converter, a charging pile and a chip, relates to the technical field of direct-current charging, and comprises the following steps: in a starting stage of the charging pile, performing PI algorithm processing on sampling data of the charging pile and preset given data to obtain loop output values of inner and outer loops of the charging pile; judging the size relationship between the loop output values and a preset threshold value to obtain a switching frequency of a driving switch tube; obtaining a period count value of the resonant converter in a period based on the switching frequency and a main clock frequency; performing timing sampling on a voltage of the driving switch tube of the resonant converter to obtain an off time of the driving switch tube; compensating the period count value based on the off time of the driving switch tube to generate a PWM driving signal; and performing full-bridge soft switching control on the resonant converter based on the PWM driving signal, so that the resonant converter is turned on in a zero-voltage state. The application can reduce the on-loss of the driving switch tube and improve the stability of the resonant converter.

The application discloses a control method and system for realizing totem pole PFC high-frequency bridge arm staggered parallel and full-range soft switching, and mainly solves the problem that the prior art cannot simultaneously realize stable staggered parallel of totem pole PFC and active tube soft switching of master and slave phases. The implementation scheme comprises the following steps: collecting input voltage, output voltage, inductance current of master and slave phases and circuit parameters of a bridgeless totem pole PFC parallel circuit; calculating PI voltage loop output power and input voltage polarity signal; calculating active tube conduction time parameter, active tube turn-off time parameter, synchronous tube conduction time parameter and synchronous tube turn-off time parameter for realizing ZVS; calculating compensated slave phase active tube turn-off time parameter and synchronous tube conduction time parameter; and controlling active tube and synchronous tube of master and slave phases of the totem pole PFC based on the time parameters. The application can realize soft switching of all high-frequency active tubes while realizing stable staggered parallel of the totem pole PFC high-frequency bridge arm, and can be used for various high-power power electronic circuits.

A control circuit for a boost converter includes a switching device for switching the boost converter to perform cycles, wherein each cycle includes an energy charging state in which an inductor stores energy supplied by an input voltage and an energy discharging state in which the inductor supplies energy to the output of the boost converter; a comparison device for determining whether the current at the inductor is higher than a predetermined maximum current; and a turn-off time signal generation device for generating a turn-off time signal based on whether the current at the inductor is higher than the predetermined maximum current, wherein the turn-off time signal is used to determine the duration of the discharge state of the next switching event, and the switching device is used to switch the boost converter based on the generated turn-off time signal.

A method of positioning signal processing at a user equipment includes operating the user equipment in a discontinuous reception mode, the discontinuous reception mode including time-interleaved on times of the discontinuous reception mode during which the user equipment is in an active mode of monitoring for a positioning signal measurement trigger signal and off times of the discontinuous reception mode during which the user equipment is in an inactive mode; receiving, at the user equipment, a wake-up signal; and determining, at the user equipment, whether to measure a positioning signal based on whether the wake-up signal indicates to implement the active mode during a scheduled discontinuous reception mode on time or to skip the scheduled discontinuous reception mode on time.

The application discloses an electric consumption metering device and a power supply device, and relates to the technical field of electric energy metering.The electric consumption metering device comprises a first metering module, a power supply switching module, a second metering module and a control module; the second end of an energy storage converter is coupled to a battery module; when the battery module is discharging, the control module controls the conduction between the third end and the fourth end of the power supply switching module, and controls the disconnection of the second end and the third end after a first set time; when the battery module is charging, the control module controls the conduction between the second end and the third end of the power supply switching module, and controls the disconnection of the third end and the fourth end after a second set time.Through the above mode, the first metering module and the second metering module are combined with the power supply switching module and the control module, the conduction relationship between different paths is combined with different on-off time sequences, the electric consumption metering of different load systems is realized, the error of energy efficiency calculation is avoided, and the continuity of power switching is ensured.

Headlights (SW), in particular for use in vehicles, - with at least one first LED (LED1) as a light source, - wherein the headlight (SW) has a first operating mode (QDB) in which the first LED (LED1) is used as a light source for illumination purposes, and - wherein the headlight (SW) has a second operating mode (GPB) in which the first LED (LED1) is used as a light source for generating light pulses (LP) in a function as a component of an optical measuring device, - with an H-bridge (H) for controlling and supplying the first LED (LED1) with electrical energy, - wherein the H-bridge (H) is controlled by a control device (ST), and - wherein the H-bridge (H) can be operated by the control device (ST) in pulsed operation (GPB) in the second operating mode and in quasi-continuous operation (QDB) in the first operating mode, and - wherein the control device (ST) is designed tothat in pulsed operation (GPB) a "PAn" state, in which a forward voltage in the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-on time (τpp) by the H-bridge (H), and- wherein the control device (ST) is designed such that in pulsed operation (GPB) a "PAus" state, in which a reverse voltage against the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-off time (τpn) by the H-bridge (H), and- wherein the turn-off time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1), and- wherein the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1) is.,

The present application relates to a display system with a light sensor and a control method thereof. The display system comprises a display module and a light sensor. The display module comprises a driving circuit for generating a driving signal. Said driving signal comprises a plurality of periodic pulse waves. The OFF time of one of the periodic pulse waves is extended to an extended time which is greater than the OFF time of the remaining periodic pulse waves. This ensures that the sensing result of the light sensor may not include the contribution of display light.

The application discloses an improved upper and lower power time slot protection circuit of a GaN device, which comprises a gate protection circuit and a drain time slot upper and lower power switch circuit, the gate protection circuit comprises a power supply voltage, a gate negative voltage generating circuit and a diode, the positive electrode end of the diode is connected with the gate negative voltage generating circuit and the gate of the GaN device at the same time, the other end is grounded, the gate negative voltage generating circuit is connected with the drain time slot upper and lower power switch circuit through a voltage stabilizing diode, the negative electrode of the voltage stabilizing diode is connected with the power supply voltage through a first pull-up resistor, the drain time slot upper and lower power switch circuit is connected with the drain of the GaN device, and the power supply voltage is connected with the gate negative voltage generating circuit and the drain time slot upper and lower power switch circuit. The device gate is prevented from being broken down and overvoltage, in addition, when the gate appears a higher negative voltage, the drain voltage is turned off, and the device damage caused by the misoperation when setting the device gate voltage is avoided.

This invention discloses a health management system and method for mining power electronic equipment, relating to the field of health management technology for mining power electronic equipment. The system includes a data acquisition unit, an aging model unit, an aging detection unit, and a life extension management unit. This invention determines the aging degree of a target power device by using actual operating voltage, collector current at actual turn-off time, actual turn-off time, actual thermistor resistance, junction temperature detection model, and turn-off time prediction model. Based on the aging degree of the target power device, it determines life extension management measures, thereby achieving the purpose of monitoring the aging degree of power electronic devices and applying corresponding life extension management.

The application discloses a time-varying antenna based on a distributed switch array and a multi-pulse injection control method, and relates to the technical field of antennas. The time-varying antenna comprises a main antenna section with slow wave characteristics, a distributed switch array, a plurality of umbrella-shaped radiation branches and a main control unit. The distributed switch array comprises a plurality of electronic switches, and the output ends of the electronic switches are connected to the umbrella-shaped radiation branches one by one. The main control unit is used for controlling the on-off time sequence of the electronic switches, so that the electronic switches perform a hierarchical trapping action and a global synchronous conduction action. The application discards the waiting mode of a single cycle and a single pulse of a traditional time-varying antenna, and innovatively adopts a slow wave delay and a pipeline trapping (the hierarchical trapping action) scheduling strategy. Without increasing the overall physical size of the antenna, a plurality of high-frequency pulses can be contained and temporarily stored in a single scheduling cycle, and the system transmission power and energy density are significantly improved.

A multi-device synchronous shielding method and a related product. The method comprises: determining whether an interference device is a first interference device; if the interference device is the first interference device, generating, by the interference device, an interference signal on the basis of a received base station signal; and transmitting the interference signal during an interference signal output time period, and not transmitting the interference signal during an interference signal off time period; and if the interference device is not the first interference device, acquiring, by the interference device, an interference signal off time period and an interference signal output time period on the basis of a received signal; receiving a base station signal during the interference signal off time period and generating an interference signal on the basis of the base station signal; and transmitting the interference signal during the interference signal output time period, and not transmitting the interference signal during the interference signal off time period.

The application belongs to the technical field of power devices, and provides a softness modulation type IGBT device and a preparation method and a chip thereof. A softness modulation zone including an N-type diffusion layer and a local carrier lifetime control layer is formed between an N-type field termination layer and an N-type drift layer, the doping concentration of the N-type diffusion layer is less than the doping concentration of the N-type field termination layer, then a front IGBT structure and a front protective layer are formed on the N-type drift layer, so that when the IGBT device is at a lower working voltage, carrier current can be maintained at the end of device turn-off, and turn-off softness is maintained, turn-off time and turn-off loss are reduced, when the IGBT device is at a higher working voltage, the depletion layer of the device can be cut off in the N-type diffusion layer, so that the turn-off current of the IGBT device will not oscillate, and the problems of long current tail, large loss and high risk of overvoltage failure of the current IGBT device under voltage fluctuation are solved.

A gate driving device and a driving method thereof are provided. The gate driving device includes a plurality of shift register circuits coupled in series. An Nth shift register circuit includes a gate driving signal generator. The gate driving signal generator includes an output stage circuit and a voltage stabilizing circuit. The output stage circuit has a first control terminal and a second control terminal to receive a first control signal and a second control signal, respectively. The first output terminal is pulled high and pulled low based on an enable signal according to the first control signal and the second control signal to generate an Nth gate driving signal. The voltage stabilizing circuit maintains the second control signal on the second control terminal at a set voltage level during a gate hold-off time interval according to the enable signal, a plurality of previous stage start signals and a gate hold-off signal.