249 results about "Switching time" patented technology

The invention discloses an OEO amplifier with a high-speed hard switching function and an optical transmission system, and relates to the technical field of optical amplifiers, the OEO amplifier comprises three magneto-optical switches, an optical splitter group, a photoelectric detector group, a real-time comparison circuit, a logic gate control circuit and a driving circuit; the photoelectric detector group collects optical signal power to generate an electric signal; the real-time comparison circuit performs voltage threshold judgment on the electric signal; the logic gate control circuit is connected with the output end of the real-time comparison circuit so as to synchronously control the switching states of the three magneto-optical switches according to a voltage threshold judgment result; the driving circuit is used for driving the magneto-optical switch to synchronously execute a switching action; when the OEO amplifier detects that optical signals in any direction are interrupted, all the magneto-optical switches finish synchronous switching within 100 microseconds, and the end-to-end optical signal switching time difference is smaller than 2 picoseconds. The method is suitable for a single-fiber bidirectional optical communication environment requiring high frequency, high precision and high stability.

The invention provides an uninterrupted redundant communication method and system, equipment and a medium, and belongs to the technical field of vehicle-mounted network communication.The method comprises the steps that data frames from two communication paths are received through two network interfaces respectively, CRC verification is carried out, wrong data frames are discarded, and the data frames passing verification are obtained; extracting the serial number of each data frame passing the verification as a target serial number, and comparing the target serial number with an expected serial number; if the target serial number is equal to the expected serial number, submitting the data frame to an upper application, and adding 1 to the expected serial number; wherein the data frame is generated by adding a globally unique and monotonically increasing serial number to each key application data frame by the sending end processing unit. According to the invention, fault switching delay is eliminated fundamentally, zero switching time is realized, and a crucial communication guarantee is provided for automatic driving of L4 and above.

The invention discloses a high-speed fixed-point multiplication circuit. The multiplication circuit is mainly composed of a multiplier coding module, a partial product generation module, a partial product compression module and a traveling wave carry adder module. The multiplier coding module is composed of a radix-4-Booth coding algorithm and an opposite number generation module, and is used for carrying out three-bit block coding on input multiplication data and generating an opposite number of a multiplicand in advance. The partial product generation module generates a plurality of groups of partial products with symbol extension according to the multiplicand coded signal. And the partial product compression module adopts an improved Wallace compression structure to perform layered compression on the partial product. And the traveling wave carry adder module sums the two groups of results output by compression and outputs a multiplication result. According to the invention, multiplication accumulation series can be reduced, the switching times of invalid signals in the circuit can be reduced, and the longest delay path in an operation link can be shortened, so that fixed-point multiplication which is high in speed, low in power consumption and more favorable for a comprehensive tool in structure is realized.

A station (STA) includes a memory and a processor, the processor to cause receive, a frame associated with initiating a non-primary channel access (NPCA) operation from an access point (AP) that supports NPCA operation, the frame indicating a NPCA primary channel that the AP and the STA switch to for the NPCA operation. The processor is further to cause switching, at a switch time, from a basis service set (BSS) primary channel to the NPCA primary channel based at least in part on receiving the frame. The processor is further to cause initiating a transmission on the NPCA primary channel based on an enhanced distributed channel access (EDCA) parameters associated with the NPCA primary channel. The processor is further to cause an end of transmission on the NPCA primary channel and to cause switching to the BSS primary channel.

The invention provides a 2M non-framing double-path protection intelligent switching method and system based on redundancy check, and relates to the technical field of communication, and the method comprises the steps: obtaining double-path 2M non-framing code streams, carrying out the alignment processing, generating a check result through employing cyclic redundancy check, carrying out the statistics of error code feature vectors in a sliding time window, and constructing a link quality track. According to the method, the quality degradation early warning signal is extracted, the stage switching strategy is constructed based on the early warning signal, the switching time sequence is determined in combination with the neural network evaluator, link switching is executed, self-adaptive optimization of the switching strategy is achieved, and the intelligence and reliability of link switching are improved.

The invention relates to a trigger unit. The trigger unit comprises a first comparison feedback circuit, a first clock gating circuit, a master latch and a slave latch assembly, the first comparison feedback circuit is used for detecting a signal hopping state of an external input signal according to a first output signal output by the output end of the main latch, and generating a corresponding first state feedback signal, so that the first clock gating circuit generates a corresponding first gating clock signal according to the first state feedback signal and a reference clock signal, and sends the first gating clock signal to the second clock gating circuit; under the condition that the first gating clock signal is valid, the main latch is controlled to update the first output signal according to the external input signal; the state switching opportunity of the main latch can be accurately controlled, and unnecessary clock flipping in the trigger and transistor switching activity caused by the unnecessary clock flipping are effectively reduced, so that dynamic power consumption related to a clock network and dynamic power consumption generated by flipping of nodes in a data path are effectively reduced.

The invention discloses a multi-mode electric energy conversion system and a method thereof, and relates to the technical field of power electronic conversion, the system comprises a signal acquisition module, a mode discrimination module, a soft switching control module and a switching execution module, the signal acquisition module acquires an input voltage, an output voltage, a load current and a switching tube temperature signal; the mode judgment module determines a target working mode according to an input voltage interval and a load rate interval, dynamic switching among a full-bridge phase shift mode, a half-bridge mode and an interleaving parallel mode is achieved, the soft switching control module generates a soft switching time sequence signal, a main power switch tube is enabled to achieve zero-voltage switching, and the main power switch tube is enabled to achieve zero-voltage switching. The switching execution module adopts a current ramp control strategy to execute mode switching, the switching time is less than 5ms, the voltage fluctuation is less than 3%, and the global efficiency is greater than 95% and the peak efficiency is greater than 98% under the conditions of wide voltage and wide load.

The invention discloses a communication link automatic selection and concurrent transmission method under a helicopter limit condition, and relates to the technical field of aerospace. Comprising the following steps: firstly combing airborne communication link information, retaining four types of links including a satellite, an ultra-short wave, a short wave and a data transfer radio, and collecting parameters by means of a bus controller; filtering the data by using a Kalman filtering algorithm, and removing abnormal data through threshold verification; and finally outputting stabilized data. Determining a task scene and an environment scene based on the stabilization data in combination with airborne control screen task selection and environment sensor data; according to the technical key points, a fault precursor monitoring technology is adopted, a standby link pre-activation technology is combined, a seamless switching mechanism is matched, the defect that an existing system depends on manual switching is overcome, the automatic switching time of the link is shortened to be within 0.5 second, the communication interruption rate under the limiting condition is reduced to be lower than 5% from 30% or above, the real-time communication requirements of rescue, patrol and the like are met, and the real-time communication efficiency is improved. Good use prospects are realized.

Aspects relate to wireless communication using multiple active bandwidth parts (BWPs). For example, a base station may configure a user equipment with two or more active BWPs. The user equipment may then use one or more of the active BWPS at a time. For example, the user equipment may use multiple active BWPs for full-duplex communication. Alternatively or in addition, the user equipment may switch between active BWPs taking advantage of the extremely low switching time (e.g., at or near zero seconds) between active BWPs.

Embodiments of the present application provide a multi-serial communication scheduling method and system, electronic equipment and storage medium, relating to the technical field of serial communication. The method comprises: obtaining a serial switch instruction, the serial switch instruction carrying the station information where the execution device is currently located and the serial number of the execution device; obtaining the serial number of the control device of the current station in the preset mapping relationship library according to the station information where the execution device is currently located; the mapping relationship library comprises the mapping relationship between the station information and the serial number of the control device; establishing the binding relationship between the serial number of the execution device and the serial number of the control device of the current station; the binding relationship is used to realize the communication between the execution device and the control device of the current station. Thus, through the serial number dynamic binding mechanism, the operation of frequent disconnection and reconnection of the serial in the traditional method is avoided, the communication cost is reduced and the serial switching time is shortened, and the communication efficiency and stability are significantly improved.

An emulator system and a method for emulating functionalities of an integrated circuit design are disclosed. In one aspect, the system includes a plurality of verification components each comprising circuitry configured to perform transactions with at least another verification component. The system can include a plurality of proxies, each executing on a processor and corresponding to a respective one of the verification components. The system can include a switch that is communicatively coupled with the proxies, the switch dynamically configurable to, in a first time duration, operate with a first subset of the proxies to enable a first transaction between a functional module of the design and a first verification component. The switch can be dynamically configurable to, in a second time duration, operate with a second subset of the proxies to enable a second transaction between the functional module and a second verification component.

The invention discloses an audio playing method and device under a broadcast network, equipment and a storage medium. Acquiring first sequence signal data and motion state information of a current user in a process of receiving a first audio stream sent by a first transmitter for audio playing; the first sequence signal data is obtained by performing intensity sampling on a signal of the first transmitter according to a time sequence; performing signal switching prediction on the first transmitter according to the first sequence signal data and the motion state information to obtain a signal switching prediction result; when the signal switching prediction result indicates that signal switching is carried out, determining switching trigger time; when the system time reaches the switching trigger time, the audio switching time is determined according to the signal synchronization data sent by the second transmitter; and when the system time reaches the audio switching time, switching to the second audio stream sent by the second transmitter. The problems of delay lagging, power consumption increase, low switching efficiency and the like in the prior art are effectively solved.

This application provides a noise reduction mode switching method, apparatus, and noise reduction device, specifically relating to the technical field of audio noise reduction. The method includes: obtaining n first zeros and n first poles corresponding to the current system function of a filter in the complex plane, and n second zeros and n second poles corresponding to the target system function of the filter in the complex plane; combining the n first zeros, first poles, second zeros, and second poles to obtain n zero-point groups and n pole groups, wherein each zero-point group includes one first zero and one second zero, and each pole group includes one first pole and one second pole; performing zero-pole switching according to the n zero-point groups and the n pole groups to switch the noise reduction device from the current noise reduction mode to the target noise reduction mode. This disclosure not only enables the filter to smoothly switch from the current noise reduction mode to the target noise reduction mode, but also shortens the noise reduction mode switching time.

The invention discloses a preheating control method for a carbon dioxide asynchronous motor compressor, which comprises the following steps of: 1, connecting a U phase, a V phase and a W phase output by a frequency converter into a motor of the compressor, and simultaneously collecting the temperature of the compressor in real time; 2, acquiring an input signal; 3, judging whether the temperature of the compressor reaches the preheating temperature or not; 4, judging whether the compressor is in a shutdown state or not; 5, judging whether the shutdown time reaches the preheating shutdown switching time or not; 6, whether the preheating one-way duration time is reached or not is judged; 7, calculating actual target current according to the temperature of the IGBT module; 8, calculating a preheating output voltage through an IP controller of a current loop according to the actual target current, and generating a corresponding output current; and 9, calculating an alpha-axis voltage and a beta-axis voltage, and outputting an SVPWM signal. According to the invention, the preheating voltage can be accurately controlled, customized current control is realized, single-phase overheating is avoided through systematic phase switching, and a safety protection mechanism is provided.

A method and associated apparatus provide for a management node to send to a terminal node, a negotiation request used to update a receiving / sending switching interval to first switching time. The receiving / sending switching interval includes a first receiving / sending switching interval of the management node and a second receiving / sending switching interval of the terminal node. The terminal node receives the negotiation request, feeds back acknowledgment response information to the management node in response to the negotiation request, and updates the second receiving / sending switching interval to the first switching time. The management node receives the acknowledgment response information. The management node updates the first receiving / sending switching interval to the first switching time based on the acknowledgment response information.

A method for operating a pulse-width modulated electric motor in which at least one bridge branch is actuated with a high-side switch and with a low-side switch in the course of the pulse-width modulation. Between a switching-off procedure of the one switch and a switching-on procedure of the other switch, a dead time is formed that is composed of a hardware dead time duration which changes during motor operation and a software dead time duration which is adjustable. The switching times for the switching procedures that limit the dead time are acquired, and the software dead time is changed as a function of the acquired switching times.

The application belongs to the technical field of motor control, and discloses a motor model prediction control method based on asymmetric hybrid vector pulse width modulation. Six sectors of a space voltage vector are divided into odd sectors and even sectors. In the odd sectors, only zero vectors and corresponding non-zero effective vectors are used for two-stage asymmetric synthesis, so that switching state changes only occur once in a period. In the even sectors, three-stage asymmetric synthesis is performed on non-zero effective vectors in the sector, non-zero effective vectors in adjacent odd sectors selected by a cost function and zero vectors, so that current tracking performance is ensured while unnecessary switching actions are avoided. Through the above manner, targeted control of switching times in different sectors is realized, and the average switching frequency is reduced. In the even sectors, optimization is performed between non-zero effective vectors in adjacent odd sectors, so that current prediction errors are further optimized without significantly increasing switching times, and current performance is ensured.

The present invention relates to a communication method, the method comprising transmitting control information (DCI) in a first transmission interval (TTI), the control information comprising: a first indicator of a bandwidth portion (BWP1) for transmitting data associated with a first slice via the first bandwidth portion (BWP1); a second indicator of a bandwidth portion (BWP2) for transmitting or receiving data associated with a second slice via the second bandwidth portion (BWP2); and a first switching time indicator (J1) for switching an active bandwidth portion between the first bandwidth portion (BWP1) and the second bandwidth portion (BWP2).

A method may include transmitting, by a wireless device, a user equipment (UE) capability message indicating a handover time for sounding reference signal (SRS) frequency hopping. The method may also include receiving one or more configuration parameters indicating SRS resources for the SRS frequency hopping. The method may further include receiving downlink control information (DCI) that schedules uplink transmissions via a physical downlink control channel (PDCCH) monitoring occasion. The method may additionally include transmitting the uplink transmission, and discarding an SRS transmission via the SRS resource based on a time interval being at least a ready time of the uplink transmission plus a handover time. The time interval may be between the last symbol of the PDCCH monitoring occasion and an SRS symbol. The SRS symbol may overlap with the uplink transmission.

The embodiment of the invention provides an auxiliary channel switching method. The method comprises the following steps: negotiating channel measurement information corresponding to an auxiliary channel with a second communication node under the condition that both the first communication node and the second communication node support auxiliary channel measurement and the auxiliary channel needs to be measured; and performing auxiliary channel measurement on the auxiliary channel according to the channel measurement information, and switching to the auxiliary channel according to a received switching signaling sent by the second communication node when the auxiliary channel measurement result is that the channel is allowed and needs to be switched. According to the embodiment of the invention, the problem that the data transmission efficiency is reduced due to the fact that the channel switching time is too long in the related technology is solved, and the effect of shortening the channel switching time is achieved.

The invention provides a programmable logic device dynamic register configuration device and a control method thereof. The configuration device for the dynamic register of the programmable logic device comprises an external controller used for providing a configuration instruction and configuration data; the main controller is used for receiving and analyzing the configuration data, generating a gating signal and recombining a data packet; at least one multiplexing module, each multiplexing module being configured to include a register block; and one or more stages of sub-controllers are arranged between the main controller and the multiplexing module and are used for further analyzing the data packet and controlling the target register group to complete read-write operation. In addition, the invention further provides a control method corresponding to the configuration device. Some embodiments of the invention aim to solve the problems of high configuration switching time consumption and uncertain configuration switching time in the prior art on the premise of not increasing too much complexity and area overhead.

The invention discloses a control method and device of a magnetic suspension bearing, the magnetic suspension bearing, a storage medium and a computer program product. A current sensor used for detecting a coil current signal in real time is configured in a closed-loop feedback control loop of the magnetic suspension bearing; the method comprises the steps that the switching time ratio is calculated based on the on-off state information of a switching tube in a magnetic bearing controller within a preset time period, the output current of a magnetic bearing is determined according to the mapping relation between the switching time ratio and preset current, and when a current sensor is abnormal, the output current serves as a feedback signal to be input into a preset control algorithm. And controlling the rotor of the magnetic suspension bearing to be maintained at the preset position until the rotor stops. According to the scheme, fault-tolerant control can be realized when the current sensor is abnormal, a redundant sensor does not need to be configured, the problems of resource waste and increase of cost and structural complexity caused by idle redundant sensors are avoided, and the cost performance and reliability of the magnetic suspension bearing system are improved.

The application discloses a three-level inverter harmonic suppression method based on zero vector symmetrical reconstruction and spread spectrum composite modulation, and the method comprises the following steps: step 1, signal acquisition and voltage instruction acquisition; step 2, spread spectrum modulation parameter setting; step 3, basic vector action time calculation; step 4, zero vector symmetrical reconstruction of vector sequence; step 5, switch time calculation and register updating; and step 6, PWM signal generation and system closed loop operation. The application realizes full-band suppression of inverter output PWM harmonics by deeply fusing the zero vector symmetrical reconstruction technology and the spread spectrum modulation technology. The application can be applied to a permanent magnet synchronous motor driving system powered by a three-level voltage source inverter, can simultaneously suppress the PWM harmonic amplitude near the odd carrier frequency and the even carrier frequency, effectively reduces electromagnetic vibration and noise, and has extremely high application value in the field of high-power inverters and motor drives.

The application provides a clock data recovery locking method and system, comprising the following steps: a current Vctl acquisition step: acquiring the current temperature of a clock data recovery chip CDR, determining the corresponding Vctl value according to the current temperature, and recording the Vctl value as TVctl, wherein Vctl represents voltage control; a locking judgment step: recording the locked Vctl as LVctl, comparing LVctl and TVctl, and judging whether locking is completed. The CDR locking time is relatively fast, so that the light emitting time and the main and standby switching time of the optical module are relatively short; the locking quality of the CDR is relatively good, so that the receiving sensitivity of the optical module is relatively good.

The embodiment of the present application provides an uplink transmission method and device, relates to the technical field of communication, and solves the problem that terminal equipment accesses two stations with different distances to the terminal equipment, and the terminal equipment sends time-different uplink transmissions to the two stations, which affects uplink switching. The specific scheme is as follows: a first uplink transmission is sent to a first network device on a first uplink carrier, and a second uplink transmission is sent to a second network device on a second uplink carrier; wherein, uplink switching is performed in a first time period, and no uplink transmission is sent in the first time period; the first time period is determined by a switching gap and a second time period, the switching gap is an uplink switching time reported by the terminal equipment, and the second time period is the difference between the radio frame boundary of the second uplink carrier and the first uplink carrier. The embodiment of the present application is used for the process of sending uplink transmissions by the terminal equipment to two carriers of different stations.

The invention relates to an IGCT (integrated gate commutated thyristor) power unit parallel dynamic current sharing system and method, which ensure the carrier synchronization consistency of each inverter module by constructing a high-precision synchronous clock signal with an error less than 10ns, thereby reducing the difference of switching moments; meanwhile, the high dominant frequency operational capability of 50MHz of a field programmable gate array (FPGA) hardware chip is utilized, and the PWM pulse width adjusting quantity with the resolution reaching 20ns is output, so that accurate adjustment of multi-machine parallel current is realized. Compared with a conventional current sharing method, the current sharing method has the advantages that the output current of each module can be accurately adjusted with high real-time performance, the problem of poor active adjusting capability in the prior art is effectively solved, and the current sharing performance and the system reliability of the high-power parallel device are remarkably improved.

A method of operating a communications device, the method comprising determining that first and second resources are allocated for one of transmission and reception of signals by the device, the second resources being different from the first resources, determining that a time period separating the first and second resources is below a predetermined maximum switching time threshold, determining a first priority associated with the first resources, determining a second priority associated with the second resources, determining a start of a switching time gap based on the first priority and the second priority, controlling a receiver of the device to refrain from receiving signals during the switching time gap, controlling a transmitter of the device to refrain from transmitting signals during the switching time gap, and transmitting or receiving first data using at least a portion of one of the first and second resources.

Circuits and methods that enable a charge pump to provide sufficient charge to the gate of a switch NFET to turn the NFET ON within a specified switching time requirement but with minimal generation of electronic noise. An embodiment includes a dual-oscillator circuit configured to output from a first oscillator a first frequency signal from a first oscillator during normal operation, and to output from a second oscillator a second frequency signal higher in frequency than the first frequency signal for a selected time determined by a counter. An embodiment includes a charge pump coupled to the dual-oscillator circuit and configured to output an electrical charge as a function of an applied frequency signal from the dual-oscillator circuit, wherein application of the second frequency signal output during counting increases the amount of electrical charge output by the charge pump.

The application provides a power distribution product power supply priority switching time sequence automatic detection method and device, relates to the power distribution equipment detection technical field, and the method comprises the following steps: determining a starting reference time according to an abnormal power supply trigger signal collected; based on the starting reference time, obtaining an effective action time sequence signal of each priority load loop switch and a bus power supply state signal; mapping the effective action time sequence signal and the bus power supply state signal to a preset hyperbolic geometric flow space to obtain an event node with a negative curvature representation; calculating the time sequence interaction potential between each event node, and driving the event node to self-assemble and aggregate in the preset hyperbolic geometric flow space based on the time sequence interaction potential to form a hierarchical correlation time sequence super node cluster to obtain a time sequence correlation data group. The application can realize automatic linkage detection of the multi-loop differentiated priority switching time sequence, and effectively solves the problems of the cumbersome and error-prone artificial detection mode.

The invention belongs to the technical field of motor control, and discloses a motor model prediction control method based on asymmetric hybrid vector pulse width modulation. Six sectors of a space voltage vector are divided into odd number sectors and even number sectors. In a singular sector, only a zero vector and a corresponding non-zero effective vector are adopted to perform two-section asymmetric synthesis, so that only one switching state change occurs in one period; in an even number sector, a non-zero effective vector in the sector, a non-zero effective vector in an adjacent odd number sector screened by a cost function and a zero vector are adopted to carry out three-section type asymmetric synthesis, and unnecessary switching actions are avoided while the current tracking performance is ensured. By means of the method, targeted control over the switching times is achieved in different sectors, and the average switching frequency is reduced. In the even-number sectors, optimization is carried out between the non-zero effective vectors of the adjacent odd-number sectors, the current prediction error is further optimized under the condition that the switching frequency is not obviously increased, and the current performance is ensured.