169 results about "Variable-gain amplifier" patented technology

The present invention relates to a duobinary signal reception device and method in which: a variable gain amplifier (VGA) amplifies a duobinary signal; a duobinary-to-non return to zero (NRZ) converter restores an NRZ signal on the basis of a differential signal of the amplified duobinary signal and a predetermined reference voltage signal; a digital regulator voltage (DRV) circuit outputs the restored NRZ signal; and the duobinary-to-NRZ converter comprises an exclusive OR (XOR) gate to which the differential signal of the amplified duobinary signal is input, and a comparator to which an output of the XOR gate and the reference voltage signal are input.

The invention discloses a high-speed serial signal linear equalization circuit which comprises an input terminal, a continuous time linear equalizer (CTLE), a super source follower, a variable gain amplifier (VGA) and an adaptive feedback. The input end is connected with a 100-ohm internal resistance differential signal source of the transmitting end through a channel; the equalization circuit CTLE is connected to the output end of the input end connection module, two groups of resistance switches (RsMF and RsHF) of the CTLE module are respectively controlled by 4-bit binary codes to enable source degeneration resistors Rs of two stages of CTLEs to be variable, two groups of capacitance switches (CsMF and CsHF) are respectively controlled by 2-bit binary codes to enable source degeneration capacitors Cs of the two stages of CTLEs to be variable, and the two groups of capacitance switches (CsMF and CsHF) are respectively controlled by 2-bit binary codes to enable source degeneration capacitors Cs of the two stages of CTLEs to be variable. The change of a zero pole of the circuit is realized through the change of the source degeneration resistor Rs and the source degeneration capacitor Cs, and the adjustability of the difference between the high-frequency gain and the low-frequency gain of the circuit is realized, so that the multi-gear adjustability of the equalization capability is realized.

A beamforming front end (BFFE) for a receiver performs beamforming without needing to perform phase-shifting on each of a plurality of received signals. The BFFE comprises first variable gain amplifiers (VGAs) that respectively amplify the received signals by first gain values and second VGAs that respectively amplify the received signals by second gain values. Outputs of the first VGAs are combined into a first combined signal, and outputs of the second VGAs are combined into a second combined signal. The first and second combined signals are then used to produce an output signal corresponding to phase-shifting the received signals by amounts corresponding to the respective first and second gain values and then summing the results of the phase shifting. The output signal may be produced by mixing the first combined signal with an in-phase local oscillator signal and mixing the second combined signal with a quadrature local oscillator signal.

The invention discloses an LPO wired receiver adopting adaptive CTLE based on a genetic algorithm, and the receiver comprises an analog front end, a data sampler, an edge sampler, an error sampler, a 1: 32 demultiplexer, a verification module, an eye pattern monitor, a genetic algorithm module, clock recovery logic, and a clock path. The eye pattern monitor is used for calculating the eye pattern closure degree according to the data of the data sampler and the error of the error sampler and outputting the eye pattern closure degree to the genetic algorithm module; and the genetic algorithm module is used for realizing parameter adaptive control of a continuous time linear equalizer CTLE and a variable gain amplifier VGA in the analog front end. The invention aims to apply the genetic algorithm to the adaptive equalization of the adaptive continuous time linear equalizer, so that the adaptive continuous time linear equalizer has stronger global search capability and lower power consumption and is not easy to fall into local optimum, and the complexity and power consumption of the adaptive continuous time linear equalizer are reduced. And the real-time and energy-saving requirements are met.

The invention discloses an MEMS resonator low ripple error temperature measurement system based on voltage feedback compensation, and the system comprises a trans-impedance amplifier, an analog-to-digital converter, a frequency detection module, a PI controller, a variable gain amplifier, a Schmitt trigger, a first digital-to-analog converter, a biasing circuit, mode switches S1 and S2, and a voltage feedback compensation loop. The compensation loop comprises an amplitude detection module, a lookup table, a second digital-to-analog converter and an adder; the amplitude detection module receives the digital signal from the analog-to-digital converter and outputs a vibration amplitude signal in real time; the lookup table receives the vibration amplitude signal, inquires and outputs a corresponding digital compensation voltage, and converts the digital compensation voltage into an analog voltage through a second digital-to-analog converter; the adder adds the analog voltage and a fixed bias voltage to generate a dynamic bias voltage and applies the dynamic bias voltage to a drive electrode of the MEMS resonator. According to the system, an amplitude-driving end bias voltage feedback compensation loop is introduced, so that the periodic ripples of the resonant frequency are effectively suppressed.

Bidirectional variable gain amplifiers (VGAs) for radio frequency (RF) communication systems are provided. In certain embodiments, a bidirectional VGA includes a first amplifier having an input coupled to a transmit / receive port, a second amplifier having an output coupled to a transmit port, a third amplifier having an input coupled to a receive port, a fourth amplifier having an output coupled to the transmit / receive port and to the input of the first amplifier, and a switch circuit that connects an output of the first amplifier to an input of the second amplifier in a transmit mode, and that connects an output of the third amplifier to an input of the fourth amplifier in a receive mode.

The invention provides an on-chip calibration source circuit and a chip for a radio frequency direct acquisition receiving link, the on-chip calibration source circuit comprises a clock signal output circuit and a differential current signal output circuit, the output end of the clock signal output circuit is connected with the input end of the differential current signal output circuit; the output end of the differential current signal output circuit is movably connected with the input end of the variable gain amplifier; the clock signal output circuit is used for outputting a clock signal to the differential current signal output circuit; the differential current signal output circuit is used for generating a first calibration signal according to an input clock signal and outputting the first calibration signal to the variable gain amplifier, and the first calibration signal is a differential current signal; the first calibration signal is used for performing error calibration on the variable gain amplifier; the variable gain amplifier is used for outputting a second calibration signal to the time-interleaved analog-to-digital converter according to the first calibration signal; the second calibration signal is used for performing error calibration on the time-interleaved analog-to-digital converter.

The invention discloses an impedance-invariant vector synthesis phase shifter, an array element and a phased array, and relates to the technical field of phased array design. According to the impedance-invariant vector synthesis phase shifter provided by the invention, two capacitive compensation branches are arranged in each Gilbert unit of a variable gain amplifier, and the capacitive compensation branches are connected to a circuit only when bits are turned off, so that the output impedance of the unit is kept unchanged when the bits are turned on and turned off, and the output impedance of the unit is not changed when the bits are turned off. The phase shifting precision of the phase shifter is effectively improved, the root mean square phase error of the phase shifter is reduced to be within the acceptable range of the engineering field, phase shifting is directly carried out according to the most ideal condition based on IQ orthogonal signals, complicated calibration work is avoided, and the calibration problem of the vector synthesis phase shifter is solved. The invention further provides an array element which adopts the impedance-invariant vector synthesis phase shifter, the continuous time linear equalizer and the current mode attenuator and has the advantage of being convenient to deploy.

The embodiment of the utility model provides a bidirectional variable gain amplifier and a bidirectional phase shifter. The bidirectional variable gain amplifier comprises a forward node and a reverse node, the first variable gain unit is used for providing variable gain when the forward node inputs a radio frequency signal; the input end of the first variable gain unit is connected with the forward node; the first switch unit is used for connecting or disconnecting the forward node, the input end of the first variable gain unit and a first path between the output end of the first variable gain unit and the reverse node; the second variable gain unit is used for providing variable gain when the reverse node inputs the radio frequency signal; the input end of the second variable gain unit is connected with the reverse node; and the second switch unit is used for connecting or disconnecting the reverse node, the input end of the second variable gain unit and a second path between the output end of the second variable gain unit and the forward node.

Systems and methods for intelligent re-drivers capable of link monitoring and link training in accordance with embodiments of the invention are illustrated. A re-driver in accordance with a first embodiment includes a programmable linear equalizer capable of equalizing a transmitted analog signal to generate an equalized signal, and a variable gain amplifier capable of amplifying the equalized signal to produce an amplified signal. The re-driver further includes a line driver capable of generating an output signal based upon the amplified signal, and digital link adaptation circuitry that is capable of sampling the amplified signal to produce a sampled signal, generating programming parameters for the programmable linear equalizer based upon the sampled signal, and programming the programmable linear equalizer.

The invention relates to the technical field of wireless communication, and provides a low-noise down-conversion signal processing method and system, and the method comprises the steps: collecting an I / Q baseband signal, carrying out the processing of a signal branch and a mirror image branch of a dual-branch decoupling convolutional neural network, and obtaining a signal feature vector and a mirror image feature vector; decomposing the feature vector into a real part, an imaginary part, amplitude and phase components, and constructing a state vector by combining temperature, frequency and device parameters; inputting the state vector into a radio frequency sensing deep reinforcement learning network to output a gain control strategy; environment change is monitored through the meta-learning network, and network weight is adjusted based on performance feedback; and regenerating a final gain control strategy by using the updated weight, controlling the variable gain amplifier to carry out gain adjustment on the I / Q signal, and outputting a signal after low-noise gain control. According to the invention, low-noise, high-precision and adaptive gain control processing of I / Q baseband signals in a complex radio frequency environment is realized, and the signal-to-noise ratio and control precision of down-conversion signals are improved.

The invention discloses a high-precision calibration amplitude-phase control device and a transceiver, the amplitude-phase control device and the transceiver are composed of one or more circuit devices of a phase shifter, an attenuator, an amplifier, a power combiner, a power divider and a transceiving switch, and a high-precision calibration circuit of the amplitude-phase control device comprises a calibration adjustment unit. The calibration adjusting unit is composed of one or more of a resistance network, a capacitance network, an inductance network, a transistor network and a switch element network. An adjustable resistance network is introduced into a phase shifter orthogonal signal generation circuit, an adjustable capacitance network is introduced into a variable gain amplifier of the attenuator, performance parameters of the phase shifter and the attenuator are adjusted by regulating and controlling the resistance network and the capacitance network, an amplitude-phase control device and a transceiver are regulated and controlled through a calibration adjustment unit, and the amplitude-phase control device and the transceiver are adjusted and controlled through a calibration adjustment unit. And high-precision calibration and optimization of performance parameters of the amplitude-phase control device and the transceiver are realized.

The invention provides a gain-reconfigurable active phase shifter with a low phase error, and relates to the technical field of phase shifters, and the phase shifter comprises a quadrature coupler which converts a radio frequency input signal into a shunt radio frequency signal; the input matching Balun converts the shunt radio frequency signal into a shunt differential signal; the digital control signal received by the phase inversion variable gain amplifier is used for controlling the on-off state of a differential pair in each differential group, and determining a differential combination current corresponding to a differential pair combination in a conduction state based on a shunt differential signal corresponding to each differential pair; the differential combination current is used for representing a gain state corresponding to the differential pair combination; the input impedance and the output impedance of the phase inversion variable gain amplifier in different gain states are kept unchanged; the vector synthesis module determines a phase shift differential signal based on the differential combined current; the output matching Balun converts the phase shift differential signal into a radio frequency output signal. The antenna has a wide gain adjustable range and a low phase error.

The invention relates to the technical field of amplifiers, in particular to a variable gain amplifier with a wide linear gain range and a working method, and the variable gain amplifier comprises the steps that a linear gain generation circuit receives a differential input signal and provides gain-adjustable differential output based on linear control voltage; the linear gain generation circuit comprises at least one stage of variable gain unit which comprises differential input pair transistors MN1 and MN2. The load resistor elements R1 and R2 are connected between the power supply voltage VDD and the drain electrodes of the differential input pair transistors MN1 and MN2; the tail current source MN3 provides bias current for the differential input pair transistors MN1 and MN2; the active load network is connected between the drain electrodes of the differential input pair transistors MN1 and MN2 and the ground; the active load network comprises a control tube MN8, the control tube MN8 works in a sub-threshold region, a grid electrode receives linear control voltage, equivalent impedance of the active load network is enabled to be in exponential change along with the linear control voltage through exponential I-V characteristics, and dB linear gain adjustment of the variable gain unit is achieved.

The invention relates to the technical field of channelized receiver management, in particular to a dynamic range channelized receiver method and system based on a block floating point and AGC (Automatic Gain Control), in the system, an automatic gain control module is used for detecting the power of an obtained intermediate frequency analog signal, generating an AGC voltage corresponding to the intermediate frequency analog signal and feeding back the AGC voltage to an analog front end; and dynamically updating the gain of the variable gain amplifier in the radio frequency signal preprocessing process. According to the invention, each channel has independent block floating point gain control, and the channels do not interfere with each other, so that parallel signal-to-noise ratio processing is realized; meanwhile, a complete gain control history is constructed by jointly recording the AGC gain and block floating point processing, data support is provided for recovering the original absolute power value of the signal in each channel, and the contradiction between gain control and information reservation is solved to a certain extent.

The embodiment of the present disclosure provides a variable gain amplifier with high temperature stability, which is applied to the technical field of electronic circuit. The amplifier comprises a constant transconductance bias circuit, a first variable gain amplifier and a second variable gain amplifier; wherein the output end of the constant transconductance bias circuit is connected with the input common source transistor of the first variable gain amplifier and the second variable gain amplifier, and is used for providing a constant transconductance bias signal which is compensated according to temperature change; the input end of the first variable gain amplifier is used for receiving an externally input differential signal, and the output end is connected with the input end of the second variable gain amplifier, and is used for transmitting the differential signal after coarse adjustment attenuation to the second variable gain amplifier; and the output end of the second variable gain amplifier is used for outputting an attenuation differential signal with temperature stability. In this way, by restraining the influence of temperature change on the transconductance characteristic of the input common source transistor of the variable gain amplifier, the stable attenuation characteristic of the variable gain amplifier in a wide temperature range is ensured.

Aspects of temperature dependent stabilization and peaking control in amplifiers are described. An example amplifier includes a variable gain amplifier, a power amplifier, a variable compensation element coupled to the variable gain amplifier, and a controller that directs operation of the variable compensation element to adjust one or more operating characteristics of the amplifier. In one aspect, the variable compensation element comprises a variable impedance, and the controller varies the impedance across inputs of the variable gain amplifier based on temperature to stabilize the amplifier. In another aspect, the variable compensation element comprises a negative capacitance, and the controller varies a coupling of the negative capacitance across inputs of the variable gain amplifier based on temperature to linearize gain of the amplifier. The variable compensation element can include both a variable impedance and negative capacitance, and stability, peaking control, and linearity of the amplifier can be controlled.

The invention relates to the field of feedback type automatic gain control circuits, and discloses a fully differential peak detection AGC circuit, which comprises a multi-stage variable gain amplifier, a buffer amplifier group, a first comparator EA1, a fully differential peak detection unit and an external port, the external port comprises a power supply end VDD, a ground end GND, a negative signal input end INN, a positive signal input end INP, a positive signal output end VON, a negative signal output end VOP, a plurality of bias ports and a reference voltage end VREF; according to the full-differential peak detection circuit, the full-differential structural design is adopted, common-mode noise and external interference can be effectively restrained, the full-differential peak detection unit alternately discharges the capacitor C11 through the first NMOS tube NM1 and the second NMOS tube NM2, continuous discharge adjustment of the capacitor C11 is achieved, the problem that discharge of the capacitor is interrupted in traditional peak detection is avoided, the loop response speed and the gain adjustment precision are improved, and the detection precision of the full-differential peak detection circuit is improved. Even if one path of the differential signals is temporarily lost, the other path of the differential signals can still drive the peak detection unit and the feedback loop to work, and the reliability is improved.

A system and method for enabling high power user equipment (HPUE) capabilities in a wireless communication device. A system includes a cellular module configured to output a transmit signal at a standard power level, and a variable gain amplifier stage coupled to an antenna output of the cellular module, the variable gain amplifier stage configured to amplify the transmit signal. The system further includes a gain control system coupled to the variable gain amplifier stage, the gain control system configured to adjust a gain of the variable gain amplifier stage based on an input power of the transmit signal, wherein the gain is adjusted at a rate slower than a power control loop between the cellular module and a base station. The system further includes an antenna coupled to an output of the variable gain amplifier stage, the antenna configured to transmit the amplified transmit signal.

A variable gain amplifier and an automatic gain control circuit including the same are provided. The variable gain amplifier includes a gain amplification circuit configured to output an amplified signal by amplifying an input signal according to an amplifier control voltage, and a gain control circuit configured to determine the gain control voltage based on gain indication information from outside the variable gain amplifier, wherein the gain control voltage includes a fixed control voltage component based on a ratio of circuit element parameters and a variable control voltage component adjusted by the gain indication information, convert the gain control voltage into an exponential control voltage having an exponential relationship with the gain control voltage, and amplify and filter the exponential control voltage to obtain the amplifier control voltage to control a gain of the gain amplification circuit.

The invention provides a PAM4 signal equalizer based on automatic gain control, which comprises a continuous time linear equalizer CTLE, a variable gain amplifier VGA, a negative capacitor I, a negative capacitor II, a power detector, an encoder, an eye diagram parameter calculation module, a digital time converter, a pipelined analog-to-digital converter and a counter, the first input end of the continuous time linear equalizer CTLE is connected to an input signal DIN, the second input end VCTLE1 of the continuous time linear equalizer CTLE is connected to the first output end of the encoder, the third input end VCTLE2 of the continuous time linear equalizer CTLE is connected to the second output end of the encoder, and the output end N1 of the continuous time linear equalizer CTLE is connected to the input end of the first negative capacitor and the first input end of the VGA. According to the invention, optimization and real-time adaptive adjustment for PAM4 characteristics can be realized, the adaptability and the anti-noise capability can be improved, and the signal recovery capability and the signal integrity can be improved.

A system and method for enabling high power user equipment (HPUE) capabilities in a wireless communication device. A system includes a cellular module configured to output a transmit signal at a standard power level, and a variable gain amplifier stage coupled to an antenna output of the cellular module, the variable gain amplifier stage configured to amplify the transmit signal. The system further includes a gain control system coupled to the variable gain amplifier stage, the gain control system configured to adjust a gain of the variable gain amplifier stage based on an input power of the transmit signal, wherein the gain is adjusted at a rate slower than a power control loop between the cellular module and a base station. The system further includes an antenna coupled to an output of the variable gain amplifier stage, the antenna configured to transmit the amplified transmit signal.

A variable gain amplifier for amplifying an input voltage and providing an amplified output voltage includes an input stage including two differential transistor pairs, the input stage coupled to an input of the amplifier. The variable gain amplifier also includes an output stage including a transistor quad and an additional transistor pair, the output stage coupled to an output of the amplifier, the transistor quad including a terminal for receiving a gain control. The variable gain amplifier also includes coupling outputs of the two differential transistor pairs of the input stage to inputs of the transistor quad and additional transistor pair of the output stage to provide a variable gain path and a fixed gain path, respectively. The variable gain amplifier exhibits improved dynamic range of gain variability, lower complexity, and better noise performance.

The invention discloses a receiving end equalization circuit applied to a SerDes communication system, and belongs to the field of integrated circuits and communication. The circuit comprises a CTLE equalizer and a variable gain amplifier VGA which are cascaded, wherein the output end of the CTLE equalizer is connected with the input end of the VGA; wherein the CTLE equalizer adopts a source follower, an active inductor and a negative capacitor structure, so that the power consumption is effectively reduced, the output common-mode level is matched, and the bandwidth is expanded; and the VGA adopts a transconductance enhancement structure and a source follower, so that the transconductance is improved, the output impedance is reduced, the linearity is enhanced, and the flexible control of low-frequency gain is realized. Compared with a traditional equalization circuit, on the premise that the structure is simpler and easy to implement, lower power consumption and smaller area are achieved, meanwhile, the system transmission rate is remarkably increased, the better equalization effect and good stability are shown, and an efficient and reliable solution is provided for solving the signal equalization problem of a SerDes high-speed serial link.

The invention discloses a variable gain amplification unit and a dual-mode variable gain amplifier, and relates to the technical field of radio frequency integrated circuits. The variable gain amplifier aims to solve the problem that an existing variable gain amplifier cannot meet existing control requirements. According to the variable gain amplification unit and the dual-mode variable gain amplifier, the reconstruction of the gain change range can be realized by adjusting the bias voltage and the number of the cascaded VGA arrays, and different design requirements are met; in the VGA mode, the gain of the amplifier is controlled by the analog voltage and is continuously adjustable in the gain change range. In the PGA mode, the gain of the amplifier is controlled by a digital signal, and the linearity of gain change is extremely high. The circuit is built based on the VGA units with simple structures, and has the advantages of being easy to implement and low in power consumption.

This invention discloses an airborne Wi-Fi system power amplifier assembly and design method. This design relates to the field of airborne Wi-Fi system power amplifiers. The assembly comprises a dual-band power amplifier module, which provides amplification for both the transmit and receive channels. The module includes a first path and a second path. The first path includes a radio frequency port TRX1, a radio frequency transmit / receive switch K‑0, a variable gain amplifier VGA‑1, a driver amplifier D1, a final amplifier A‑1, a unidirectional transmission circulator H1, a logic switch K‑2, a final amplifier A‑3, and an antenna port ANT1. This invention addresses the issues of low-quality and high power consumption associated with Wi-Fi signal coverage in specific environments within an airborne cabin.

A system for controlling a phase array antenna comprising a plurality of compensation units (2) associated to corresponding radiating elements (30) of the phase array antenna. The compensating unit (2) comprises a phase slope control module (10) that controls the phase slope of a radio frequency (RF) signal and comprises a no-delay line with a first variable gain amplifier (11) and a delay line with a second variable gain amplifier (12) and a delay line element (13), wherein the gain of the first amplifier and the gain of the second amplifier are interrelated. The compensating unit (2) comprises a phase shifter (20) that controls the phase shifting of the RF signal, wherein the phase shifter (20) and the phase slope control module (10) are connected. A processing unit (3) can coordinate the compensation units (2).

The application discloses a microwave wideband differential variable gain amplifier and relates to the technical field of electronic circuits.The amplifier comprises a differential structure variable gain amplification circuit, an additional phase shift phase offset numerical control bias circuit and a power consumption control bias circuit.The application is applicable to BiCMOS and other processes, the differential variable gain amplification circuit adopts a current steering type Cascode amplifier structure to realize gain adjustment, two control voltages which make the phase change trends opposite when the VGA gain is reduced (increased) are designed, and a phase compensation resistor is designed to realize the low additional phase shift characteristic of the VGA.The two control voltages are generated by the additional phase shift phase offset numerical control bias circuit, and a plurality of digital control bits are set to select a target gain state from the two control voltages to reduce the gain error of the VGA.

This invention discloses a variable-step automatic gain control method based on an adaptive window, applicable to signal automatic gain control in data acquisition systems. The method preprocesses the input signal and samples it using an ADC to obtain a digital signal, which is then fed into an FPGA. A zero-crossing detection method based on a hysteresis comparator is used to estimate the signal frequency, and the window length is calculated based on this adaptive amplitude matching. The average signal amplitude within the window is then calculated and compared with a preset automatic gain threshold range. The gain step value is dynamically matched and updated to the variable gain amplifier to complete closed-loop control. Finally, the gain value is used to perform an amplitude inverse calculation to restore the signal. This invention improves the detection accuracy and dynamic response speed of the system over a wide bandwidth and dynamic range, eliminates the hardware resource consumption of floating-point division operations, and accurately outputs a distortion-free original proportional signal stream.

The headset includes an electro-acoustic transducer, at least one noise reduction processing chain including external and internal microphones, a processing filter including mounted in parallel between the external microphone and an adder, at least one elementary filter each including a recursive filter and an elementary variable gain amplifier, a control unit for the gain of each elementary amplifier according to a signal coming from the external microphone and an error signal coming from the internal microphone.The processing filter includes an open-loop main filter connected at the input to the external microphone and the output of which is connected, to the adder, and to the input of the or each elementary filter.