3818 results about "Analog to digital conversion" patented technology

Designs and operational methods to increase the dynamic range of image sensors and APS devices in particular by achieving more than one integration times for each pixel thereof. An APS system with more than one column-parallel signal chains for readout are described for maintaining a high frame rate in readout. Each active pixel is sampled for multiple times during a single frame readout, thus resulting in multiple integration times. The operation methods can also be used to obtain multiple integration times for each pixel with an APS design having a single column-parallel signal chain for readout. Furthermore, analog-to-digital conversion of high speed and high resolution can be implemented.

A low power integrated circuit having analog to digital conversion circuitry capable of receiving a plurality of analog signals and converting them to a digital value. The digital value is then transmitted, upon request, over a single wire bus. The accuracy of the analog to digital conversion circuitry can be calibrated via trim codes stored in an onboard EPROM.

A method and apparatus provides OFDM signal compression for transfer over serial data links in a base transceiver system (BTS) of a wireless communication network. For the uplink, an RF unit of the BTS applies OFDM cyclic prefix removal and OFDM frequency transformation of the baseband signal samples followed by frequency domain compression of the baseband signal samples, resulting from analog to digital conversion of received analog signals followed by digital downconversion, forming compressed coefficients. After transfer over the serial data link, the baseband processor applies frequency domain decompression to the compressed coefficients prior to further signal processing. For the downlink, the RF unit performs frequency domain decompression of the compressed coefficients and applies OFDM inverse frequency transformation of the decompressed coefficients and OFDM cyclic prefix insertion prior to digital upconversion and digital to analog conversion, generating the analog signal for transmission over the antenna.

A method and apparatus provide signal compression for transfer over serial data links in a base transceiver system (BTS) of a wireless communication network. For the uplink, an RF unit of the BTS applies frequency domain compression of baseband signal samples, resulting from analog to digital conversion of received analog signals followed by digital downconversion, forming compressed coefficients. After transfer over the serial data link, the baseband processor then applies frequency domain decompression to the compressed coefficients prior to normal signal processing. For the downlink, the baseband processor applies frequency domain compression of baseband signal samples and transfers the compressed coefficients to the RF unit. The RF unit applies frequency domain decompression to the compressed coefficients prior to digital upconversion and digital to analog conversion, generating the analog signal for transmission over the antenna. This abstract does not limit the scope of the invention as described in the claims.

A physiologic data acquisition system includes an analog input, a sigma-delta front end signal conditioning circuit adapted to subtract out DC and low frequency interfering signals from and amplify the analog input before analog to digital conversion. The system can be programmed to acquire a selected physiologic signal, e.g., a physiologic signal characteristic of or originating from a particular biological tissue. The physiologic data acquisition system may include a network interface modulating a plurality of subcarriers with respective portions of an acquired physiologic signal. A receiver coupled to the network interface can receive physiologic data from, and send control signals and provide power to the physiologic data acquisition system over a single pair of wires. The network interface can modulate an RF carrier with the plurality of modulated subcarriers and transmit the resulting signal to the receiver across a wireless network. An integrated circuit may include the physiologic data acquisition system. Also included are methods for acquiring physiologic data comprising the step of selectively controlling an acquisition circuit to acquire the physiologic signal.

A signal compression method and apparatus for a base transceiver system (BTS) in a wireless communication network provides efficient transfer of compressed signal samples over serial data links in the system. For the uplink, an RF unit of the BTS compresses baseband signal samples resulting from analog to digital conversion of a received analog signal followed by digital downconversion. The compressed signal samples are transferred over the serial data link to the baseband processor then decompressed prior to normal signal processing. For the downlink, the baseband processor compresses baseband signal samples and transfers the compressed signal samples to the RF unit. The RF unit decompresses the compressed samples prior to digital upconversion and digital to analog conversion to form an analog signal for transmission over an antenna. Compression and decompression can be incorporated into operations of conventional base stations and distributed antenna systems, including OBSAI or CPRI compliant systems.

A noise reducing device includes: an acoustic-to-electric conversion section for collecting noise and outputting an analog noise signal; an analog-to-digital conversion section for converting the analog noise signal into a digital noise signal; and a digital processing section for generating a digital noise reducing signal on a basis of the digital noise signal and a desired parameter. The device further includes: a retaining section for retaining a plurality of parameters corresponding to a plurality of kinds of noise characteristics; a setting section for setting one of the plurality of parameters as the desired parameter of the digital processing section; a digital-to-analog conversion section for converting the digital noise reducing signal into an analog noise reducing signal; and an electric-to-acoustic conversion section for outputting noise reducing sound on a basis of the analog noise reducing signal.

An apparatus performs adaptive analog-to-digital conversion. The apparatus according to one embodiment comprises a frequency modulator unit for changing an input analog signal into a modulated analog signal with a frequency spectrum in a bandwidth of interest, a parallel delta sigma conversion unit operatively connected to the frequency modulator unit, the parallel delta sigma conversion unit converting the modulated analog signal into a digital signal, and a controller operatively connected to the frequency modulator unit and the parallel delta sigma conversion unit, the controller adjusting at least one parameter relating to a frequency characteristic of the frequency modulator unit and/or the parallel delta sigma conversion unit.

A controller for controlling the reverse-bias voltage of an avalanche photodiode in a transceiver or receiver. The controller includes memory for storing information related to the avalanche photodiode, and analog to digital conversion circuitry for receiving an analog signal corresponding to the temperature of the avalanche photodiode, converting the received analog signal into a digital value, and storing the digital value in a predefined location within the memory. Control circuitry in the controller controls the operation of the avalanche photodiode in accordance with the digital value corresponding to the temperature of the avalanche photodiode and a temperature lookup table stored in the memory. A serial interface is provided to enable a host device to read from and write to locations within the memory. The invention is also implemented as a method for controlling the reverse-bias voltage of an avalanche photodiode in a transceiver or receiver and a method for calibrating a transceiver or receiver having an avalanche photodiode.

An energy monitoring system which in preferred embodiments employs at least one nodal junction receiving and creating data by analog to digital conversion from a plurality of local node sensors. Data accumulated by the nodal junction is used for analysis of wave patterns to detect anomalies in the local electrical network and/or loads connected to the local electrical network. Anomalies can be detected in various ways, including: comparison of data with historical data acquired from the local node sensors; comparison of data with known wave pattern profiles for similar loads; and comparison of data with data acquired from local node sensors at other locations. Thus, the accumulation of data in the system of the invention provides the ability to perform comparative analysis to a baseline or standard, and also the ability to perform comparative analysis at an enterprise level across different target locations.

Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier circuit, an analog to digital conversion circuit, a cosine component calculation circuit, a sine calculation circuit, and a zero gain start calculation circuit. The variable gain amplifier circuit is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The analog to digital conversion circuit is operable to convert the amplified output to a corresponding series of digital samples. The cosine component calculation circuit is operable to calculate a cosine component from the series of digital samples, and the sine component calculation circuit operable to calculate a sine component from the series of digital samples. The zero gain start calculation circuit is operable to calculate a raw gain error value based on the cosine component and the sine component, where the gain feedback value is derived from the raw gain error value.

A time-interleaved analog-to-digital conversion apparatus is disclosed. The time-interleaved analog-to-digital conversion apparatus is applied for a television system and includes an input multiplexing module, a gain multiplexer and an analog-to-digital converter. The input multiplexing module receives a plurality of image signals, and samples the image signals according to a clock signal to generate a sample multiplexing signal. The gain multiplexer receives a plurality of gain signals and selectively transmits one of the gain signals corresponding to the sample multiplexing signal according to the clock signal, so as to generate a gain multiplexing signal. The analog-to-digital converter receives the sample multiplexing signal, the gain multiplexing signal and the clock signal. The analog-to-digital converter amplifies and converts the sample multiplexing signal to a digital signal according to the gain multiplexing signal and the clock signal.

The present invention provides an adaptive, intelligent transform based Analog to Information Converter (AIC) for wideband signals by directly converting an analog signal to information (e.g., features, decisions). This direct conversion is achieved by (i) capturing most of the information of a wideband signal via hardware/software implemented mathematical transformations, (ii) effectively removing unwanted signals such as jammer and interfere from the input signal, and (iii) using novel algorithms for highly accurate decision making and feature extraction (e.g., high probability of detection with low probability of false alarm). The jump in the improvement over today's state-of-the-art is in terms of effective and optimum signal information extraction at high-speed.

The novel miniaturized inclinometer for angle measurement with accurate measurement indicator is designed to monitor the angular motion of limbs. The device contains at least one inclinometer with signal conditioning electronics, including a microprocessor, placed within a miniature housing. A number of different sensors can be used and positioned in their housings so that their outputs vary as a function of their angle with respect to the gravity sector. The microprocessor controls a multiplexer, which controls the activities of the sensors; performs analog to digital conversions and measures the output curves from the sensor pairs to perform a conversion which results in a three hundred and sixty degree range with respect to gravity. Calibration data is stored in a read only memory and the microprocessor corrects variables to ensure accuracy and measures the difference in angle between the pairs of sensors.

Various embodiments of the present invention provide systems and methods for mitigating latency in a data detector feedback loop. For example, a method for reducing latency in an error corrected data retrieval system is disclosed. The method includes performing an analog to digital conversion at a sampling instant to create a digital sample, and performing a data detection on the digital sample to create a detected output. The detected output is compared with the digital sample to determine a phase error. During an interim period, the digital sample is adjusted to reflect the phase error to create an adjusted digital sample. After the interim period, the sampling instant is adjusted to reflect the phase error.

A method and an apparatus for an ultrasound system provide compression of ultrasound signal samples after analog to digital conversion and before beamforming. The analog ultrasound signals received from an array of ultrasound transducer elements are digitally sampled by a plurality of analog to digital converters (ADCs) to produce a plurality of sequences of signal samples. Each sequence of signal samples is compressed to form a corresponding sequence of compressed samples. The resulting sequences of compressed samples are transferred via a digital interface to an ultrasound signal processor. At the ultrasound signal processor, the received sequences of compressed samples are decompressed. The typical processing operations, such as beamforming, downconversion and detection, are applied to decompressed samples. This abstract does not limit the scope of the invention as described in the claims.

A pointer detection apparatus and a pointer detection method of the cross point electrostatic coupling type are disclosed, by which a pointer on a conductor pattern can be detected at a higher speed. The pointer detection apparatus includes a conductor pattern, a spread code supplying circuit, a reception conductor selection circuit, an amplification circuit, an analog to digital conversion circuit, and a correlation value calculation circuit. The spread code supplying circuit supplies a plurality of spread codes at the same time. The correlation value calculation circuit determines correlation values between signals output from the analog to digital conversion circuit and the correlation calculation codes respectively corresponding to the spread codes. A pointer is detected based on the determined correlation values.

A highly linear analog-to-digital (ADC) conversion system has an analog front-end device in cascade with a standard ADC converter, and a tunable digital non-linear equalizer. The equalizer corrects the quantization distortion, deviations from ideal response, and additive noises generated by the analog front-end device and ADC converter. The equalizer is formed by three main parts: Generate Function Streams Unit, Finite Impulse Response FIR filters and a summer. The equalizer receives the unequalized output from the ADC converter and generates a plurality of monomial streams in a systolic fashion. Each of the monomial streams is passed through a corresponding linear finite impulse response FIR filter. A convolution sum of all outputs from the FIR filters produces a unique equalized output with the non-linear distortion reduced to a satisfactory level. The FIR filter coefficients are determined by an Identity Equalizer Coefficient Unit, and a Test Signal Generator with different types of test signals. The FIR filter coefficients are set to minimize an error function.

A pointer detection apparatus and a pointer detection method of the cross point electrostatic coupling type are disclosed, by which a pointer on a conductor pattern can be detected at a higher speed. The pointer detection apparatus includes a conductor pattern, a spread code supplying circuit, a reception conductor selection circuit, an amplification circuit, an analog to digital conversion circuit, and a correlation value calculation circuit. The spread code supplying circuit supplies a plurality of spread codes at the same time. The correlation value calculation circuit determines correlation values between signals output from the analog to digital conversion circuit and the correlation calculation codes respectively corresponding to the spread codes. A pointer is detected based on the determined correlation values.

The invention discloses a mobile phone interactive system for the blind, comprising a signal acquiring and transmitting device and a mobile phone device. The signal acquiring and transmitting device is arranged on an arm of a person and comprises a signal acquisition module, an analog-to-digital conversion module and a transmitting module, wherein the signal acquisition module is used for acquiring signals generated based on gesture motion; the gesture motion is used as an input command of the mobile communication of the blind; the analog-to-digital conversion module is used for performing analog-to-digital conversion on the acquired signals; and the transmitting module is connected with the analog-to-digital conversion module to transmit the converted acquired signals. The mobile phone device comprises a receiving module, a signal processing module and a function control module, wherein the receiving module is used for receiving the acquired signals; the signal processing module is used for performing gesture recognition processing on the received acquired signals; and the function control module is used for supplying the interactive control with various functions according to a recognition result. The invention can provide a mobile phone which is convenient for carrying and interaction with high efficiency.

The invention is a method for measuring and processing a plurality of electrical parameters of a common alternating current (AC) service that supplies multiple different electrical devices such that the power use rate and total power used by each of multiple devices is determined. Sensors provide high resolution signals corresponding to the current and voltage of the AC power supplied to the service panel typical of those used in residential construction. Analog-to-digital conversion and processing circuits determine multiple electrical parameters with high resolution at a sampling rate sufficient to determine the electrical parameters for approximately each AC cycle. The electrical parameters are stored as a large data set in a memory with sufficient capacity to store several months of electrical parameters representing each AC cycle. The data set is processed to extract complete on-off cycles of the devices. The on-off cycles are represented by instance structures. The characteristics of the instance structures are used to determine device structures. Each device structure characterizes one of the multiple devices. The contributions associated with the extracted instance structures are subtracted from the data set, making is possible to extract additional instance structures from the residual information in the data set. Information from the device structures are used to help extract instances structures that are partially obscured by overlapping instance structures. The newly extracted instances structures are subtracted from the data set and processing continues until no more instance structures can be extracted. Information from the extracted instance structures and device structures are further grouped and processed to provide useful information reports to a consumer. As the electrical parameters are determined and added to the data set, they can be incrementally processed so that near real time information can be provided to the consumer. The cost of operating each device and other information enables the consumer to make informed decision regarding energy use and conservation.

In a double data rate (DDR) counter and counting method used in, for example, an analog-to-digital conversion in, for example, a CMOS image sensor and method, a first stage of the counter generates a least significant bit (LSB) of the value in the counter. The counter includes at least one second stage for generating another bit of the value in the counter. An input clock signal is applied to a data input of the first stage and a clock input of the second stage.

A pointer detection apparatus includes a conductor pattern with first conductors disposed in a first direction and second conductors disposed in a second direction that crosses the first direction, and a code string signal production circuit for producing signals based on orthogonal code strings with phases different from each other and supplying the produced signals to the first conductors. The apparatus also includes a signal detection circuit connected to the second conductors for detecting a signal corresponding to a variation of electrostatic capacitance between the conductor pattern and a pointer, an analog to digital conversion (ADC) circuit for converting the signal output from the signal detection circuit into a digital signal comprising a word string of multiple bits, and a correlation detection circuit for determining correlation values between the code strings and the word string. The apparatus also includes a memory for storing correlation values successively output from the correlation detection circuit, wherein the pointer is detected based on the correlation values.

The invention discloses a micro/nano satellite measure and control communication integral transmitting and receiving system and a realization method thereof. The method comprises the following steps: 1) uplink signal processing: 11) receiving and processing radio-frequency signals to obtain analog intermediate-frequency signals; and 12) carrying out analog to digital conversion and digital underlocking on the analog intermediate-frequency signals and dividing into two paths of uplink digital intermediate-frequency signals, namely, one path of the signals is sent to a satellite-mounted computer by QPSK (quadrate phase shift keying) demodulation and uplink protocol processing so as to finish uplink data transmission, and the other path of the signals is subjected to the PM (phase modulation) demodulation to obtain side sound signals and PSK (phase shift keying) remote signals, and the PSK remote signals are subjected to BPSK (binary phase shift keying) demodulation to convert into a remote control command which is sent to the satellite-mounted computer so as to finish the remote control; and 2), downlink signal processing: 21), acquiring two paths of data from the satellite-mounted computer and a storage unit, namely, one path of data which is subjected to downlink protocol processing, BPSK modulation, combination with the side sound signals and downlink measure and control carrier PM modulation is combined with the other path of data which is subjected to the downlink protocol processing and the QPSK modulation to enter a satellite-ground radio-frequency emission channel; and 22) converting into radio-frequency signals to finish the remote measure and the downlink data transmission.

A method and apparatus for effecting ultrasonic flaw detection of an object processes an echo signal received from the object being tested in at least three signal channels, wherein the echo signal is scaled to different degrees along each channel to increase and extend the dynamic range of an associated A/D converter system, in a manner which dispenses with the need for using numerous analog high pass and low pass filters and a variable gain amplifier. This reduces complexity and avoids performance limitations. The digital to analog converters sample the differently scaled input signal and a selection circuit selects the output of the digital output obtained from that analog to digital converter which has the highest gain, but which has not overflowed. The digital outputs are seamlessly merged to produce an output that can be displayed as a scan display which shows the location of faults.

A analog-to-digital converters and second order noise shaping systems are presented for providing a noise shaped analog feedback signal to a A/D converter in an analog-to-digital conversion system. The noise shaping system comprises a first order integrator having a single amplifier, and a digital error feedback system comprising a digital signal processing system, in which the digital error feedback system provides an analog feedback signal to the A/D converter with second order noise shaping with respect to a quantization error associated with the A/D converter.

A physical quantity distribution detecting apparatus includes a sensor array in which a plurality of unit sensors for sensing physical quantity are two-dimensionally arranged in a matrix; and an analog-to-digital conversion unit that includes a plurality of comparators for comparing an analog signal read from the unit sensor with a reference signal, the analog-to-digital conversion unit converting a digital signal by measuring a period of time or measuring a signal corresponding to the period of time of each comparison output of the plurality of comparators. Each of the plurality of comparators includes at least one capacitor element connected between a signal line and a constant-voltage line.

A receiver, which is adapted for demodulating signal carriers at variable frequencies to provide received signals at a plurality of different received frequencies, is calibrated to compensate for a frequency-dependent imbalance in the amplitude and/or the quadrature phase of analog in-phase (I) and quadrature (Q) received-signal components that have passed through receiver circuit paths that may cause such imbalance. I-channel and Q-channel Rx-correction coefficients for each of a plurality of different calibration frequencies are estimated and stored in a lookup table. Rx-correction coefficients for a calibration frequency or frequencies that are the same as or closest to the received frequency or frequencies are accessed from the lookup table and combined with digital I and Q components of received signals that have been provided by analog-to-digital conversion of analog I and Q components of received signals that have passed through the imbalance-causing receiver circuit paths upon demodulation at the received frequency.

A receiver includes a plurality of RF receiver modules, a plurality of analog baseband sections, a plurality of analog to digital conversion sections, and a digital baseband processing module. The RF receiver modules convert inbound RF signals into a plurality of inbound analog signals. When the receiver is in a first mode, one of the plurality of analog baseband sections is active to adjust one of the plurality of inbound analog signals to produce an adjusted inbound analog signal; one of the plurality of analog to digital conversion sections converts the adjusted inbound analog signal into an inbound digital signal; and a portion of the digital baseband processing module is active to convert the inbound digital signal into inbound data.

An image sensor circuit includes a pixel array, a plurality of column analog-to-digital conversion (ADC) circuits, and at least two memory blocks. Each column ADC circuit is connected to receive analog pixel signals provided from corresponding pixel circuits of the pixel array, and is configured to convert the received analog pixel signals into digital pixel signals. Each memory block is connected to receive digital pixel signals provided from corresponding column ADC circuits of the plurality of column ADC circuits. At least two of the at least two memory blocks are connected to receive digital pixel signals that are provided from corresponding column ADC circuits that are located to a same side of the pixel array. Each memory block of the at least two memory blocks includes a plurality of memory cells, one or more sense amplifiers connected to the memory cells by a readout bus, and a memory controller.