1269 results about "Ćuk converter" patented technology

A low power integrated circuit having analog to digital conversion circuitry capable of receiving a plurality of analog signals and converting them to a digital value. The digital value is then transmitted, upon request, over a single wire bus. The accuracy of the analog to digital conversion circuitry can be calibrated via trim codes stored in an onboard EPROM.

This invention relates to a power module for a plug-in hybrid electric vehicle including an integrated converter having a rectifier changing AC to DC, a DC / DC converter changing from a first voltage to a second voltage, and a battery storing electrical energy. The integrated converter operates in three modes 1) AC plug-in charging mode, 2) boost mode supplying power from the battery to the electrical bus and 3) buck mode supplying power from the electrical bus to the battery. The integrated converter utilizes the same single inductor during each of the three operating modes to reduce cost and weight of the system.

A DC / DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.

Circuits and methods to achieve a buck-boost converter, capable to achieve a constant output voltage by pre-charging of an inductor if the input voltage is close to the output voltage has been achieved. The prior art problem of output voltage variations occurring while the input voltage is close to the output voltage is avoided. In case the input voltage is lower than a defined threshold voltage or the duty cycle exceeds a defined maximum allowable level, the inductor of the converter is pre-charged followed by boosting of the energy of the inductor to the output of the converter. In both modes the control loops of the buck converter can be used for buck duty cycle control. The duration of the pre-charge depends upon the level of the input voltage, the lower the input level is the longer is the pre-charge performed.

A method and apparatus provides welding-type power and preferably includes a removable battery or other energy storage device, a converter connected to the battery, and a controller. The controller may have a CV and / or a CSC and / or an AC weld control module, and / or an ac auxiliary control module. The converter is a boost converter, a buck converter, a cuk converter, a forward converter, an inverter, a bridge converter, and / or a resonant converter. The controller may include a battery charging control module, and may have one or more charging schedules, and / or data for stored charge, thermal information, expected life of the battery, maximum amp-hour charge for the battery, maximum charging current and / or feedback. The battery charging schedules may include at least 3 phases, such as a phase of increasing voltage and a phase of decreasing current, a substantially constant power phase. The controller can wirelessly provide data to a display or pda. A generator may provide power to the battery, charger, and / or the weld. It can include a vehicle and use its dc power system.

Voltage regulation, transient response and efficiency of a voltage regulator module (VRM) is improved where short duty cycles are necessitated by large differentials of input and output voltage by including at least one clamping of a tap of an inductance in series with an output of each of a plurality of parallel branches or phases which are switched in a complementary fashion or providing coupling between inductors of respective phases. Such coupling between inductors is achieved in a small module with an integrated magnetic structure. Reduced component counts are achieved while deriving built-in input and output filters. Principals of the invention can be extended to isolation applications and push-pull forward converts, in particular. A lossless clamping circuit is also provided allowing spike currents to be suppressed while returning power to the output of the VRM.

An A / D converter includes a resistor ladder for generating a plurality of reference potentials, a comparing section for comparing each of the reference potentials against an input analog signal to output a thermometric code, and a dynamic encoder composed of a combinational circuit to encode the thermometric code to a binary code by responding a clock signal. The A / D conversion is finished in a single clock cycle at a high speed, with a reduced number of elements and reduced power dissipation.

A DC / DC converter includes a pre-regulator stage, which may include a boost converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage up by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.

A delta-sigma modulator comprising a first quantizer providing a first digital signal d0(k) representing the input signal g(t); a loop filter with input signal paths; a loop quantizer providing a corrective digital signal d1(k) representing the loop filter's output signal y(t); an array of feedback DACs D / A converting the sum d(k)=df(k)=d0(k)+d1(k) of the first and the corrective digital signals and injecting feedback signals into the loop filter.The loop filter's input node is applied the difference of the input signal g(t) and the global analog feedback signal a3(t). The global feedback signal a3(t) is delayed several clock cycles with respect to the digital output signal d(k). The delay is used to carry out mismatch-shaping and deglitching algorithms in the feedback DACs. The feedback DACs' different delays and gain coefficients are designed such that the modulator is stable. The filter's input signal paths and the compensating DAC are designed such that the gain from the input signal g(t) to the loop quantizer is small, ideally zero. Thus, the loop quantizer's resolving range can be a fraction of the first quantizer's resolving range, whereby the output signal's d(k) resolution can be much higher than the individual resolutions of d0(k) and d1(k).The delta-sigma modulator is well suited for the implementation of high-resolution wide-bandwidth A / D converters. Important applications include digital communication systems.

A DC / DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.

A voltage converter including a capacitive voltage divider combined with a buck converter and battery charger. The converter includes four capacitors, a switch circuit, an inductor and a controller. The capacitors form a capacitor loop between an input node and a reference node and include a fly capacitor controlled by the switch circuit, which is controlled by a PWM signal to half the input voltage to provide a first output voltage on a first output node, and to convert the first output voltage to the second output voltage via the inductor. The controller controls the PWM signal to regulate the second output voltage, and provides a voltage control signal to control the input voltage to maintain the first output node between a predetermined minimum and maximum battery voltage levels. A battery charge path is coupled to the reference node and battery charge mode depends upon the battery voltage.

An analog-to-digital converter system [50D] processing an input signal, g, which can be either a discrete-time or a continuous-time signal. A first quantizer [154] generates a first digital signal, d0(k), representing the sum of the input signal, g, and a dithering signal, y0. A digital-to-analog converter [156] generates an analog feedback signal, alpha, representing accurately the first digital signal, d0(k). The DAC [156] may be linearized by the use of mismatch-shaping techniques. A filter [158] generates the dithering signal, y0, by selectively amplifying in the signal band the residue signal, r0, defined as the difference of the input signal, g, and the analog feedback signal, alpha. Optional signal paths [166][168] are used to minimize the closed-loop signal transfer function from g to y0, which ideally will be zero. An analog compensation signal, m0, which is described by a well-controlled relationship to the residue signal, r0, is extracted from the filter [158]. Ideally, the closed-loop signal transfer function from g to m0 will be zero, or at least small in the signal band. A second quantizer [160] converts the analog compensation signal, m0, into a second digital signal, dm0(k). The two digital signals, d0(k) and dm0(k), are filtered individually and then added to form the overall output signal, dg(k). The second digital filter [164] has a low signal-band gain, which implies that the sensitivity to signal-band errors caused by the second quantizer [160] will be low. The output signal, dg(k), is a highly-accurate high-resolution representation of the input signal, g. Circuit imperfections, such as mismatch, gain errors, and nonlinearities, will cause only noise-like errors having a very low spectral power density in the signal band.The invention facilitates the implementation of uncalibrated highly-linear high-resolution wide-bandwidth A / D converters [50D], e.g., for use in digital communication systems, such as xDSL modems and other demanding consumer-market products for which low cost is of the essence.

A novel switching hysteretic power converter is presented. The power converter combines the function of a capacitive charge pump with the function of an inductive step down converter to obtain a switching boost converter with a much simpler control method with respect to conventional inductive boost power converters. The hysteretic control provides stable operation in all conditions with excellent load transient response. Furthermore the hysteretic control allows high frequency switching reducing the size and cost of the passive components. The Discontinuous Conduction Mode of operation provides very high efficiency even at light loads. The presented power converter can be operated as a boost converter or as a buck converter simply by changing the switching phase of one switch. In both types of operation the efficiency of the hysteretic power converter can be quite high even at high switching frequencies.

Systems and methods are herein disclosed for efficiently and cost-effectively balancing the voltages across batteries and / or cells in an energy storage system. A controller monitors the battery voltages and instructs regulator circuits to balance voltages between any batteries or sets of batteries having imbalanced voltages. Regulator circuits implementing a modified Ćuk converter can be utilized. Regulator circuits can have two capacitive circuits, one inductive circuit, and two switches. Two capacitors, an inductor, and two field effect transistors can be used in each regulator circuit.

A ballast circuit for a high intensity discharge lamp includes a boost converter, responsive to a dc input voltage, for providing a boosted dc output voltage; a boost controller, responsive to the boosted dc output voltage, for driving the boost converter to maintain the boosted output voltage at a predetermined level; a buck converter, responsive to the boosted dc output voltage, for providing a reduced dc output voltage; and a buck controller, responsive to the reduced output voltage, for driving the buck converter to operate the discharge lamp in a transition mode and maintaining the reduced dc output voltage at a preselected level for operating the discharge lamp in a steady state mode.

In a solid-state imaging device including an analog-to-digital converter, a clock converter that generates a high-speed clock that is faster than a master clock is provided. A voltage comparator compares a pixel signal input from a vertical signal line for each row control line with a reference voltage, generating pulses having magnitudes corresponding to a reset component or a signal component in a temporal direction. A counter counts the width of pulse signals until completion of the comparison in the voltage comparator based on a clock that is generated based on the high-speed clock, holding a count value at a time of completion of the comparison. A communication and timing controller exercises control so that the voltage comparator performs comparison for the reset component and the counter performs down-counting in a first processing iteration and so that the voltage comparator performs comparison for the signal component and the counter performs up-counting in a second processing iteration.

A comparator is arranged to compare a series of analog voltage signal samples on a first capacitor with a voltage on a second capacitor which is linearly increased or decreased to equal the sample value. The comparator's single output freezes the count of the counter at counts which are proportional to the voltage of the respective samples. In this manner, analog to digital conversion can be accomplished using a single line between the analog and digital sides of a circuit, thereby reducing parasitic capacitance.

A hysteretic buck converter provides improved regulation control, in particular for buck converter standby operation. A comparison circuit compares the output voltage of the buck converter to a waveform that is generated from an indication of the output current of the converter, so that the turn-on time of the converter is advanced as the output current demand increases. The resulting action anticipates a reduction in output voltage due to the increased current, preventing an excursion of the output voltage below the ripple voltage minimum. The turn-off time of the converter is controlled by an upper threshold that limits the ripple voltage maximum. The output current indication may be a measurement of output current, or may be a dynamic value calculated from the input voltage and the output voltage waveform.

Voltage regulation, transient response and efficiency of a voltage regulator module (VRM) is improved where short duty cycles are necessitated by large differentials of input and output voltage by including at least one clamping of a tap of an inductance in series with an output of each of a plurality of parallel branches or phases which are switched in a complementary fashion or providing coupling between inductors of respective phases. Such coupling between inductors is achieved in a small module with an integrated magnetic structure. Reduced component counts are achieved while deriving built-in input and output filters. Principals of the invention can be extended to isolation applications and push-pull forward converts, in particular. A lossless clamping circuit is also provided allowing spike currents to be suppressed while returning power to the output of the VRM.

A method is disclosed for controlling single-phase DC / AC converters, along with a converter arrangement having at least two single-phase DC / AC converters. A controller is provided which can control the at least two single-phase DC / AC converters, and an isolation transformer, wherein outputs of the at least two single-phase DC / AC converters are cascade-connected with each other and an input of the isolation transformer. The controller is configured to control the at least two single-phase DC / AC converters to deliver power from their inputs to their outputs by turns.

Each of plural sigma-delta modulators having a sampling capacitor, an integrator, and a quantizer are connected to each other in parallel. Each of the sigma-delta modulators conducts parallel oversampling in which an analog input signal is sampled by a sampling capacitor, and the sampling result is quantized by the integrator and the quantizer. Then, the quantized values of the sigma-delta modulators are added to obtain MSBs, the residue values of the integrators after quantizing in the respective sigma-delta modulators are added, and the addition result of the residue values is converted analog-to-digital to obtain LSBs.

An inverter control apparatus includes an instruction calculator which receives a speed instruction and a particular component of a current of a motor to obtain an output frequency instruction and output voltage instructions of an inverter and a current estimator to estimate, according to a reference phase obtained by integrating a current detection value of one phase of an ac motor and an output frequency instruction thereof, currents of other phases of the ac motor. The current estimator includes a uvw / dq converter which converts a fixed coordinate system into a rotating coordinate system, a dq / uvw converter which is connected to the uvw / dq converter and which converts the rotating coordinate system into the fixed coordinate system, and a closed loop to input an output from the dq / uvw converter to the uvw / dq converter. This system can therefore estimate currents of other phases according to the motor current of one phase.

The present application discloses a laminated busbar arrangement for use in a three-level power converter and a power converter. The laminated busbar arrangement comprises a first layer of busbar comprising a neutral-point sub busbar congfigured to make electrical connections between respective components in the three-level power converter and a neutral-point potential; a second layer of busbar comprising a plurality of sub busbars congfigured to make electrical connections between the respective components in the three-level power converter and a positive direct current (DC) input, a negative DC input and an alternating current (AC) input / output in the three-level power converter, and between respective semiconductor switching components. The present application may effectively reduce stray inductance.

This invention relates to a power module for a plug-in hybrid electric vehicle including an integrated converter having a rectifier changing AC to DC, a DC / DC converter changing from a first voltage to a second voltage, and a battery storing electrical energy. The integrated converter operates in three modes 1) AC plug-in charging mode, 2) boost mode supplying power from the battery to the electrical bus and 3) buck mode supplying power from the electrical bus to the battery. The integrated converter utilizes the same single inductor during each of the three operating modes to reduce cost and weight of the system.

There is provided a photovoltaic and fuel cell hybrid generation system using dual converters and a single inverter and a method of controlling the same. A photovoltaic and fuel cell (PV-FC) hybrid generation system according to an aspect of the invention may include: a PV DC / DC converter unit converting a PV output voltage into a predetermined voltage; an FC DC / DC converter unit converting an FC output voltage into a predetermined voltage; a DC link unit commonly connecting an output terminal of the PV DC / DC converter unit and an output terminal of the FC DC / DC converter unit, and linking the converted PV output voltage from the PV DC / DC converter unit to the converted FC output voltage from the FC DC / DC converter unit to thereby generate a DC voltage; and a DC / AC inverter unit converting the DC voltage from the DC link unit into a predetermined AC voltage.

Analog pixel signals, which are read out from an image sensor, are subjected to predetermined signal processes, and are converted to digital pixel signals by an A / D converter. The digital pixel signals are separated to RGB signals. The RGB signals are multiplied by a predetermined color matrix coefficient. After that, luminance signals are extracted from the RGB signals. A light adjusting control signal for adjusting the quantity of light is calculated based on the luminance signals. The color matrix coefficient is changed based on the light adjusting control signal.

A method for initializing a counter within a corresponding set of A / D converters of N sets of A / D converters of a single-chip CMOS-type image sensor in order to minimize none uniformity across the N sets of A / D converters is provided. The single chip CMOS type image sensor includes an image sense array having N columns of output lines for outputting N analog signals respectively; and a signal process device for generating N sets of digital signal each of which corresponds to one of N analog signals respectively. The signal process device has N input lines and N sets of A / D converter each of which including a counter for generating one of the N sets of digital signal respectively. The method comprises the steps of applying a predetermined reference voltage at each of N input lines of the signal process device such that a compensation value corresponding to each set of A / D converter is obtained. The method further preloads the counter of each corresponding set of A / D converter with the compensation value corresponding to each set of A / D converter.

An automatic gain control device for an electronic endoscope is provided and comprises a controllable gain amplifier, an A / D converter, a histogram circuit, and a CPU. The controllable gain amplifier amplifies image signals from an imaging device. Amplified image signals from the controllable gain amplifier are input to the A / D converter. A histogram of the amplified image signals from the controllable gain amplifier is produced by the histogram circuit when an image taken in a white-balance test accessory is taken. By using the CPU, the gain of the controllable gain amplifier is adjusted in accordance with the determination of whether a saturated pixel exists for signals in the tolerance range of the A / D converter, so that a linear region of the image signals from the controllable gain amplifier substantially coincides with the tolerance range.

Disclosed are a grid-connected converter device of a direct-drive wind power system and a corresponding power coordination control method. The converter device is composed of basic converter units of a Boost circuit based on ac-side energy storage; the structure sufficiently utilizes the equivalent inductance of a power generator stator winding, avoids an external inductor in traditional dc voltage booster circuit, and reduces power loss and equipment cost. Two converter proposals, including a diode rectification mode and a PWM rectification mode are designed; converter topologies with two capacity grades, including medium and small power converter topology, megawatt grade high power converter topology, and relative extension structures are designed, such as a parallel connection converter and an H bridge cascade structure converter; wherein, the converter with the H bridge cascade structure is applicable to grids with high capacity and high voltage, and can obviously reduce the harmonic content in grid-connected current; meanwhile, the control method performing feedback through three closed loops is designed, so the input power and output power of the converter are balanced instantaneously, the dc bus voltage maintains stable, and the grid-connected current wave is sine.