129 results about "Sampling instant" patented technology

In a method of lossless processing of an integer value signal in a prediction filter which includes a quantiser, a numerator of the prediction filter is implemented prior to the quantiser and a denominator of the prediction filter is implemented recursively around the quantiser to reduce the peak data rate of an output signal. In the lossless processor, at each sample instant, an input to the quantiser is jointly responsive to a first sample value of a signal input to the prediction filter, a second sample value of a signal input to the prediction filter at a previous sample instant, and an output value of the quantiser at a previous sample incident. In a preferred embodiment, the prediction filter includes noise shaping for affecting the output of the quantiser.

A self-aligned clock recovery circuit for synchronizing a local clock with an input data signal includes a sampling type phase detector for generating an output signal based on the phase difference between the local clock and the data signal timing. The phase detector obtains samples of consecutive data symbols at sampling times corresponding to transitions of the local clock, and obtains a data crossover sample at a sampling instant in between those of the consecutive data symbol samples. A phase shifter is employed to phase shift the local clock by an amount corresponding to a time varying modulation signal so as to obtain each data crossover sample at a variable sampling instant relative to the associated consecutive symbol samples. Logic circuitry determines whether the local clock appears to be early or late based on a comparison of the logic levels of the symbol samples and the associated data crossover sample, and provides a corresponding output signal through a filter to the local clock to adjust the clock accordingly. Since the relative sampling instants of successive data crossover samples are varied with time, the phase detector output signal amplitude is substantially proportional to the amount of phase error between the local clock and the symbol timing, thereby improving jitter properties of the clock recovery circuit.

Various embodiments of the present invention provide systems and methods for mitigating latency in a data detector feedback loop. For example, a method for reducing latency in an error corrected data retrieval system is disclosed. The method includes performing an analog to digital conversion at a sampling instant to create a digital sample, and performing a data detection on the digital sample to create a detected output. The detected output is compared with the digital sample to determine a phase error. During an interim period, the digital sample is adjusted to reflect the phase error to create an adjusted digital sample. After the interim period, the sampling instant is adjusted to reflect the phase error.

The invention provides an intelligent information fusion method of a distributed multi-sensor. The intelligent information fusion method includes the following steps: (1) directly collecting signals from a distributed ultrasonic wave receiver, sending the signals to a control center, filtering processing the signals through distributed Kalman filtering, (2) after distributed signal filtering processing, aligning time, space and a related track, unifying sample frequency, namely each measure system is provided with current measured data of each sampling instant, and unifying a space and time coordinate system, (3) judging errors through a track correlation method with the deviation between a future point and an observing point as error judgment criteria, and (4) matching each relative track into a novel track through a fusion method of optimal fusion estimation. By means of the intelligent information fusion method of a distributed multi-sensor, the optimal fusion of numbers of estimated values is achieved through a minimum variance principle, and high-precision indoor positioning of supersonic waves is achieved effectively.

A data regenerator is provided which contains a clock regenerator which includes a phase comparator and a clock generator and obtains a sampling clock signal from an input signal, and two sampling devices, a measurement and a sampling device. In both sampling devices, it is possible to adjust the decision threshold and the sampling instants separately. The function of the clock regenerator is not impaired as a result of this. The bit-by-bit comparison of the sampled binary signals yields comparison values which are fed to a controller. The controller determines the optimum decision threshold and the optimum sampling instant from the comparison values.

A decision feedback structure for recovering a bit stream out of received signals is disclosed, wherein the sampling instant may be tuned in dependence of the sequence or pattern of the preceding bits so as to follow the bit sequence dependent instant of the maximum eye opening. The decision-feedback equalizer structure includes decision means for making a bit value decision at a sampling instant, a feedback path to feed back bit values to said decision means and means for adapting the sampling instant for a bit value decision made by said decision means with respect to the sampling phase depending on the bit values of preceding bits, in particular depending on the bit value of the previous bit.

The invention belongs to the technical field of electric system operation and control, and particularly relates to an electric system state estimation method of a Phasor Measurement Unit-PMU based on an interpolation matrix. According to the method, during the updating interval period of SCADA measurement, a state, obtained through a PMU interpolation, of an area U is equivalent to prior state information of the area U, the prior state information is continuously updated at each sampling instant of the PMU, the interpolation matrix is updated when SCADA measurement and PMU measurement reach simultaneously at the next moment, and therefore the real-time running state of each node of the area U is worked out. The method has the advantages of being high in accuracy and sampling speed of PMU measurement, and can track the running state of the system accurately in real time.

Disclosed is a sliding-mode synchronization control method of a double-permanent-magnet synchronous motor chaos system. The sliding-mode synchronization control method includes: establishing a chaos model of a permanent magnet synchronous motor system as shown in the form, and initializing system state and relevant control parameters; at each sampling instant, calculating synchronization errors, sliding model surfaces and a first-order derivative of the permanent magnetic synchronous motor chaos system; designing a robust controller by adopting an active sliding-mode control method and finally realizing quick synchronization of the chaos state of the double-permanent-magnet synchronous motor chaos system with two different initial conditions and uncertain parameters.

A method and an arrangement of determining inductances of a synchronous reluctance machine are provided. The method includes supplying a voltage pulse in the quadrature-axis or direct-axis direction of rotor, sampling currents generated by the supplied voltage pulse, and calculating values of flux at the sampling instants from the value of the supplied voltage pulse, the sampled current values and a value of the stator resistance. The method also includes calculating synchronous inductance of the machine by dividing the calculated flux values by the corresponding sampled currents, and/or calculating transient inductance of the machine as a derivative of the flux with respect to current, and storing the calculated values as a function of current.

A method for controlling an alternating current (AC) motor includes choosing a pulse sequence based on a ripple current in the AC motor at a sampling instant; and providing a voltage to the AC motor based on the pulse sequence.

Disclosed is a finite time synchronous control method of double permanent magnet synchronous motor chaotic systems. The method includes that a chaotic model of a permanent magnet synchronous motor system is established, and system state and relevant control parameters are initialized; at every sampling instant, synchronous errors, rapid nonsingular terminal sliding mode surfaces and first-order derivatives of principal and subordinate chaotic systems of a permanent magnet synchronous motor are calculated; according to the synchronous errors, the rapid nonsingular terminal sliding mode surfaces and the first-order derivatives, a synchronous controller of the double permanent magnet synchronous motor chaotic systems is designed, the problem of buffeting during sliding-mode control can be solved, and chaotic states of the principal and subordinate chaotic systems can be rapidly synchronized.

The present disclosure relates to a timing synchronization circuit for a digital receiver structure that includes a timing error detection module comprising a phase difference calculation unit arranged for calculating a phase difference between incoming samples of a digital data stream, and a timing error estimator arranged for determining a timing error estimate based on the calculated phase difference, and for generating, based on the determined timing error estimate, a signal indicative of timing error detection. The circuit also includes a timing error control module arranged for receiving the signal indicative of timing error detection, for evaluating the number of received signals indicative of timing error detection and for outputting, after comparison with a threshold value, a sampling adjustment command for adjusting the sampling instants applied for obtaining the digital data stream.

An inductive proximity sensor, comprising a resonant circuit adapted to be affected electrically by the approach of metallic materials and comprising a control for storing a value of a sampling instant when an output value of the resonant circuit is measured, the sampling instant corresponding substantially to an instant in which a first amplitude of the response of the resonant circuit to a pulse applied thereto, measured in the presence of a ferromagnetic material arranged at a distance from the sensor, is substantially equal to a second amplitude of the pulse response measured in the presence of a non-ferromagnetic material arranged at the same distance.

Various aspects of the present invention relate to techniques of measuring delays between edges of signals of a circuit. Alternating signals, synchronous to a first clock, are supplied to a plurality of nodes of the circuit. First samples of a plurality of signals associated with the alternating signals are captured using a first capture clock, of which sampling instants are synchronous to a second clock. Second samples of the first samples are then captured using a second capture clock, of which sampling instants are also synchronous to the second clock. The captured second samples are conveyed via a shift register to a plurality of modulo counters. The measured signal delay includes a timing skew associated with the first clock and a timing skew of the first capture clock but not a timing skew of the second capture clock.

A decision feedback equalizer includes an input path for receiving a bitstream with inter-symbol interference, and a feedback signal path is coupled to the input path for correcting a sampled value of an incoming bit of the bitstream based on inter-symbol interference of a preceding bit. The feedback signal path includes a controllable delay circuit for receiving the preceding bit. A feedback path controller is coupled to the controllable delay circuit to regulate a delay introduced to the preceding bit. The delay is a function of an accumulated value of data of early-late events of a sampling instant of the bitstream for different data pulse patterns.

A high speed stabilizing drive control method of a satellite-borne large inertia load mechanism includes the following steps: (1) powering direct currents on a motor and calculating the phase difference of the motor and a rotary transformer after the load mechanism is stabilized; (2) collecting the current rotating speed of the motor at the current speed ring sampling instant and calculating torque electric currents; (3) collecting the electric currents iA and the electric currents iB of the motor at the current speed ring sampling instant to obtain the harmonic frequency spectrum, the amplitude and the phase of the iA and the iB; (4) conducting harmonic compensation on the iA and the iB; (5) converting the A-phase winding currents and the B-phase winding currents of the motor after compensation under a rotor coordinate system; (6) calculating the two-shaft voltage of the rotor coordinate system; (7) determining the three-phase time value of a PWM waveform generator, wherein a SVPWM waveform generator generates voltage waves according to the three-phase time value, and the voltage waves are loaded on a motor winding to control the motor; (8) entering the next current ring sampling instant, and switching to the step (3) to execute repeatedly; (9) entering the next current ring sampling instant, and switching to the step (2) to execute repeatedly.

A method for operating a time-interleaved analog-to-digital converter for converting an analog input to a digital output using a time-interleaved analog-to-digital converter, wherein the time-interleaved analog-to-digital converter comprises an array of M sub ADCs (ADC₁, ADC₂, . . . , ADC_M), where M is an even integer, and each row of the array comprises one of the M sub ADCs. The method comprises the step of, for every sampling instant n, where n is an integer in a sequence of integers, converting the analog input by means of the sub ADC in row k(n) of the array, wherein 1≦k(n)≦M. A value between 1 and M is assigned to k(n) for the first sample instant, and k(n+1) is selected such that a) k(n+1)>M/2 if k(n)≦M/2, otherwise k(n+1)≦M/2; b) M/2−1≦|k(n+1)−k(n)|≦M/2+1; and c) k(n+1)=k(m+1) if and only if n−m is an integer multiple of M. A time interleaved analog-to-digital converter operating in accordance with the method is also disclosed.

The invention relates to the field of fluid filters. It provides a method of detecting clogging of a fluid filter, which method comprises measuring, at successive sampling instants, the pressure difference ΔP from upstream to downstream across the filter, and then calculating the first time derivative {ΔP}′ of the pressure difference ΔP at different instants, and then sending a clogging signal S_C representative of the filter being clogged when the first derivative {ΔP}′ is equal to zero.

The invention provides a remote media playing signal time delay test method and a test system. The method includes a first step of carrying out multiple sampling on remote media playing signals of each playing stream in the N playing streams of a server end, a second step of generating first feature codes according to each sampling data, a third step of corresponding to each playing stream, storing each first feature code corresponding to each playing stream, and each sampling instant corresponding to each first feature code, a fourth step of carrying out sampling on a client end at client end sampling instants Ts 2', a fifth step of generating second feature codes according to client end sampling data, a sixth step of obtaining server end signal sampling instants Ts1 corresponding to the first feature codes matched with the second feature codes, and a seventh step of obtaining signal time delay Td of the client end and the server end to the same remote media playing signal based on the server end signal sampling instants Ts1 and the client end sampling instants Ts 2'. The remote media playing signal time delay test method and the test system can effectively and accurately detect the time delay of the remote media playing signals.

In various embodiments, a phase current sampling apparatus (300, 600, FIGS. 3, 6), an electric motor drive system (100, FIG. 1), and a motor vehicle (1200, FIG. 12) include switching circuitry adapted to receive first and second phase current waveforms. The switching circuitry provides the first phase current waveform during at least two offset sampling instants, and provides the second phase current waveform during a reference sampling instant. An analog-to-digital converter is adapted to sample the first phase current waveform at the offset sampling instants, and to sample the second phase current waveform at the reference sampling instant. An embodiment of a method for regulating phase current waveforms includes an analog-to-digital converter generating samples of a first phase current waveform at sampling instants that occur before and after a reference sampling instant, and generating a sample of a second phase current waveform at the reference sampling instant.

The present invention discloses a system for abnormal data identification based on a merging unit. The system comprises a mutual inductor, a collector and a merging unit. The mutual inductor collects one-time current and voltage data, performs integration conversion to form digital quantity and transmits the digital quantity to the collector; the merging unit receives sampling data sent from the collector, performs protocol conversion and sends the sample data to a protective device; and the merging unit receives sample instant data of the collector and calculated adjacent sample point instant difference of phase current and phase voltage in real time, regulates the maximum sampling value of the last cyclic wave in real time through each cyclic wave according to the sampling cyclic wave amplitude and the sampling frequency of the message sent by the collector, and repeatedly calculates the mutation threshold value according to the value, determines whether the adjacent sampling point instant difference value exceeds the mutation threshold value or not, reports the sample abnormality when the instant difference value exceeds the mutation threshold value and marks the sampling points having the instant difference value exceeding the mutation threshold value as the mutation value. The system for abnormal data identification based on the merging unit can rapidly determine the abnormal data output by the collector so as to avoid logic misjudgement of a transformer station protection control device.