150 results about "Noise shaping" patented technology

The invention discloses a high-precision power supply output correction method based on a digital pre-distortion technology, and relates to the technical field of power electronics, and the method comprises the steps: integrating an electricity-heat-magnetism real-time combined observer, and inputting parameters including a power supply output voltage, a current, a power device junction temperature, a magnetic element surface temperature, an environment temperature, and an input voltage ripple; using a hierarchical memory depth pre-distortion compensator to generate an anti-phase pre-distortion signal containing long time domain thermal constant compensation and short time domain capacitance energy storage compensation based on modeling engine output; based on a double-ring adaptive updating module, an inner ring updates electrical parameters, including on resistance and dead time, by taking a switching period as a reference, and an outer ring updates thermomagnetic parameters, including thermal resistance and a magnetic core saturation point, in a minute-level period; and the DAC is connected in series with a pre-distortion signal output end through an anti-interference execution channel, and comprises a noise shaping DAC and a driving stage for delay matching. According to the invention, through an electric-thermal-magnetic three-field combined observation architecture, the limitation of traditional single physical field monitoring is broken through.

The noise-shaping successive-approximation-register analog-to-digital converter includes a capacitive digital-to-analog-converter, a loop filter including a plurality of integration capacitors, and a multi-input comparator. During an integration phase, the capacitive digital-to-analog converter couples to the plurality of integration capacitors to develop an integration voltage. The integration capacitors are then arranged to passively apply a first gain to the integration voltage. The multi-input comparator also provides a second gain to the integration voltage.

The invention relates to an integrator circuit for eliminating thermal noise and a Delta-sigma modulator, and belongs to the technical field of electronic signal processing, the modulator comprises at least two stages of integrators, a quantizer, a feedback DAC and an adder; the integrator comprises an integrator circuit, and the integrator circuit comprises a sampling module for sampling an input signal source; the double-path multi-phase clock control pre-amplification auxiliary storage circuit module alternately samples and stores thermal noise voltage and offset voltage; the integral amplifier is used for amplifying a signal output by the double-path multi-phase clock control pre-amplification auxiliary storage circuit module; and the integrating capacitor is connected between the integrating amplifier and the two-way multi-phase clock control pre-amplification auxiliary storage circuit module, and feeds back the signal after integration processing to the two-way multi-phase clock control pre-amplification auxiliary storage circuit module to realize signal modulation and noise shaping. The thermal noise introduced in the sampling process is effectively reduced, and the area of the whole chip is reduced while the signal-to-noise ratio is improved.

The invention relates to the technical field of digital playing equipment, and provides a lossless control method for the volume of a digital player and the digital player. The method comprises the following steps of: after receiving a target volume parameter, executing dynamic multiplying power oversampling and high-order noise shaping on an input digital audio signal, and injecting preset jitter to suppress in-band quantization distortion so as to generate an optimized digital audio stream; meanwhile, a high-resolution digital reference current control instruction corresponding to the target volume is independently generated, output of a reference current source is adjusted according to the high-resolution digital reference current control instruction, and a high-precision differential current signal is obtained by combining nonlinearity, temperature excursion and quantization errors of a closed-loop feedback compensation device through a multi-bit current segmentation network; performing bias stabilization processing on the signal, and converting the signal into a differential voltage signal for suppressing common-mode noise through a precision differential resistance network; and finally, low-distortion differential analog audio signals capable of directly driving a load are output through low-distortion gain, impedance conversion and power driving, so that low-distortion, high-signal-to-noise-ratio and wide-dynamic-range output in a full-volume range is realized.

The invention relates to a full-dynamic exponential increment type low-delay high-precision analog-to-digital converter, which comprises a loop integrator used for receiving an ith-round input signal, and sequentially performing addition processing and integration processing on the ith-round input signal and a feedback signal calibrated by an (i-1) th round to obtain an ith-round integration signal; the first-order exponential increment error feedback noise shaping SAR quantizer is used for carrying out addition processing and multi-bit quantization on the ith round integral signal and the double (i-1) th round residual signal to obtain an ith round quantization signal; the digital-to-analog conversion module is used for sequentially performing format conversion, mismatch calibration and digital-to-analog conversion on the (i-1) th round of quantized signals in the process of processing the ith round of input signals to obtain feedback signals after the (i-1) th round of calibration; and the digital decimation filter module is used for carrying out digital filtering and down-sampling processing on the ith-round quantized signal to obtain an ith-round Nyquist rate output signal. The system can realize higher significant digits in shorter conversion time.

The invention relates to the technical field of integrated circuit design, in particular to a noise shaping assembly line successive approximation type analog-to-digital converter and a control method. Comprising a first stage including an auxiliary successive approximation analog-to-digital converter and a first stage voltage processing module; the second stage comprises a dual-channel noise shaping successive approximation type analog-to-digital converter and a loop filter; the input end of the residual amplifier is connected with the first-stage voltage processing module, and the output end of the residual amplifier is connected with the noise shaping successive approximation type analog-to-digital converter; the first input end of the digital code aligner is connected with the output end of the comparator of the auxiliary analog-to-digital converter, and the second input end of the digital code aligner is connected with the output end of the second-stage comparator. According to the invention, the analog-to-digital conversion speed can be accelerated, the influence of a zero point on a residual voltage amplification coefficient is reduced, the conversion time is shortened, and the input and output common-mode voltages of the time domain converter are stabilized.

An image compression device includes a discrete cosine transform (DCT) circuit, a quantization noise shaping (QNS) circuit, and an encoder circuit. The DCT circuit performs a DCT on original image data to generate first data. The QNS circuit performs QNS on block data in first data to determine, based on a first coefficient and a second coefficient of the block data, a QNS score of the first coefficient, and replace the first coefficient with the second coefficient when the QNS score is greater than zero so as to generate second data, wherein the second coefficient is obtained by decreasing an absolute value of the first coefficient. The encoder circuit encodes the second data to generate compressed image data.

The invention discloses a high-precision feed-forward noise shaping successive approximation analog-to-digital converter. The analog-to-digital converter comprises a first CDAC module, a second CDAC module, a first feed-forward capacitor, a second feed-forward capacitor, a first integrating capacitor, a second integrating capacitor, a first elimination capacitor, a second elimination capacitor, a dynamic amplifier module and a dynamic comparator module. By adopting the technical scheme of the invention, the sampling noise which cannot be optimized by noise shaping is suppressed, and a better precision effect is generated.

Time-to-digital converters (TDC) employing a single-stage delay pair for a wide input range and reduced quantization noise in a phase-locked loop (PLL) and related fabrication methods are disclosed. Aspects disclosed in the detailed description include a single-stage Vernier time-to-digital converter (TDC) which mitigates the device mismatch impact and therefore avoids possible spurious tones in a fractional-N PLL application. Combined with a delta-sigma noise shaping stage and a ring-oscillator based coarse TDC, the invention achieves a good trade-off between resolution, detection range and PLL locking speed.

The invention relates to the technical field of integrated circuit design, in particular to a multipath interleaving pipelined noise shaping analog-to-digital converter and a residual compensation method. The multipath interleaving pipelined noise shaping analog-to-digital converter comprises a first-stage analog-to-digital converter and a second-stage analog-to-digital converter. The first-stage analog-to-digital converter comprises a four-channel time-interleaved analog-to- The first-stage analog-to-digital conversion is used for acquiring an analog signal, sampling and converting the acquired analog signal, generating a residual error and amplifying the residual error; and the second-stage analog-to-digital conversion is used for acquiring the residual error processed by the first-stage analog-to-digital conversion, performing conversion, decoding and noise reduction on the residual error, and combining the residual error with the output result of the first-stage analog-to-digital conversion. The overall energy efficiency and the overall sampling rate of the analog-to-digital converter can be improved while high resolution is achieved, the noise requirement of a single-stage successive approximation type analog-to-digital converter comparator is lowered, and the problem that a successive approximation type analog-to-digital converter is low in conversion speed is solved.

The invention discloses a piecewise linear quantization mixed structure analog-to-digital converter with a noise shaping function, and belongs to the field of analog-to-digital converters, the analog-to-digital converter comprises an input control circuit, a nonlinear quantization circuit, a noise shaping modulation circuit, an output control circuit and a digital decimation filter circuit, the control circuit samples an input signal; the non-linear quantization circuit determines a non-linear section where an input signal is located and provides reference voltage for the noise shaping modulation circuit; the noise shaping modulation circuit is used for performing noise shaping and fine quantization on an input signal; the output control circuit combines the two parts of quantization output and generates a high-speed low bit code stream; the digital decimation filter circuit receives a high-speed code stream and generates a high-precision digital code through decimation filtering; according to the technology provided by the invention, suitable nonlinear quantization characteristics are provided according to different signal characteristics, and meanwhile, higher quantization precision and a wider dynamic range can be realized.

The invention provides an incremental analog-to-digital converter based on passive noise shaping and a signal processing method, which can be applied to the technical field of quantization. The incremental analog-to-digital converter comprises: an input integrating circuit configured to generate a (j-1) th low-order integrated voltage according to an input signal from a signal input end; generating a kth high-order integral voltage according to an input signal; the passive amplification circuit is configured to obtain a kth gain voltage according to the kth high-order integral voltage based on a predetermined amplification coefficient; the passive noise shaping circuit is configured to perform passive integration on the kth high-order integration voltage to obtain kth passive integration voltage, and perform passive gain on the kth passive integration voltage by using the kth gain voltage to obtain kth high-order gain voltage; a quantization circuit configured to quantize the M1 low-order integral voltages in M1 periods, respectively, to generate M1 coarse quantization values; m2 high-order gain voltages are quantized in M2 periods respectively, and M2 fine quantized values are generated.

The invention discloses a high-precision photon digital-to-analog conversion system based on noise shaping, which is characterized in that a mode-locked laser generates an optical pulse sequence, optical pulses enter a dispersive medium, and periodic pulses are processed by using a fractional order Talbot effect, so that the pulse repetition frequency is improved; the Delta-Sigma (Delta Sigma) modulation module processes a preset target signal and shifts noise to a high frequency band based on an oversampling technology and noise shaping to realize conversion from an analog signal to a digital signal; the pulse signal with the repetition frequency increased is input into the electro-optical modulation module to serve as a sampling source, and a digital signal generated by the delta-sigma modulation module is input into the electro-optical modulation module for intensity modulation, so that the optical pulse carries the characteristics of frequency change and noise shaping of the signal, and fusion from electric signal modulation to optical signal modulation is completed; inputting the pulse signal after electro-optical modulation into a photoelectric detector, and converting an optical signal into an electric pulse signal; the electric pulse signal enters a filtering module, noise in the electric signal is filtered out, and an analog signal is obtained.

A passive noise-shaping successive-approximation analog-to-digital converter (SAR ADC) includes a SAR ADC circuit and a passive noise-shaping circuit. The SAR ADC circuit performs conversion upon an analog input signal and extracts residue at an end of the conversion. The passive noise-shaping circuit processes the residue and feeds a processed residue back to the SAR ADC circuit. The passive noise-shaping circuit includes at least one passive element with tunable capacitance that is used to perform residue amplification.

An image compression device includes a discrete cosine transform (DCT) circuit, a quantization noise shaping (QNS) circuit, and an encoder circuit. The DCT circuit performs a DCT on original image data to generate first data. The QNS circuit performs QNS on block data in first data to determine, based on a first coefficient and a second coefficient of the block data, a QNS score of the first coefficient, and replace the first coefficient with the second coefficient when the QNS score is greater than zero so as to generate second data, wherein the second coefficient is obtained by decreasing an absolute value of the first coefficient. The encoder circuit encodes the second data to generate compressed image data.

The application provides a new hybrid nested noise shaping architecture suitable for noise shaping SAR ADC, which adopts a dynamic working closed-loop cascode FIA as a residual amplifier to reduce power consumption by eliminating the static current of the amplifier and removing the gain calibration circuit; the shaping architecture performs fourth-order noise shaping through the nested second-order CIFF and second-order EF noise shaping loops to achieve high precision in noise shaping at the same oversampling rate, and integrates the sampling noise cancellation (SNC) method to reduce the capacitance of the sampling capacitor to save chip area; the architecture adopts a closed-loop cascode FIA as a residual amplifier and CIFF and EF as noise shaping loops to solve the problem that the traditional noise shaping SAR ADC is difficult to simultaneously achieve high precision and low power consumption. In addition, the sampling KT / C noise cancellation (SNC) technology is integrated to reduce the capacitance of the sampling capacitor and save chip area.

The invention relates to the technical field of sequential control, and discloses a sequential logic control circuit for a noise shaping SAR ADC (Synthetic Aperture Radar Analog to Digital Converter), which comprises an analog signal acquisition circuit for receiving and preprocessing an initial input signal; the noise shaping circuit is used for performing frequency spectrum shaping on quantization noise in the analog signal and generating the analog signal subjected to noise shaping; the successive approximation type analog-to-digital converter is used for performing bit-by-bit comparison with the analog signal subjected to noise shaping and gradually completing conversion from the analog signal to the digital signal from the highest bit to the lowest bit; and the clock control circuit is used for coordinating sequential logic among the analog signal acquisition circuit, the noise shaping circuit and the successive approximation type analog-to-digital converter. According to the method, frequency spectrum remodeling is carried out on the quantization noise in the signal, the signal-to-noise ratio of the signal is remarkably improved on the premise that the hardware complexity is not additionally increased, and then interference of the noise on follow-up analog-to-digital conversion is reduced.

The application discloses a bone conduction speech coding method, a coding and decoding method, a device, a medium and equipment, and belongs to the technical field of audio coding and decoding. The coding method comprises the following steps: updating a bandwidth detection parameter table in advance; updating a time domain noise shaping coding coefficient table in advance; in an LC3 audio coding process, the bone conduction speech is coded by using the updated bandwidth detection parameter table and the updated time domain noise shaping coding coefficient table, and a noise level estimation process of the bone conduction speech is performed on a bone conduction speech frequency band, so that the coding of the bone conduction speech is completed. The bandwidth detection parameter table and the time domain noise shaping coding coefficient table in the LC3 encoder are updated, so that when the LC3 encoder codes the bone conduction speech, the low-frequency part of the bone conduction speech can be recognized and corresponding coding processing can be performed, the coding of the bone conduction speech is realized, and the application range of the LC3 audio coding and decoding device is widened.

The present application relates to aerospace, geological exploration and micro-light detection fields, and particularly relates to a reconfigurable noise shaping successive approximation register analog-to-digital converter, which comprises a sampling unit, a capacitive digital-to-analog converter array, a comparison unit, a passive noise shaping feedback unit, a successive approximation control unit, an output unit and a mode control unit. The sampling unit samples and holds an input signal, and the capacitive digital-to-analog converter array outputs to the comparison unit. The comparison unit compares its output with a common-mode reference voltage, and the result is sent to the successive approximation control unit. In the noise shaping mode, the successive approximation control unit additionally generates an integral clock timing to activate the passive feedback unit, samples a residual voltage and feeds back to the digital-to-analog converter array. The output unit drives the conversion result to a lower circuit. The present application also contains a method. The present application can effectively suppress the capacitive parasitic effect and low-frequency noise, realize flexible switching between high-speed conventional mode and high-resolution noise shaping mode, and significantly improve the system performance.

The invention discloses a hybrid level crossing analog-to-digital converter circuit integrating a successive approximation type analog-to-digital converter and an event-driven analog-to-digital converter. The circuit is composed of a level cross analog-to-digital conversion module LC ADC, a logic module LOGIC and a noise shaping successive approximation analog-to-digital converter module NSSAR ADC. The architecture effectively integrates the advantages of two converters, and has the characteristic of ultra-low power consumption of a level crossing analog-to-digital converter while keeping the high precision characteristic of a successive approximation type analog-to-digital converter. The level crossing analog-to-digital conversion module LC ADC does not participate in quantization of input signals and is only used as a pre-detection circuit of level crossing, and the noise shaping successive approximation analog-to-digital conversion module NSSAR ADC is used for completing signal processing actions such as comparison, quantization and output, so that the precision of the output signals is not restricted by the level crossing analog-to-digital conversion module LC ADC. The hybrid architecture can meet the requirements of low-power-consumption and high-precision acquisition of signals of the modern mobile Internet of Things.

The invention provides a weak signal noise shaping accumulation detection system and method, and the system comprises a noise generator which is used for generating noise with a set amplitude; the first input end of the summator is used for receiving a weak signal to be detected, the second input end of the summator is connected with the noise generator, and the summator is used for superposing the weak signal and the noise to obtain a synthetic signal; the input end of the analog-to-digital converter is connected with the output end of the summator, and the analog-to-digital converter is used for converting the synthesized signal into a digital signal; the input end of the signal accumulation and detection module is connected with the output end of the analog-to-digital converter, and the signal accumulation and detection module is used for sampling and accumulating the digital signals for multiple times so as to extract information of weak signals. According to the monitoring system provided by the invention, the detection of weak signals lower than the ADC quantization threshold is realized by superposing the noise reservation information, and the structure is simple and clear and easy to realize.

The invention provides an energy storage prediction method, system and device, and relates to the technical field of electric energy storage, and the energy storage prediction method comprises the steps: obtaining a bus voltage signal in a current time period through a common connection point of a microgrid, and extracting a quantum phase perturbation sequence from the bus voltage signal; identifying and separating a secondary modulation component of the bus by using an adaptive noise shaping algorithm; performing unsupervised clustering on the secondary modulation components by adopting a density peak clustering algorithm to obtain a plurality of aging mode clusters, and extracting statistical characteristics of the aging mode clusters; obtaining an initial residual energy evaluation value through the variable coefficient regression sub-model; carrying out ampere-hour integration on the instantaneous value sequence, determining an estimated covariance of a statistical mean channel, and obtaining an estimated covariance of a Kalman filtering channel through Kalman filtering prediction correction circulation; and finally, according to the estimation covariance of the two channels, carrying out weighted fusion on the initial residual energy evaluation value to obtain a final energy evaluation value. According to the invention, the prediction adaptability and stability are improved.

A noise-shaping successive-approximation register (SAR) analog-to-digital converter (ADC) (SAR ADC) including a noise-shaping (NS) filter, a comparator, a differential input path between the NS filter and the comparator, and a cross-coupled set of capacitive elements coupled to the differential input path.

The application provides an energy storage prediction method, system and device, and relates to the technical field of electric energy storage.The energy storage prediction method comprises the following steps: obtaining a bus voltage signal in a current time period through a public connection point of a microgrid, and extracting a quantum phase perturbation sequence therefrom; identifying and separating a secondary modulation component of the bus by using an adaptive noise shaping algorithm; performing unsupervised clustering on the secondary modulation component by using a density peak clustering algorithm, obtaining a plurality of aging mode clusters, and extracting statistical features thereof; obtaining an initial residual energy evaluation value by using a variable coefficient regression submodel; performing ampere-hour integration on an instantaneous value sequence, determining an estimated covariance of a statistical mean channel, and obtaining an estimated covariance of a Kalman filtering channel through a Kalman filtering prediction correction cycle; and finally, weighting and fusing the initial residual energy evaluation value according to the estimated covariances of the two channels to obtain a final energy evaluation value.The application improves the adaptability and stability of the prediction.

The invention discloses a noise shaping SAR ADC (Synthetic Aperture Radar Analog to Digital Converter) circuit structure based on error feedback, which relates to the technical field of integrated circuit design and comprises a time sequence control circuit used for generating and coordinating clock signals and control time sequences required by all modules; the analog signal input end is used for receiving an analog signal to be converted and is coupled to the noise shaping SAR ADC module; the noise shaping SAR ADC module is used for carrying out successive approximation type analog-to-digital conversion on the held sampling signal, outputting a digital code, integrating a noise shaping function and extracting a quantization error signal; the error feedback circuit is used for carrying out integration and gain adjustment processing on the quantization error signal and carrying out feedback superposition on the processed error feedback signal; and the digital output end is used for outputting a final digital signal after noise shaping and low-pass filtering. According to the invention, high-precision conversion is realized while the advantages of simplicity and low power consumption of the SAR ADC are maintained, and the applicability of the SAR ADC in high-end application is widened.

In accordance with an embodiment, a noise shaping successive approximation analog-to-digital converter (ADC) includes: a digital-to-analog converter (DAC); a multi-input comparator with a first input coupled to the DAC; a multi-input amplifier having a first input coupled to the DAC, and a second input coupled to a second input of the multi-input comparator; and a first delay element having an input coupled to an output of the multi-input amplifier and an output coupled to the second input of the multi-input amplifier and to the second input of the multi-input comparator.

The invention provides a second-order noise shaping SAR ADC circuit and electronic equipment, and the circuit comprises a sampling and quantification module which is used for completing the sampling and quantification of an input signal of an nth conversion period when being controlled by a time sequence, and outputting a digital code and a residual signal; the integral amplifier is connected with the sampling quantization module and is used for accessing the residual signal under the control of a first time sequence signal, integrating the residual signal and storing an integration result in a group of feedback capacitors of the integral amplifier; and the integral amplifier is also used for accessing the voltage stored on the group of feedback capacitors under the control of a second time sequence signal so as to carry out secondary integration, and the output end of the integral amplifier is connected to the input coupling node of the sampling quantization module so as to provide correction voltage participating in the quantization process of the (n + 1) th conversion period. According to the invention, high energy efficiency and high-order noise shaping capability can be considered at the same time.

A low-pass and band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC) device for sensor interface is disclosed. The device includes a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC and a second stage comprising a voltage-controlled oscillator (VCO)-ADC.

The present application discloses a speech filtering method, device, storage medium and equipment, which belongs to the field of speech coding and decoding technology. The method mainly includes: encoding the speech signal according to a standard Bluetooth encoder without a post-filtering module, and decoding the encoded speech signal to a transform domain noise shaping decoding module according to a standard decoder without a post-filtering module to obtain speech spectrum coefficients; inputting the speech spectrum coefficients into a pre-trained neural network model to obtain target spectrum coefficients corresponding to the speech spectrum coefficients; and according to the remaining decoding steps of the standard decoder without a post-filtering module, inputting the target spectrum coefficients into the low-latency improved inverse discrete cosine transform module of the standard decoder to obtain the target speech signal corresponding to the target spectrum coefficients. The present application omits the complex post-filtering operation in the Bluetooth encoding process, and only uses the pre-trained neural network model for filtering in the Bluetooth decoding process, so that it achieves a sound quality close to that of standard decoding.

Aspects and features of this disclosure include an RFID reader with an integrated noise-canceling RFID receiver. The receiver includes a baseband converter configured to receive an RFID signal and a cancelation signal. The baseband converter acts as a received signal mixer and also provides noise cancelation using the cancelation signal. A modulated feedback signal completes closed-loop signal path that automatically provides noise control, both noise shaping and noise filtering, improving the receiving performance by efficiently reducing or eliminating noise that would otherwise be produced by the transmitter of the RFID reader.