79 results about "Ramp generator" patented technology

A ramp driver includes a ramp generator for generating a reference ramp signal, and a ramp delayer for sequentially outputting ramp signals based on the reference ramp signal, and including delay blocks including k output terminals, k being an integer greater than or equal to 2, wherein the delay blocks include k delay circuits sequentially connected to each other, respectively connected to the output terminals, and configured to receive an input ramp signal from a previous one of the delay circuits, receive an input gate clock signal from a previous delay circuit, output an output ramp signal by delaying the input ramp signal, and output an output gate clock signal by inverting the input gate clock signal.

A controller includes a current-mode control device configured to determine a turn-on edge of a first gate-drive signal, an on-time timer that includes a first ramp generator having a first current source, a first capacitor, and a first ramp-generation switch, the first ramp generator configured to generate a first ramp signal, and a first logic circuit having an output coupled to a control terminal of the first ramp-generation switch, the first logic circuit configured to control the first ramp-generation switch based at least in part on the first gate-drive signal and on a feedback signal received from the current-mode control device, thereby resetting the first ramp signal, wherein the on-time timer is further configured to determine a turn-off edge of the first gate-drive signal by comparing the first ramp signal with a first threshold voltage that is proportional to an output voltage of the power converter.

Circuits are disclosed for controlling voltage regulators. In general, one aspect disclosed features an electric circuit comprising: a digital ramp generator configured to generate a digital voltage ramp; a digital low-pass filter having an input electrically coupled to an output of the digital ramp generator and configured to low-pass filter the digital voltage ramp; a digital-to-analog converter having an input electrically coupled to an output of the digital low-pass filter and configured to generate an analog control signal based on the filtered digital voltage ramp; and a voltage regulator having an input electrically coupled to an output of the digital-to-analog converter and configured to regulate an output voltage based on the analog control signal and an input voltage of the voltage regulator.

This invention discloses a high-precision ramp generator and a two-step single-slope analog-to-digital converter. The ramp generator includes a bandgap reference source circuit, a voltage-to-current conversion circuit, a weighted current DAC current source array, a charge / discharge current regulation circuit, a mode switching circuit, and a bias circuit. In this invention, the quantization process of the ramp generator is decomposed into two stages: coarse quantization and fine quantization, significantly reducing quantization time. Furthermore, a single output stage can combine a DAC-type ramp generator and a capacitor-integrating ramp generator, saving area and power consumption in chip design, improving the compatibility of the ramp generator, solving the linearity and stability problems introduced by stepped ramps in high-speed, high-precision applications, and reducing design complexity.

A ramp generator for generating a ramp signal from an image sensor is disclosed. The ramp generator includes a bias voltage generator configured to generate a bias voltage, and a plurality of ramp cells configured to generate a ramp signal based on the bias voltage. Each of the plurality of ramp cells includes a local sampling circuit configured to adjust a sampling timing point of the bias voltage.

This invention provides a circuit and method for sampling and transmitting telemetry data from a cochlear implant, belonging to the field of telemetry technology for cochlear implants. The method amplifies the analog signal under test using a programmable gain amplifier, converts the signal into a pulse width signal using a voltage ramp generator and comparator, and then generates a short-duration step signal on the coil via an output driver to form a ringing pattern. An external device detects the interval between the step signals to reconstruct the signal magnitude. This invention eliminates the need for an analog-to-digital converter, significantly reducing power consumption and chip area, and improving data transmission efficiency. It is suitable for telemetry systems in various implantable medical devices such as cochlear implants. This invention significantly reduces the power consumption and layout area of ​​the implanted chip and shortens the single data transmission time to 48μs, improving efficiency by approximately 10 times, making it suitable for low-power implantable devices such as cochlear implants.

An image sensing device capable of operating in various modes is disclosed. The image sensing device includes a pixel array configured to generate a pixel signal; a first ramp generator configured to generate a first ramp signal; a second ramp generator configured to generate a second ramp signal; an analog-to-digital converter (ADC) circuit including a comparator configured to compare the pixel signal with one of the first ramp signal and the second ramp signal, and to generate image data based on a result of the comparison; and a processor configured to control the ADC circuit to input the first ramp signal to the comparator in a first mode and to input the second ramp signal to the comparator in a second mode.

An image sensor including: a pixel array including first to N-th pixel circuits to generate first to N-th pixel signals; an ADC connected to the pixel circuits; a system clock generator to generate a system clock signal; an internal clock generator to generate first to N-th clock signals and (N+1)-th to 2N-th clock signals based on the system clock signal; a ramp generator to generate first to N-th ramp signals based on the first to N-th clock signals; and a counter clock generator to generate first to N-th counter clock signals based on the (N+1)-th to 2N-th clock signals, the ADC includes: a comparator to generate first to N-th comparison signals based on comparison operations of the first to N-th pixel signals and the first to N-th ramp signals; and a counter to generate first to N-th digital signals based on the comparison signals and the counter clock signals.

An imaging system comprises a pixel array configured to generate a plurality of image charge voltage signals in response to incident light, and readout circuitry coupled to the pixel array, the readout circuitry including a plurality of column unit cells. Each column unit cell comprises at least one of a plurality of comparators, wherein each comparator is coupled to receive the ramp signal from the ramp generator through a ramp signal line. Each column unit cell also comprises a compensation current unit coupled to the ramp signal line, each compensation current unit comprising a compensation current source and a compensation current switch coupled to the compensation current source, wherein the compensation current source and the compensation current switch are coupled between a first node on the ramp signal line and a second node.

An image sensing apparatus includes: a pixel array including a plurality of pixels connected to a plurality of row lines and a plurality of column lines, and configured to output a plurality of pixel signals through the plurality of column lines; a ramp generator configured to generate a first ramp signal and a second ramp signal; an analog-to-digital converter (ADC) configured to convert the plurality of pixel signals into digital signals in response to the first ramp signal and the second ramp signal; and a column line controller configured to selectively connect the plurality of column lines to the ADC.

An imaging system comprises a pixel array and readout circuitry coupled to the pixel array. The readout circuitry includes a ramp generator and a plurality of column unit cells, each comprising a column ramp buffer and a column comparator, and each column ramp buffer comprising an input node coupled to receive a ramp signal from the ramp generator, a transistor having a gate terminal coupled to the input node and a drain terminal coupled to a power line, an output node coupled between a source terminal of the transistor and the column comparator, and an alternating current (AC) coupling unit coupled between the input node and the transistor. The AC coupling unit comprises a capacitor coupled between the input node and the gate terminal of the transistor, and a reset switch coupled between the input node and the gate terminal of the transistor.

To provide an image sensing device which operates in a plurality of modes.SOLUTION: The image sensing device includes a pixel array configured to generate a pixel signal, a first rampgenerator configured to generate a first ramp signal, a second rampgenerator configured to generate a second ramp signal, and an analog-to-digital converter (ADC) circuit including a comparator configured to compare the pixel signal with one of the first ramp signal and the second ramp signal and configured to generate image data based on a result of the comparison. And a processor configured to control the ADC circuit.SELECTED DRAWING: Figure 1

A voltage ramp generator includes unit cells (331) electrically connected in parallel. Each unit cell switches between an on-state and an off-state in response to a cell-specific select signal (S1-Sn). A current mirror circuit (350) copies a reference current controlled by the unit cells at a predefined current ratio into a first detector current flowing in a first detection branch. An error detection circuit (390) generates an active first error signal (ERR) if the first detector current falls below a lower threshold current or exceeds an upper threshold current.

An electric machine controller arranged to direct a power converter to cause a pulsed operation of an electric machine in selected operational ranges to deliver a desired output and to cause a continuous operation of the electric machine in selected operational ranges is provided. A ramp generator is adapted to provide a ramping between the pulsed operation and the continuous operation. In some embodiments, the ramp generator utilizes a quadratic, cubic or higher order ramping function. In some embodiments, during a first portion of the transitional period, the ramp generator causes pulsing between a first ramped transitional torque level and a second ramped transitional torque level that is lower than the first transitional torque level, and during a second portion of the transitional period, the ramp generator causes the electric machine to generate substantially zero torque in intervals between transitional pulses while ramping the first ramped transitional torque level.

An image sensor includes a pixel array including pixels arranged in first and directions, samplers connected to the pixels through column lines extending in the first direction, and a ramp generator including first and second ramp generators output first and second ramp voltages. The column lines include first and second column lines adjacent to each other in the second direction. The samplers include first and second samplers disposed adjacently in the first direction. In a first mode, the first and second samplers are electrically connected to the first ramp generator and electrically separated from the second ramp generator. In a second mode, the first sampler is electrically connected to the first ramp generator among the first ramp generator and the second ramp generator, and the second sampler is electrically connected to the second ramp generator among the first ramp generator and the second ramp generator.

To reduce sub-harmonic oscillations in a Switched-Mode Power Supply (SMPS). a ramp generator circuit of the SMPS produces a ramp signal having an amplitude corresponding to a sensed current through an energy storage device, such as an inductor, of the SMPS. The ramp signal is used to control a duty cycle of the SMPS. The ramp generator circuit may include a reference current circuit, a ramp capacitor, and a discharge circuit to periodically discharge the ramp capacitor. The ramp capacitor may be charged using a charging current produced by combining a feedback current corresponding to the sensed current with a reference current produced by the reference current circuit and may be periodically discharged at a fixed frequency, or may be charged using the reference current and discharged at a time determined according to the feedback current.

A voltage ramp generator for a solid-state imaging device includes an accumulator resistor. Unit cells switch between an on-state and an off-state in response to cell-specific select signals, wherein in the on- state each unit cell supplies an integer multiple of a unit current through the accumulator resistor, and wherein the unit current depends on an initial voltage. A first detection cell supplies a first detector current depending on the initial voltage. An error signal circuit outputs an active error signal when in a conversion period the first detector current falls below the unit current by more than a lower threshold current or exceeds the unit current by more than an upper threshold current.

The invention relates to an image sensor and a method for reading out an image sensor. The image sensor includes a pixel array, a ramp generator, a gain circuit, a comparator, a digital counter, and a controller. The ramp generator is configured to generate a ramp signal. The gain circuit is configured to apply a first gain to the ramp signal when a pixel is reset, and to apply a selected gain to the ramp signal when the pixel is read out. The comparator is configured to compare a pixel output when the pixel is reset with the ramp signal. The comparator is further configured to compare the pixel output when the pixel is read out with the ramp signal. The digital counter is also configured to determine a digital signal value based on the output of the comparator. The controller is configured to determine a pixel value of the pixel based on the digital signal value.

The invention discloses a rail-to-rail operational amplifier architecture, a ramp generator and a ramp analog-to-digital converter system, and belongs to the technical field of integrated circuits. The rail-to-rail operational amplifier architecture comprises a first-stage operational amplifier structure, a control switch and a second-stage operational amplifier structure, the first-stage operational amplifier structure comprises a high-input common-mode voltage operational amplifier, a first control switch, a low-input common-mode voltage operational amplifier and a second control switch; the high-input common-mode voltage operational amplifier and the low-input common-mode voltage operational amplifier are respectively connected with the second-stage operational amplifier, the power supply end and the grounding end through a first control switch and a second control switch; when the common-mode input voltage range is above and below VDD / 2, the second-stage operational amplifier structure forms a second-stage operational amplifier circuit with the high-input common-mode voltage operational amplifier and the low-input common-mode voltage operational amplifier respectively; the first-stage operational amplifier structure provides gain, and the second-stage operational amplifier structure realizes rail-to-rail output. Good PVT robustness and lower power consumption are achieved, and the fluctuation degree of the output offset voltage along with the change of the common-mode input voltage is smaller.

The application discloses a comparator, an image sensor readout circuit and a readout method, the comparator is used for receiving a ramp signal from a ramp generator and receiving an output signal from a dual conversion gain pixel circuit, the comparator comprises a first differential input pair tube and a second differential input pair tube in parallel, the comparator receives the ramp signal and a low conversion gain reset signal or a low conversion gain pixel signal through the first differential input pair tube to output a comparison signal, and the comparator receives the ramp signal and a high conversion gain pixel signal or a high conversion gain reset signal through the second differential input pair tube to output a comparison signal. The application realizes frame rate doubling under the condition that the number of comparators used in the image sensor is unchanged.

A readout analog-to-digital converter (ADC) circuit system converts analog image signals received by bit lines into digital signals through an ADC comparator and presets a presettable ramp driver and an image sensing system using the same. The ADC comparator compares the image signal voltage at the first input with the ramp voltage at the second input to trigger the latch and cause the ADC to output a digital signal. A pixel voltage is coupled to one comparator at a first input of the one comparator only through a sampling capacitor. The ramp generator generates a global ramp voltage as an input to the plurality of presettable ramp drivers. A ramp driver may be preset to output a buffered ramp voltage to simultaneously drive the plurality of ADC comparators at a second input of the plurality of ADC comparators. A model circuit of the presettable ramp driver presents a corresponding program that presets the presettable ramp driver to show how to adjust the characterized presettable ramp driver to drive a plurality of ADC comparators of the ADC.

The invention provides an image sensor, an analog-to-digital conversion method thereof and electronic equipment, and belongs to the technical field of electronic circuits. The image sensor at least comprises a pixel array, wherein an effective pixel region outputs an effective pixel voltage; the dark current offset voltage acquisition module is used for acquiring simulated dark current offset voltage formed by dark current; the ramp generator is used for generating an original ramp voltage, the output end of the ramp generator is electrically connected to the output end of the dark current offset voltage acquisition module, and the analog dark current offset voltage is superposed to the original ramp voltage to form an additional ramp voltage; one end of the comparator inputs the effective pixel voltage, the other end of the comparator inputs the additional ramp voltage generated by the output end of the ramp generator, and the comparator compares the effective pixel voltage with the additional ramp voltage; and the counter is used for counting the effective pixel voltages to obtain quantized effective pixel voltages. According to the image sensor provided by the invention, the time required for pixel voltage quantification can be saved.

A ramp drive is disclosed. The ramp driver comprises: a ramp generator for generating a reference ramp signal and comprising a resistor string, the resistor string comprising: a first end for receiving a high ramp voltage; the second end is used for receiving the low-ramp voltage; and a ramp retarder for sequentially outputting the reference ramp signal. The ramp generator is configured to: divide a difference between a high ramp voltage and a low ramp voltage into first to k-th voltages by using a resistor string; and sequentially outputting the first to kth voltages to generate a reference ramp signal, where k is a positive integer.

A system includes an inverter configured to convert DC power from a battery to AC power, wherein the inverter includes: a duty cycle adjustor including: a rising edge detector to detect a rising edge of a periodic signal; a ramp generator connected to the rising edge detector; a first comparator connected to the ramp generator; a duty cycle trimmer connected to the first comparator; and a bidirectional current trimmer connected to the duty cycle trimmer and the ramp generator.

Image sensors and methods for reading out image sensors. The image sensor includes a pixel array, a ramp generator, a gain circuit, a comparator, a digital counter, and a controller. The ramp generator is configured to generate a ramp signal. The gain circuit is configured to apply a first gain to the ramp signal when a pixel is reset and a selected gain to the ramp signal when the pixel is read out. The comparator is configured to compare a pixel output when the pixel is reset to the ramp signal. The comparator is also configured to compare the pixel output when the pixel is read out to the ramp signal. The digital counter is also configured to determine a digital signal value based on the outputs of the comparator. The controller is configured to determine a pixel value for the pixel based on the digital signal value.

An image sensor device may include an image pixel configured to generate a pixel signal based on a light, a ramp generator including a ramp source circuit configured to generate a raw ramp signal, a driving source circuit configured to generate a driving source signal, and a bandwidth control circuit configured to generate a driving signal by adjusting a bandwidth of the driving source signal, and a ramp buffering circuit configured to generate a ramp signal corresponding to the raw ramp signal based on the driving signal, a comparative amplifier configured to generate a comparison output signal based on the pixel signal and the ramp signal, and an analog-to-digital conversion circuit generating a digital signal corresponding to the light based on the comparison output signal.

The present application relates to the technical field of power plant production process automation, and discloses a coal mill air distribution warm grinding control method and device, electronic equipment and a storage medium. The method comprises the following steps: in the automatic mode, in response to the mill closing signal, the inlet cold air volume of the mill is increased by using a slope generator, and the outlet temperature of the mill is adjusted by a first PID regulator; when the inlet air volume is greater than or equal to a first air volume threshold, the inlet air volume and the outlet temperature are adjusted by the first PID regulator and a second PID regulator in a push-pull balance mode; when the inlet air volume is greater than or equal to a second air volume threshold and the outlet temperature is greater than or equal to a temperature threshold, the outlet temperature of the mill is adjusted by using a third PID regulator to schedule cold air, and the inlet air volume of the mill is adjusted by using a fourth PID regulator to schedule hot air. The present application realizes full-automatic control from the start to the normal operation of the coal layer burner, and eliminates the hidden danger of "misoperation" that may occur in the complex operation process by manual operation.

In some examples, an apparatus includes a constant amplitude ramp generator having a differential output and first and second generator inputs, in which the first generator input is coupled to a power terminal. The apparatus also includes an input voltage feed-forward circuit having a feed-forward input and a feed-forward output, in which the feed-forward input is coupled to an input voltage terminal, and the feed-forward output is coupled to the second generator input.

A circuit includes a first capacitance array formed by n nominally equal capacitive elements. A first electrode of each capacitive element is coupled, via respective switches to either a reference voltage or ground. A differential amplifier has a first input coupled to an output of a first capacitance array, a second input grounded, and an output generating a voltage ramp. A capacitive feedback circuit couples the output of the differential amplifier to the first input. A second capacitance array has an output coupled to the first input of the differential amplifier. The capacitive elements of the first capacitance array are organized in sets. The circuit operates by controllably coupling, set by set, second electrodes of the capacitive elements of the first capacitance array to the first input of the differential amplifier.

Provided are an artificial neural network apparatus and a method for operating the same. The artificial neural network apparatus may include: a synaptic device; an integrator operatively connected to the synaptic device and integrating a current generated based on that an input pulse voltage is applied to the synaptic device into a voltage, and outputting a first voltage; a ramp generator operatively connected to the integrator and generating a ramp signal based on the first voltage and a second voltage output from a digital-analog converter; and an output circuit operatively connected to the ramp generator and storing an output of the ramp generator and transmitting the output to the outside.