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1940 results about "Peak detection" patented technology

Reducing the effects of noise in non-volatile memories through multiple reads

Storage elements are read multiple times and the results are accumulated and averaged for each storage element to reduce the effects of noise or other transients in the storage elements and associated circuits that may adversely affect the quality of the read. Several techniques may be employed, including: A full read and transfer of the data from the storage device to the controller device for each iteration, with averaging performed by the controller; a full read of the data for each iteration, with the averaging performed by the storage device, and no transfer to the controller until the final results are obtained; one full read followed by a number of faster re-reads exploiting the already established state information to avoid a full read, followed by an intelligent algorithm to guide the state at which the storage element is sensed. These techniques may be used as the normal mode of operation, or invoked upon exception condition, depending on the system characteristics. A similar form of signal averaging may be employed during the verify phase of programming. An embodiment of this technique would use a peak-detection scheme. In this scenario, several verify checks are performed at the state prior to deciding if the storage element has reached the target state. If some predetermined portion of the verifies fail, the storage element receives additional programming. These techniques allow the system to store more states per storage element in the presence of various sources of noise.
Owner:SANDISK TECH LLC

Asynchronous servo RRO detection employing interpolation

A repeatable read-out (RRO) detector employs one or more digital interpolators to interpolate asynchronous sample values that represent RRO data. The asynchronous sample values are read from a recording medium and generated by an A/D converter at a symbol rate, and the interpolators generate interpolated samples at at least one time in between the asynchronous sample value times. Each interpolated sample corresponding to some phase relative to that of the sample values generated by the A/D converter. The RRO detector receives 1) the asynchronous samples at symbol rate and 2) the interpolated samples to efficiently detect the encoded RRO data. An RRO address mark indicates when detection of encoded RRO data starts, and is employed to select those samples suitable for RRO data detection. Detection of the RRO address mark employs peak detection among filtered asynchronous and interpolated samples. The process of peak detection adjusts the current best phase for sample selection. When the RRO address mark is found, the corresponding best phase corresponds to either asynchronous sampled values or interpolated samples that are subsequently selected for RRO data detection, termed best samples. Once the best phase is selected, the RRO data detector uses that information along with RRO encoding constraints to decode the encoded RRO data from the best samples.
Owner:AVAGO TECH INT SALES PTE LTD

Equalizer circuit, communication system, and method that is adaptive to varying launch amplitudes for reducing receiver error

A transmission line equalizer, communication system, and method are provided for adaptively compensating for changes in transmission path length and transmission path medium. Within the equalizer is a filter that exhibits a high pass characteristic and, more specifically, has an inverse frequency response to that of the transmission path. The inverse filter can include a pair of amplifier stages coupled in parallel, with a mixer chosen to adaptively select portions of one stage over than of the other. The dual stage inverse filter can, therefore, adapt to greater transmission path lengths and/or attenuation. A feedback architecture is used to set the inverse filter response by measuring the amplitude of a communication signal output from the inverse filter during periods of low frequency. A peak detector will capture a peak-to-peak voltage value during those periods, and adjust the output of the slicer to match a launch amplitude of the communication signal. The peak detector within the feedback architecture helps ensure the predicted amplitude matches the launch amplitude to minimize over-compensation or under-compensation even though a different integrator might register no difference in integrated voltage or energy at the output of the inverse filter compared to the output of the slicer.
Owner:RPX CORP
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