122results about How to "Reduce speed requirements" patented technology

Pulse-echo imaging systems and methods are provided, including a transmit code sequencer and a pulse generation circuit, The transmit code sequencer is configured to input a transmit code sequence to the pulse generation circuit. A transducer is configured to receive electrical signals provided as pulses using coded excitation according to the transmit code sequence, and to transduce the electrical signals to pulses of energy other than electrical signals. The transducer is further configured to receive echoes of the pulses of energy other than electrical signals and convert the echoes to received electrical signals generate using coded excitation. A receive circuit is configured to receive the received electrical signals generate using coded excitation, perform analog sampling of the received electrical signals generate using coded excitation, and provide a weighted, summed digital signal by processing the analog samples. At least one example of a pulse imaging system described is configured for ultrasonic pulse-echoes. At least one example of a pulse imaging system described is a medical diagnostic imaging system.

The invention discloses a burst mode optical signal power measuring circuit which comprises a photoelectric detector power supply, a mirror image current source and a subsequent circuit. The subsequent circuit is divided into a signal passage part and an optical power burst detecting part by the mirror image current source, wherein, in the signal passage part, optical current generates a burst detection signal by the photoelectric detector via a trans-impedence amplifier and a burst detection circuit, and the burst detection signal is used for triggering a time sequence generation circuit to generate a control time sequence for maintaining sampling and carrying out digital-to-analog conversion; in the optical power burst detection part, an amplifying circuit converts the mirror image current into a voltage signal; therefore, a sampling maintaining circuit and a digital-to-analog conversion circuit which are connected with the time sequence generation circuit can finish the burst detection of optical power under the control of the control time sequence. The burst mode optical signal power measuring circuit generates the mirror image current forming a proportion with the average optical current of the photoelectric detector by the mirror image current source, realizes the detection to the burst mode optical power under the control of the control time sequence, and can measure burst optical signal power with the length of hundreds of nanoseconds.

The invention relates to the field of digital-analog hybrid integrated circuit design, aims to increase the conversion rate of a monoclinic ADC and provides the analog-digital converter which is simple in structure and low in power consumption. According to the adopted technical scheme of a low-power consumption level multi-reference voltage monoclinic analog-digital conversion method and a converter, the converter is composed of a ramp generator, a counter, comparators, multiplexer switches and a register; the ramp generator generates a ramp voltage Vramp and k reference voltages VrefK, wherein K=1, 2, 3..., K; each of the k reference voltages VrefK is supplied to the corresponding comparator through one of the corresponding multiplexer switches; the ramp voltage Vramp is supplied to each comparator. The low-power consumption level multi-reference voltage monoclinic analog-digital conversion method and the converter are mainly applied to digital-analog hybrid integrated circuit design.

The invention discloses a high-resolution display method and system. The method comprises the steps that a high-resolution display panel is divided into a plurality of sub-regions, wherein each sub-region corresponds to a unique partition number; human eye images of viewers are collected; first positions where human eye pupils are located are recognized; second positions, corresponding to the first positions, on the high-resolution display panel are determined; the area, needing to be finely processed, on the high-resolution display panel is determined according to the second positions and the human eye focus radius R, and the corresponding partition numbers are output to serve as area parameters; selective stretching processing is performed on input first resolution ratio image signals according to the area parameters, and second resolution ratio image signals with the high resolution ratio are obtained and are displayed through the high-resolution display panel. The invention further discloses the high-resolution display system. Compared with the overall stretching technique in an existing display system, the high-resolution display method and system can obviously lower the requirements for image data processing speed and hardware, and is low in cost of high-definition display.

In a particular embodiment, a digital circuit includes a frequency detection circuit operative to compare information related to transitions between sequential samples of a received signal. The frequency detection circuit is further operative to generate a control signal to reduce a sampling rate of the received signal in response to a predetermined number of the sequential samples having a same value. The digital circuit also includes a digital phase detector operative to provide the information related to the transitions between sequential samples to the frequency detection circuit.

A modulation method for optical communication comprises the step of generating an optical signal modulated between a plurality of different states of polarization and between different phase states. The plurality of states of polarization comprises first states of polarization (SOP1-4). The first states of polarization (SOP1-4) define a single great circle (10) on the Poincare sphere. The method is characterized in that the plurality of states of polarization further comprise one or more second states of polarization (SOP5-6) located outside the great circle (10). Such additional second statesof polarization increase the symbol alphabet.

The invention discloses a signal feedback loop and a method for predistorter, and power amplification equipment. The signal feedback loop comprises: a down converter for converting feedback signals downward into baseband signals or intermediate frequency signals, a first filer for filtering the baseband signals or the intermediate frequency signals to preliminarily inhibit main band signals among the signals, thereby outputting first filtering signals, an analog-to-digital converter for converting first filtering signals into digital signals from analog signals, a second filer for filtering digital signals to further inhibit the main band signals among the signals, thereby outputting second filtering signals, a power calculator for calculating the out-of-band power of the feedback signals according to the second filtering signals; and a coefficient updating controller for updating the coefficient of the predistorter according to the out-of-band power. With the technology scheme of the invention, the dynamic scope requirement of analog-to-digital conversion and the complexity of simulation circuits can be reduced by shifting part of the simulation loop complexity to digital field and utilizing two-level filtering structure.

The invention discloses a data acquisition serial-parallel conversion storage device and method for ensuring the effective storage of data. The data acquisition serial-parallel conversion storage device comprises a serial shift register, a first parallel shift register, a second parallel shift register, a phase locked loop (PLL) circuit, a frequency dividing circuit and a counting circuit, wherein the serial shift register, the first parallel shift register and the second parallel shift register are sequentially connected; the phase locked loop (PLL) circuit is connected with the serial shift register; the frequency dividing circuit is respectively connected with the first parallel shift register and the second parallel shift register; the counting circuit is connected with the first parallel shift register; the serial shift register receives an output signal of a receiver; the second parallel shift register is connected with a logical circuit; and the phase locked loop (PLL) circuit is respectively connected with the counting circuit and the frequency dividing circuit.

The invention discloses a staggered driving PWM compensating current generator and a control method thereof. Two inversion bridges are connected in parallel to operate and respectively output compensating current through an inductor, effective components of the compensating current, which correspond to command signals are same, the two inversion bridges are overlapped after being connected in parallel and output twice the total current of the signal inversion bridge, carrier frequency ripple current components generated by PWM modulation in the compensating current output by the two inversion bridges through the inductor are approximately reverse in a constant amplitude and can be mutually cancelled out, thus the ripple component in total output current is obviously reduced. The staggered driving PWM compensating current generator can use the lower carrier frequency and the smaller output inductor to obtain the output ripple current which is obviously reduced compared with the output ripple current in the prior technical method; in addition, the effective value of the ripple current in a DC loop is reduced to about 46 percent of the effective value of the ripple current in the prior technical method, thus the indexes including the current tracking speed, the output ripple current, the wastage, the efficiency, the cost, and the like of the PWM compensating current generator can be synthetically improved.

The invention provides a multi-input large-area writing method, a multi-input large-area writing device and a multi-input large-area writing system. The method comprises the following steps that: a handwriting input detection device detects whether a light spot enters a plane monitoring area or not; when detecting that the light spot enters the plane monitoring area, the handwriting input detection device sends trigger information to a receiver; the receiver acquires the motion trace data sensed by a luminous device generating the light spot, wherein the motion trace data is sensed by a motion sensing unit in the luminous device; and a control host computer acquires or erases the handwriting information according to the motion trace data acquired by the receiver. The method, the device and the system can remarkably reduce the requirements on the precision and speed of an independently used CMOS sensor, lower the cost, improve the accuracy and speed of inputting and erasing the handwriting information and greatly improve the cost and performance while ensuring that multiple electronic light pens and electronic erasers are used at the same time.

The present invention provides a co-time co-frequency full duplex communication method and device based on intermediate-frequency domain self-interference suppression. According to the method,transmitting and receiving operations are performed simultaneously, wherein the transmitting operation includes: amplifying an intermediate-frequency signal and then mixing same with a local oscillation signal, to obtain an up-converted signal, and transmitting same through an antenna; and the receiving operation includes: receiving an aerial signal through the antenna, and mixing same with the local oscillation signal, to obtain a down-converted signal; mixing an inversion signal of the intermediate-frequency signal with the local oscillation signal, and performing impedance matching with the antenna, to generate an inversion signal of a self-interference signal; and performing weighted summation on the self-interference signal formed by the up-converted signal and the down-converted signal and the inversion signal thereof and amplifying same, and suppressing the self-interference signal, to obtain an amplified aerial signal. The method and device of the present invention can improve the system integration level, reduce power consumption, and implement co-time co-frequency full duplex communication, thereby meeting requirements of improving spectrum effectiveness in the technical field of communications.

The invention discloses a laser pulse switch apparatus and a control method therefor. According to the laser pulse switch apparatus and the control method therefor, a first switch and a second switch are arranged behind a pockels cell and a multipass amplifier set respectively to form a two-switch single-shot system, a single pulse trigger signal is generated by inputting a laser synchronous signal into a delayer, and the first switch is controlled to be on once only, so that single-shot emission of laser pulses is realized; the first switch realizes that one laser pulse is quickly selected for passing, and the second switch takes effect of blocking light; the aperture and speed of the switch are realized by two switches respectively, so that the requirements on the aperture of the first quick switch and the speed of the second large-aperture switch are reduced; any change is not performed on a pump light path, so that the heat effect, the beam quality and the like of pump laser pulses are not changed and it is ensured that the quality of the whole laser device is not changed; and when a shooting range does not need the laser pulses subsequently, it can be ensured that the energy of the high-energy laser pulses in the multipass amplifier set is not accumulated for causing the problems of the heat effect and the like.

The invention relates to a laser three-dimensional compressed imaging technology, in particular to a three-dimensional compressed imaging method and device based on a phase position distance measurement principle, and belongs to the field of laser imaging and digital image processing. The recovery method of the phase position difference of echo of each point of a target surface is studied through a compressed sensing recovery algorithm, and therefore the purpose of three-dimensional imaging is achieved. The three-dimensional compressed imaging device based on the phase position distance measurement principle comprises a cosine signal generator, a semiconductor laser, a collimation and beam expanding module, an imaging optical system, a semi-reflective semi-transmittance lens, a digital micro mirror array, a focusing lens, an avalanche photodiode, a phase measurement module, a central processing module and a DMD driving module. The three-dimensional compressed imaging method and device based on the phase position distance measurement principle can further improve the distance measurement accuracy, and lower the requirement for the speed of an AD converter.

The invention discloses a space vector pulse width modulation (PMW) controller of a tri-level circuit and a control method thereof. The controller comprises a searching module and a computation module, wherein, the searching module is used for searching the right triangle area in which the space vector corresponding to given value is located in a space vector plane figure according to the phase angle of the space vector corresponding to the given value, and takes switch vectors corresponding to each vertex of the right triangle area as constants to establish a composite vector mathematical model of the space vector of the given value and the work time of each switch; and the computation module is used for inputting acquired voltage and current input to the composite vector mathematical model, computing the work time of each switch in the circuit, and outputting the work time to an execution unit (EU). In the invention, the control algorithm of space vector PMW is simplified, and the programming cost and the hardware cost are reduced.

The invention discloses a virtual reality control method and system. The method comprises the steps that a first game device transmits an ultrasonic wave; a second game device receives the ultrasonic wave and locates the position of the first game device through the ultrasonic wave; the second game device outputs the position to a virtual reality scene. By means of the virtual reality control method and system, the defects that in the prior art, for a mode that a three-dimensional imaging technology is utilized to achieve virtual reality, requirements of calculation on precision and speed are high, and the cost is high are overcome, the position of the first game device is located accurately through the ultrasonic wave, when a user holds or wears the first game device, the second game device can accurately capture control action of the user, the second game device applies the control action of the user to the virtual reality scene, and accurate control over the virtual reality scene is achieved. Meanwhile, compared with the three-dimensional imaging technology, the requirement of the calculation on the precision and the speed is lower, and the cost is lower.

The invention relates to multimedia network and the application thereof, on the basis of making fine and concrete analysis on video service demands, applying a truly original thinking mode to improve the existing multimedia network structure comprising network method, network structure and the application thereof, and putting forward that video services in multimedia can be separately processed, by method of delivery, control and communication of video media, according to different video service demands: decomposing or integrating multimedia by municipal-area network (MAN) convergence center switcher, i.e. distributing voice fax, data and video media broadcast TV in access network to the MAN; contrarily, integrating separate media of the MAN and sending them to the access network. And it is simple to process and has high efficiency, and further improves switcher performance. And it solves the problem that large-flow video service development is limited by network structural technique, network equipment technique and equipment capacity bottleneck.

The invention belongs to the technical field of communications, and particularly relates to a 25Gbps data clock restoring circuit based on the edge linearization technique. The circuit comprises a charge pump, a voltage-controlled oscillator, a loop filter, an injection locking frequency divider and a phase discriminator adopting edge linearization. A 12.5GHz differential clock is generated by the voltage-controlled oscillator, and an eight-phase 6.25GHz clock is generated through frequency division of the injection locking frequency divider and delay of an adjustable delay unit; the phase discriminator carries out oversampling on data through the eight-phase clock and controls the charge pump to generate a pulse current through synchronization and logical operation; after being filtered by the loop filter, the pulse current controls the control end of the voltage-controlled oscillator. By means of the 25Gbps data clock restoring circuit, four 6.25Gbps data and corresponding clocks can be generated through 25Gbps input data with low power consumption, and the requirement for good jitter performance and good locking features can be met as well.

The present invention discloses a space magnetic field intensity distributed synchronous detection device and method. The space magnetic field intensity distributed synchronous detection device comprises a magnet measurement node array installation panel, magnet measurement nodes and a control terminal. There are provided n rows and m columns of magnet measurement nodes arranged on the magnet measurement node array installation panel, each magnet measurement node is provided with an installation sampling holder. Control pins of all the installation sampling holders are connected with the control terminal through a control bus in such a manner to constitute a sensor array. The present invention further discloses a space magnetic field intensity distributed synchronous detection. The control terminal is configured to send a synchronous acquisition signal to all the magnet measurement nodes, the sampling holders on the magnet measurement nodes are located in the hold mode, and the control terminal is configured to acquire a magnetic field intensity of each node through a high speed roll poling method. According to the invention, the synchronous acquisition of space multi-node magnetic field intensities may be realized, the instantaneity is good and the splicing development is easy, etc. Moreover, the magnetic field detection resolution may be changed through the jump-point acquisition, and at the same time a lower sampling rate may be used for the detection of the high frequency magnetic field.

The invention provides a rocket recycling device and a liquid rocket. The rocket recycling device includes at least two support structures, an arresting cable, at least two guiding mechanisms, and atleast two buffering mechanisms. the two support structures are spaced apart from each other, and the two guiding mechanisms are respectively fixedly disposed on end portions of the two support structures; and the arresting cable is used for connecting the two support structures by the two guiding mechanisms, and portions of the arresting cable on both sides of the two guiding mechanisms are respectively connected to the two buffering mechanisms. The buffering mechanisms are used for applying a pre-tightening force to the arresting cable, and after a to-be-recycled rocket is in contact with thearresting cable, buffering of an acting force applied to the to-be-recycled rocket is achieved by cooperating with expansion and contraction of the arresting cable. The rocket recycling device and the rocket of the invention capture the to-be-recycled rocket by utilizing the arresting cable, so that posture and speed requirements of rocket recycling can be reduced, and the success rate of the rocket recycling is improved.

The invention relates to the field of analog integrated circuit design. In order to fully exert the advantages that a charge field achieves accumulation without generating noise, and a numeric field accumulation chip is small in area and free of accumulation upper limit and not raise the overhigh requirements on the transmission efficiency and the full well capacity which are generated during charge field accumulation and the ADC speed generated during numeric field accumulation, a charge-number mixed accumulation type CMOS-TDI image sensor characterized by being composed of a pixel array, a column parallel ADC array, a column parallel numeric field accumulation array, a shifting register and a time sequence control module, wherein the pixel array comprises L columns and N rows, N rows of pixels in the pixel array are divided into K pixel subarrays, each pixel subarray is composed of M rows of pixels and a reading circuit, a charge accumulation mode is adopted among all levels of each pixel subarray, a numeric accumulation mode is adopted among the K subarrays, and N, M and K meet the formula N=M*K. The charge-number mixed accumulation type CMOS-TDI image sensor is mainly applied in integrated circuit design.

The invention discloses a method for preparing thin film materials by a spin-coating method. The method comprises the following steps that a, atomized glue liquid is uniformly sprayed and coated on a substrate, then, the substrate is driven to rotate so that the glue liquid on the substrate form a film layer, and after the glue liquid distribution is stable, the rotation of the substrate stops; b, glue injection is carried out in the center part of the substrate, then, the substrate is driven to rotate, and the rotation stops until the glue liquid of the center glue injection is uniformly distributed, wherein the step a and the step b are sequentially carried out, or are carried out by changing the sequence or are alternately carried out for many times. The method has the technical effects that 1, through spin-coating on the substrate with greater size and greater glue liquid viscosity, the thickness uniformity of a spin-coating thin film can be improved; 2, the control flexibility and the control precision of a spin-coating process can be improved through multi-step spin-coating; 3, one-step spray coating is added before the traditional injection type spin coating, a thin liquid film layer is formed on the surface of the substrate, the fluidity of injection type spin coating glue liquid on the surface of the substrate is improved, the motor speed requirement is reduced, and the spin-coating efficiency is improved; 4, the glue liquid utilization rate is improved.

The invention relates to a method for comparison and reconstruction of a geographic redundancy database in a wireless communication network. The method comprises the steps that a comparison and arbitration controller module in a data center is in communication connection with at least two local proxy modules related to corresponding local databases and sends audit start orders, and whether the audit start orders are received for the first time or not is judged by each local proxy module; if yes, full detection is conducted; if not, increment detection is conducted; then, fingerprint features of each group are detected and identifiers with different fingerprint features in each local database are stored in a reconstruction list; corresponding user records in each local data are reconstructed through the comparison and arbitration controller module according to the reconstruction list until the fingerprint features of all the user records are identical. According to the method, the requirement for the bandwidth of audit is reduced, the size of data needing to be transmitted is greatly reduced only through detection of the fingerprint features, and therefore the audit speed is increased.

The invention provides a PLC safety real-time monitoring and measuring method and system. According to the technical scheme, under various operation conditions of the normal operation state of the PLC, values of various inputs and outputs and various soft element states in the PLC are recorded and encoded when key points are operated, and a code table is formed; in the operation stage, values of various inputs and outputs and values of various soft element states in the PLC are collected and encoded at various operation key points, corresponding state code words are obtained, then the state code words are rapidly searched in a code table, if the state code words cannot be found, a PLC emergency response mechanism is started, and the safety of a PLC application system is protected. According to the technical scheme, the safety of the PLC application system can be continuously and rapidly measured when the PLC operates, PLC execution code exception and input and output exception can be found in time, and compared with the prior art, the higher safety protection requirement of the PLC application system can be met.

The invention relates to a polarization controlling encoding method, an encoder and a quantum key dispatching system. The invention is characterized in that the interior of the encoder adopts a polarization-maintaining light path or a ninety-degree Faraday rotation reflector reflection to cause output optical pulse polarization state to be the same; the optical pulse output by the sending terminal of the quantum key dispatching system taking the polarization controlling encoder as the core is passed to the receiving terminal thereof by a quantum channel in a uni-directional way; according to the superposition interference results of the optical pulse and distributorship agreement of the quantum key, the quantum key dispatching is realized. The polarization controlling encoder causes the whole system (comprising a sending set, a reception unit and the quantum channel) to have the interference free capability. The outlet of the sending set and the inlet of the receiving set of the system are added with a reversal photon separation detection unit, thus preventing the invasion of the modulation information and carrying the photon to get off the reception unit of Trojan photon. The quantum key dispatching system can realize unconditional secure assignment of the key.

In a particular embodiment, a digital circuit includes a frequency detection circuit operative to compare information related to transitions between sequential samples of a received signal. The frequency detection circuit is further operative to generate a control signal to reduce a sampling rate of the received signal in response to a predetermined number of the sequential samples having a same value. The digital circuit also includes a digital phase detector operative to provide the information related to the transitions between sequential samples to the frequency detection circuit.

The invention relates to an array three-dimensional coherent scanning laser radar device, which comprises a frequency modulation laser, a first beam splitter, an array transceiving telescope, an optical scanner, a delayer, a second beam splitter, a multi-channel optical bridge, an array detector and a signal acquisition and processor. Through one-dimensional array light beam emission and corresponding array coherent reception, detection target point position data can be effectively improved, an imaging view field is broadened, meanwhile, the scanning speed requirement is lowered, and the system has the advantages of simple structure, easy integration and miniaturization, and is particularly suitable for airborne three-dimensional coherent scanning laser radar information detection.

The invention relates to a decentralized electronic academic certificate checking method and system, belongs to the technical field of electronic academic certificate acquisition, and solves the problem of electronic academic certificate checking. The method comprises the following steps: acquiring authorization for checking an electronic academic certificate of a student from a student terminal;requesting electronic academic certificate plaintext data from a school electronic academic certificate service platform; receiving electronic academic certificate plaintext data sent in a point-to-point manner after being authorized and verified by the school electronic academic certificate service platform; sending a request for checking the digital fingerprint of the electronic academic certificate on the block chain to an electronic academic certificate alliance block chain, and obtaining the digital fingerprint of the electronic academic certificate on the block chain after authorizationverification; and checking the authenticity of the plaintext data of the electronic academic certificate according to the digital fingerprint on the blockchain. According to the invention, decentralization is realized, an application mode of a traditional centralized educational background authentication platform based on data collection is changed, the risk of electronic academic certificate plaintext data uploading is solved, and the security is improved.

The invention discloses a full-digital time domain parallel timing synchronization system and method under a gigabit rate. The system comprises a parallel interpolation filter, a time sequence adjuster, a parallel digital-controlled oscillator, a parallel timing error detector and a loop filter. When a timing synchronization module of a communication system is started, the parallel interpolation filter carries out timing synchronization interpolation on received parallel digital signals. The method comprises the steps of carrying out interpolation filtering on N-way parallel digital signals x(n) according to fractional interval compensating signals mu(n); carrying out time sequence adjustment on the signals g(n) after the interpolation filtering according to enabling signals en(n), and outputting N-way parallel valid output values h(n); calculating to obtain timing errors e(n) through adoption of a Gardner algorithm according to the N-way parallel valid output values h(n), and obtaining timing restored N-way valid data y(n) according to the timing errors. According to the system and the method provided by the invention, timing synchronization of the multi-way parallel digital signals can be realized, and a demand of a digital timing synchronization system for the processing speed of digital devices and chips under a high-speed transmission condition of the gigabit rate is reduced.

The invention provides a rocket recovery device and a liquid rocket. The rocket recovery device comprises a fixing seat, N supporting structures and M hanging frame structures, the supporting structures are evenly distributed in the circumferential direction and fixedly arranged on the fixing seat, the bottom ends of the supporting structures are fixedly connected with the fixing seat, the top endof each supporting structure is connected with one end of the corresponding hanging frame structure through a rotating structure, the other ends of the plurality of hanging frame structures extend towards the direction in which the hanging frame structures are close to each other, the hanging frame structures are used for moving downwards along with a rocket to be recovered through the rotating structures after making contact with the rocket to be recovered so as to buffer the acting force of the rocket to be recovered in the landing process and fix the rocket to be recovered, and rocket recovery is achieved. According to the rocket recovery device and the rocket, hanging lock mechanisms are connected with the hanging frame structures on the liquid rocket so as to capture the rocket to berecovered, the requirements for the posture and speed of rocket recovery can be lowered, and the success rate of rocket recovery is increased.