1598 results about "Edge region" patented technology

The embodiment of the invention provides a preparation method of a solar cell and the solar cell, and the method comprises the steps: firstly obtaining a substrate cell piece, forming a passive film layer on the substrate cell piece, then forming a grid line on the passive film layer, and then carrying out the sintering. When the grid line is subjected to laser scanning, reverse bias voltage is applied to the grid line, meanwhile, laser scanning is carried out from the middle area of the passive film layer to the edge area, and the laser power when laser scanning is carried out on the middle area is larger than the laser power when laser scanning is carried out on the edge area. When a passive film is formed, due to the influence of a winding plating phenomenon, the passive film has the characteristics that the middle is thin and the edge is thick. The laser power of the edge area is lower, so that the process strength of the edge area can be reduced, and the temperature generated by the edge area can be reduced. Compared with the prior art, the method has the advantages that the high-temperature phenomenon of the edge area can be relieved, the abnormal black edge phenomenon caused by high process strength at the edge is effectively reduced, and the product yield and quality are improved.

The invention relates to a cuboid membrane stack (9) for an air humidifier (1), which has a stacking direction (S) and four stacking sides (10) transverse to the stacking direction (S), wherein the membrane stack (9) has a vertical direction (Z) parallel to the stacking direction (S), a longitudinal direction (X) perpendicular to the vertical direction (Z), and a transverse direction (Y) perpendicular to both the vertical direction (Z) and the longitudinal direction (X), wherein the four stacking sides (10) form an air supply inlet (ZE) and an air supply outlet (ZA) facing away from each other in the longitudinal direction (X), and an exhaust air inlet (AE) and an exhaust air outlet (AA) facing away from each other in the transverse direction (Y), wherein the membrane stack (9) has several membranes (11) which, within the membrane stack (9), each form an air supply path (ZP) connecting the air supply inlet (ZE) to the air supply outlet (ZA), and an exhaust air path (AP). separate,which connects the exhaust air inlet (AE) with the exhaust air outlet (AA). Improved dimensional stability can be achieved by forming a membrane pair (18) with two membranes (11) that are adjacent in the stacking direction (S) and that define one of the supply air paths (ZP) in the stacking direction (S), by connecting the two membranes (11) of the respective membrane pair (18) airtightly to each other by an adhesive bond (21) in a first edge region (19) adjacent to the exhaust air inlet (AE) and in a second edge region (20) adjacent to the exhaust air outlet (AA), and by having the membrane stack (9) have several spacers (12) that are arranged in the stacking direction (S) between two immediately successive membrane pairs (18) and each of which rests against one of the membranes (11) of the two membrane pairs (18) and separates them from each other in the stacking direction (S), such thatthat the membranes (11) adjacent to and spaced apart from each other on the spacer (12) limit one of the exhaust air paths (AP) in the stacking direction (S).

The invention relates to the technical field of resolution improvement, in particular to a video definition improvement method and system.According to the video definition improvement method and system, through window accumulation of adjacent frame gray difference and coordinate difference, minimum displacement is selected, mapping is updated, boundary neighborhood weighted correction is carried out, cross-frame dislocation is reduced, and motion area connection is guaranteed; capturing a three-frame gray scale sequence to calculate a difference value, writing a replacement value according to a monotone and amplitude condition, inputting the replacement value and an alignment frame difference into Fourier transform, decomposing amplitude and phase distribution in a residual field in a frequency domain, and performing amplitude and phase consistency elimination on an abnormal block during frame-by-frame superposition to obtain an abnormal block; row difference and column difference absolute values of neighborhood blocks in the residual iteration texture matrix are accumulated into energy, the energy and a center difference are combined with a threshold value to output a mark, and a texture region and an edge region are distinguished; the brightness of the low-frequency position is updated according to the weight mean value, the maximum difference and the direction difference are combined for the high-frequency position, the edge gradient is extracted through the convolutional neural network, a correction value is generated, edge steps and fuzziness are suppressed, and high-frequency details are continuously kept.

An acoustic wave device, a radio frequency filter and an electronics module are provided. The acoustic wave device, comprises a layer of piezoelectric material, a pair of interdigital transducer electrodes disposed on an upper surface of the layer of piezoelectric material, each interdigital transducer electrode including a bus bar and a plurality of electrode fingers extending from the bus bar through a central region of the interdigital transducer electrode towards an edge region of the interdigital transducer electrode, each of the plurality of electrode fingers having a width in a direction perpendicular to the extension of the electrode fingers that is smaller in the edge regions than in the central regions, and trench portions located in the upper surface of the layer of piezoelectric material, the trench portions overlapping with the edge regions of the interdigital transducer electrodes. The acoustic wave device provides effective suppression of transverse modes.

A structural component serves as a container for a vehicle. The structural component comprises a trough-shaped container section, an edge region, and fastening elements that are provided in the edge region. The container section forms a compartment and defines a bottom region and two or more wall regions, which are at least sectionally inclined with respect to the bottom region. The two or more wall regions are arranged between the bottom region and the edge region. The fastening elements are arranged and distributed around the container section. The container section and the edge region are formed of an injection moldable fiber reinforced thermoplastic material. The structural component at least sectionally has a porous internal structure that is formed by foaming the thermoplastic material.

A method of manufacturing a display device includes forming a thin film transistor layer in an active area of a substrate, forming a metal layer on an edge area of the substrate, transferring first coating patterns to the edge area, the first coating patterns covering a portion of the metal layer corresponding to shapes of side surface lines, etching the metal layer to form the side surface lines, an upper surface of each of the side surface lines being covered by the first coating patterns, transferring a second coating pattern to the edge area, the second coating pattern covering a side surface of each of the side surface lines and the first coating patterns, and transferring light emitting elements to the thin film transistor layer. The second coating pattern includes openings corresponding to the first coating patterns in a plan view.

The invention relates to the technical field of blade contour measurement, and discloses a blade contour measurement method and system for an art knife. The method comprises the steps that after an art knife blade image is preprocessed, segmentation is conducted through an edge intensity weighted improved Otsu algorithm, a blade contour is obtained in combination with morphological operation, pixel-level edges are extracted through a Canny algorithm, and finally sub-pixel accurate positioning is achieved based on Fourier transform and a Zernike moment, and high-precision blade contour coordinates are obtained. According to the method, the defects of low precision and poor noise immunity in the existing art knife blade contour measurement method are overcome, the measurement precision reaches 0.1 pixel or below, meanwhile, the method has the self-adaptive processing capacity for edge areas with different complexities, and it is ensured that high-precision and high-reliability blade contour measurement results are obtained in various complex environments.

The invention discloses a high-temperature test method for a power semiconductor device, and relates to the technical field of quantum thermal control, and the method comprises the steps: collecting a temperature field and surface conductivity data of an edge region of the power semiconductor device in real time, and synchronously applying an electric stress of a specified working voltage to the power semiconductor device; an internal thermal displacement field is reconstructed based on the temperature field, a calibration thermal displacement field is generated, and the topological number of the edge area is calculated in combination with the surface conductivity data; generating a thermal failure risk distribution map according to the spatial position of the peak value of the thermodynamic entropy yield, and locking a high-entropy variable power dense region; and the electric stress applying direction is dynamically adjusted in association with the high-entropy variable power dense area, and a thermal failure diagnosis report is output after a full-period high-temperature test is completed. According to the method, submicron-level real-time positioning of the thermodynamic entropy generation peak value under the high-temperature working condition is achieved through collaborative mapping of the quantized calibration thermal displacement field and the tensor field of the classic temperature gradient.

The invention provides a reinforced concrete beam global deformation automatic monitoring method and system, and relates to the technical field of engineering structure intelligent monitoring, and the method comprises the steps: obtaining an original image of a reinforced concrete beam; inputting the original image into the image segmentation model, and outputting a binary mask image; determining a center point of a beam body according to a foreground region in the binary mask image; identifying the edge of the foreground region through an edge detection algorithm and a contour extraction algorithm, and extracting an outer contour point set of the beam body; redundant points in the beam body outer contour point set are removed, and a beam body candidate corner point set is obtained; determining a plurality of target beam body angular points in the beam body candidate angular point set through a heuristic optimization algorithm; dividing the binary mask image into a plurality of edge regions through a central radioactive ray division method; dividing each outer contour point in the outer contour point set of the beam body into a corresponding edge area; constructing a linear profile curve; and calculating the vertical global deformation of the reinforced concrete beam according to the linear profile curve.

The invention discloses a processing method and device for an edge area in film layer structure ink-jet printing, and the processing method comprises the steps: determining the edge area of a to-be-printed pattern on a substrate bitmap; the pattern to be printed comprises an edge area and a non-edge area; the edge area is divided into a plurality of edge subareas so that an ink-jet printer can conveniently conduct film layer structure printing on the edge subareas of the to-be-printed pattern; wherein in the direction from the edge area to the non-edge area, the sizes of the multiple edge subareas are sequentially decreased progressively; one size of the edge subarea corresponds to one ink drop extraction rate, the size of the edge subarea is the width of the edge subarea, and the ink drop extraction rate of the edge subarea is the proportion of ink drop points which are prohibited from printing to the total ink drop points in the edge subarea. The edge area of the film layer structure can be flat, and the film thickness is uniform.

The invention discloses a flow uniformizing device, which relates to the technical field of semiconductor processing, is applied to a measuring cavity and comprises a first flow guide part and a second flow guide part, and the first flow guide part is provided with a first flow guide surface for receiving airflow; the second flow guide part is connected to the lower edge area of the first flow guide face and provided with a second flow guide face, and an obtuse-angle flow guide structure is formed by the first flow guide face in the first flow guide part and the second flow guide face, connected to the lower edge area of the first flow guide face, in the second flow guide part. Meanwhile, the extension direction of the second flow guide face faces the side wall of the measuring part, the obtuse angle flow guide structure receives the vertically downward airflow output by the airflow generation device through the first flow guide face, and directional deflection of the airflow is achieved through the second flow guide face, so that the airflow smoothly transits from vertical flowing to adherence flowing along the side wall of the measuring part. Therefore, the uniformity of the flow field near the measurement part is improved, and the measurement accuracy is improved.

A string driver device is described in this disclosure. The string driver device includes a semiconductor channel disposed in an upper portion of a semiconductor substrate and a gate dielectric layer disposed above the semiconductor channel. The string driver device also includes a source region and a drain region disposed at opposite sides of the semiconductor channel, each of the source region and the drain region having a corresponding contact disposed thereon. The string driver device further includes a gate that is disposed above the gate dielectric layer and has a first length, and a field plate layer disposed above the gate, the field plate layer having a second length larger than the first length of the gate, wherein the field plate layer includes one or more edge regions extending across the semiconductor channel edge and toward the source region or the drain region.

The invention discloses a laser-assisted sintering method for a TOPCON solar cell, the TOPCON solar cell and a photovoltaic module. The front surface of the battery is divided into a first edge region, a middle region and a second edge region along a first direction, and grid lines are arranged on the front surface; performing laser-assisted sintering on the first edge region and the second edge region under a first bias voltage U1; performing laser-assisted sintering on the middle region under a second bias voltage U2; wherein U2-U1 is marked as U, 0.5 V < U < = 9V, the length of the battery along the first direction is L, the lengths of the first edge region, the second edge region and the middle region along the first direction are d1, d2 and d3 respectively, d3 = L-d1-d2, 0.02 L < d1 < = 0.25 L, and 0.02 L < d2 < = 0.25 L. A high bias value is used in the middle region, so that high photoelectric conversion efficiency of the battery piece can be kept; the edge area has a proper size, and the edge area is subjected to laser-assisted sintering by using a relatively low bias value, so that the problem of EL edge blackening can be relieved and even solved.

According to the splicing type Ritchey-Common detection method and system based on neural network model training, the sensitivity rules of aberration orders and Ritchey angles are combined, angle differentiation configuration is combined with reconstruction of the marginal area weight through a fusion detection model, and therefore on the premise that no sensitive blind area exists, the detection accuracy is improved, and the detection efficiency is improved. The influence of weak edge aberration signals is counteracted, so that the deviation between the detection precision of the edge region and the central region can be remarkably reduced, full-order high-precision detection of large-aperture plane mirror aberration is realized, particularly, the detection precision of the edge region aberration is remarkably improved, and the detection precision of the large-aperture plane mirror aberration is improved. The problems that in a traditional method, the precision deviation between an edge area and a center area is large, and full-order aberration coverage is insufficient are solved.

The invention relates to the technical field of production of fused zirconia corundum bricks, in particular to a homogenizing and mixing device for fused zirconia corundum bricks, which comprises a mixing box, a hopper, a connecting piece and a mixing cylinder, a feed port and an opening are respectively formed in opposite sides of the outer wall of the mixing cylinder, and a filter screen is mounted on the opening. According to the homogenizing and mixing device for the fused zirconia corundum bricks, raw materials are stirred in all directions through a mixing barrel on a connecting piece, meanwhile, a second driving source drives a supporting frame to rotate around a connecting plate in the axial direction, the connecting piece slides in a center-edge-center reciprocating mode along a curve-shaped limiting sliding rail, and the raw materials are uniformly mixed; the stirring part circulates between the central area of the mixing cavity and the edge area of the inner wall, so that the mixing area of raw materials is increased, and stirring dead angles are avoided.

Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include exposing an edge region to treatment gases such as etch gases and / or inhibition gases. Also provided herein are exclusion ring assemblies including multiple rings that may be implemented to provide control of the processing environment at the edge of the wafer.

The invention relates to the technical field of infrared imaging, in particular to an infrared image self-adaptive denoising algorithm and system based on an FPGA (Field Programmable Gate Array), and is characterized in that an adaptive blind pixel searching algorithm module captures data of a certain frame number at an FPGA end, performs multi-directional gradient detection on each pixel point, sets conditions to judge to obtain a blind pixel position, and marks the blind pixel position; the convolution kernel self-adaptive blind pixel replacement module performs self-adaptive blind pixel replacement multi-time module multiplexing at the PL end of the FPGA through a convolution kernel sliding block and gradient comparison to ensure complete coverage of a large blind pixel group, and the self-adaptive median filtering module intelligently selects and replaces pixels meeting requirements through automatic sorting of center pixels and surrounding pixels; according to the method, surface fuzzy filtering is carried out through a surface-blue algorithm module, so that a smooth area in an image is effectively smoothed, details of an edge area are reserved, blind pixels in a video stream can be effectively detected and compensated, and meanwhile traditional noise is suppressed and image details are reserved through multi-stage filtering.

The utility model provides a composite packaging adhesive film and a photovoltaic module, the composite packaging adhesive film comprises a base material adhesive film layer and a blocking layer, the blocking layer comprises edge adhesive film parts at least arranged in edge areas of two opposite sides of the base material adhesive film layer, the outer side edge of the edge adhesive film part is flush with the outer side edge of the base material adhesive film layer; the total area of the orthographic projection of the blocking layer on the plane where the base material adhesive film layer is located is 5%-45% of the area of the base material adhesive film layer. According to the utility model, through the combination of the low-cost base material adhesive film layer and the high-water-vapor-barrier barrier layer, the edge water vapor barrier performance is improved, and the packaging material cost is greatly reduced.

A system for drying a battery electrode coating includes two laser diode arrays and a laser module. Each laser diode array emits multi-beam laser radiation to an edge region including a respective edge of a coating lane deposited on a metal foil. The laser module emits a diverging laser beam to an interior area of the coating lane between the two edges. The intensity distribution of the diverging laser beam at the coating lane spans a gap in the widthwise dimension between respective intensity distributions of the multi-beam laser radiation from the two laser diode arrays. The use of laser diode arrays to perform the edge drying allows for tailoring the intensity distribution of the combined laser irradiation to dry the coating lane without over-drying and delaminating the edges. The use of a single, diverging laser beam in the interior area allows for optimizing affordability and energy efficiency.

The invention relates to a wafer defect detection method, which comprises the following steps of: scanning a wafer at a first detection resolution to perform first defect detection on the wafer to obtain a scanning image of the whole wafer, and generating a first detection report containing size information and position information of defects; filtering the first detection report to obtain size and position information of a first type of defects, and defining an area within a first distance range of the first type of defects as an associated defect area; setting the edge area of the wafer as a special attention area, and setting the associated defect area and the special attention area as a secondary scanning area; scanning the secondary scanning area with a second detection resolution to obtain a secondary scanning image and position information and size information of a second type of defects; and superposing the secondary scanning image and the position information and the size information of the second type of defects with the scanning image of the whole wafer and the size information and the position information of the defects in the first detection report to obtain a final scanning image.

The invention discloses a panoramic image splicing method, system and device, and relates to the technical field of image processing, and the method comprises the steps: collecting images around a vehicle at different visual angles; using the MASK masks to generate overlapping region masks of the different view angle images, and performing local feature detection on the overlapping region masks to generate a transformation matrix; aligning the images of different visual angles according to the transformation matrix; a Canny edge detection operator is fused in splicing seam energy detection, the energy weight of the image edge area of the aligned image is enhanced, and a splicing seam is guided to actively avoid an object with remarkable structural features; b spline interpolation is introduced to optimize an initial splicing seam path; constructing a Laplacian pyramid along Gaussian blur of a splicing seam, and sequentially carrying out gradual fusion to generate a seamless panoramic image; according to the method, the basic function of eliminating the visual blind area is realized, a clear and visual panoramic view can be provided for a driver, and the driving safety is effectively improved.

A semiconductor device may include a substrate including a chip region and an edge region around the chip region, an alignment key disposed in the edge region of the substrate, a stack including conductive patterns and interlayer insulating layers, which are vertically and alternatingly stacked on the chip region of the substrate, the stack having a first staircase structure, and a dummy mold structure including dummy insulating layers and sacrificial patterns, which are vertically and alternatingly stacked on the edge region of the substrate, the dummy mold structure overlapping with the alignment key and having a second staircase structure. The dummy mold structure May have substantially the same height as the stack, when measured from the substrate.

The invention relates to the technical field of semiconductors, in particular to an MEMS micro loudspeaker packaging structure and a preparation method thereof, and the packaging structure comprises a substrate which is provided with a hollow cavity structure, a limiting device and a plurality of vent holes in the bottom; and the MEMS sound production chip is inversely arranged on the substrate, and the edge area of the MEMS sound production chip is bonded with the substrate through the connecting part. According to the packaging structure of the MEMS micro loudspeaker provided by the invention, the MEMS sound production chip is inversely arranged and is in direct contact with the substrate used for packaging, so that the packaging structure has higher impact resistance, the inversely arranged MEMS sound production chip can better dissipate heat, and a double-sound-cavity structure in the packaging structure increases system damping and reduces the quality factor of device resonance; the stability and reliability of the chip can be improved, the design of multiple vent holes is combined with the limiting device, the nonlinear displacement of the MEMS sound production chip under the resonant frequency is effectively inhibited, and the total harmonic distortion is reduced.

The embodiment of the invention relates to the photovoltaic field, and provides a photovoltaic cell and a photovoltaic module, and the photovoltaic cell comprises a cell substrate which is provided with two opposite edge regions along a first direction and a central region located between the two edge regions; the plurality of grid lines are positioned on the battery substrate and are arranged at intervals along a first direction; the first welding spots and the second welding spots are located on at least part of the edge areas, the second welding spots are located on the areas, close to the central area, in the edge areas, the first welding spots are located on the sides, away from the central area, of the second welding spots, and the orthographic projection area of the first welding spots on the battery substrate is smaller than that of the second welding spots on the battery substrate; the first connecting lines are located on at least a part of the edge areas, the first connecting lines are in contact connection with the first welding spots and the second welding spots, and are in contact connection with a plurality of grid lines located on the sides, away from the central area, of the second welding spots, and the transmission efficiency of carriers in the photovoltaic cell is at least improved.

The invention belongs to the field of computer graphics and computer vision, and provides an explicit volume rendering primitive densification method based on detail perception gradient, which is suitable for a three-dimensional reconstruction task under a sparse view angle or sparse point cloud condition. According to the method, a detail perception gradient index is introduced, the fitting capability of a current model to a fuzzy region in an image is dynamically evaluated, and whether point refinement operation is executed or not is judged according to the fitting capability. Compared with a traditional densification strategy depending on position gradient, the index provided by the invention can more accurately identify a detail missing region, and the rationality of density distribution is improved. Furthermore, according to the method, visual angle correlation and gradient normalization information are combined, a threshold function is set to split and reconstruct Gaussian primitives, and low-overhead and controllably-distributed point set enhancement is achieved. While the compactness of the whole model is kept, the reconstruction quality of a complex structure and an edge region is effectively improved, and the method can be widely applied to various application scenes such as real-time rendering, underwater perception and sparse reconstruction.

The invention relates to the technical field of semiconductors, and provides a manufacturing method of a semiconductor device. The manufacturing method comprises the steps that an edge area of a wafer is trimmed from a first face of the wafer to form a step, the step comprises a step face and a step side face, and the width of the step face is smaller than or equal to that of the edge area; forming a bonding layer on the first surface of the wafer and the side surface of the step so as to fix the wafer on the slide glass; wherein the step surface comprises a plurality of areas arranged along the circumferential direction of the wafer, and the contact area between a first area in the plurality of areas and the bonding layer is smaller than the contact area between a second area and the bonding layer; cutting an edge area where the first area is located from the second surface, wherein a notch extends from the second surface to the step surface; and performing a thinning process on the wafer from the second surface. According to the invention, the edge region where the first region is located is cut before the thinning process, so that the width of the step surface is reduced, the moment applied to the first region in the wafer thinning process is reduced, the risk of edge collapse is reduced, and the yield and reliability of chips are improved.

A semiconductor structure and a method for forming same. The semiconductor structure comprises: a substrate, which comprises a first region; two or more capacitor structures, which are connected in parallel and are sequentially stacked on the first region in the direction perpendicular to the substrate, wherein a top edge region of at least one capacitor structure is provided with a protective layer, the protective layer being used for covering the top edge region of the capacitor structure, and thereby reducing the current which flows from a metal layer, which is located above the protective layer, to the edge region of the capacitor structure. By using the scheme, the capacity of a capacitor structure in a semiconductor structure can be increased without increasing the area of a device, and the reliability of the capacitor structure can be improved.

The invention relates to the technical field of semiconductor manufacturing, discloses a high-precision positioning integrated circuit packaging film stripping system, and aims to overcome the defects in the aspects of flexible material processing, positioning precision stability, operation efficiency and the like in the prior art. The system comprises a high-precision visual positioning unit which is used for collecting a packaging film surface image and extracting a submicron positioning reference point coordinate; the flexible contact type clamping unit is used for fixing the edge area of the packaging film in a low-stress mode in the stripping process; and the six-degree-of-freedom precision motion platform is used for bearing and driving the flexible contact type clamping unit to execute a preset stripping track in a three-dimensional space. According to the technical scheme, submicron spatial positioning precision can be achieved, local stress concentration is remarkably reduced, material deformation is dynamically sensed and compensated, external interference is effectively isolated, the positioning process is simplified, and the overall efficiency and yield are improved.

The invention discloses a back contact solar cell and a preparation method thereof, and relates to the technical field of solar cells. The back contact solar cell comprises a silicon substrate, a plurality of first doped regions, a plurality of second doped regions and a plurality of edge doped regions are alternately arranged on the back surface of the silicon substrate, and each edge doped region comprises a first edge region and a second edge region; the first edge region is located between the first doped region and the second edge region; the tunneling passivation layer is arranged in the first doped region; the first hydrogenated amorphous silicon layer is arranged in the second doped region and extends to the second edge region and the first edge region from the second doped region; the doped polycrystalline silicon layer is arranged on the outer side of the tunneling passivation layer and extends to the part, corresponding to the first edge region, of the outer side of the first hydrogenated amorphous silicon layer from the first doped region; the first doped silicon-containing film is arranged on the outer side of the first hydrogenated amorphous silicon layer. According to the embodiment, an isolation region can be omitted, and the passivation effect is improved.