656 results about "Phase-shift mask" patented technology

A method and apparatus for determining optical mask corrections for photolithography. A plurality of grating patterns is printed onto a wafer utilizing a photomask having at least one grating. Each grating pattern within the plurality of grating patterns is associated with known photolithographic settings. Each grating pattern is illuminated independently with a light source, so that light is diffracted off each grating pattern. The diffracted light is measured utilizing scatterometry techniques to determine measured diffracted values. The measured diffracted values are compared to values in a library to determine a profile match. A 2-dimensional profile description is assigned to each grating pattern based on the profile match. A database is compiled of the profile descriptions for the plurality of grating patterns. Photomask design rules are then generated by accessing the database containing the 2-dimensional profile descriptions. In preferred embodiments, the design rules are used to create and correct masks containing OPC corrections, phase-shifting mask corrections and binary masks. In a preferred embodiment the at least one grating is a bi-periodic grating. In a preferred embodiment, the scatterometry technique is optical digital profilometry utilizing a reflectometer or ellipsometer.

One embodiment of the invention provides a system that automatically resolves conflicts between phase shifters during creation of a phase shifting mask to be used in an optical lithography process for manufacturing an integrated circuit. Upon receiving a specification of a layout on the integrated circuit, the system identifies critical-dimension features within the layout. Next, the system places phase shifters comprised of phase shifting geometries on the phase shifting mask to precisely define the critical-dimension features. In doing so, the system identifies junctions within and / or between the critical-dimension features, and removes phase shifting geometries associated with the junctions to obviate coloring conflicts between phase shifters on the phase shifting mask. In one embodiment of the invention, the junctions include T-junctions and / or L-junctions.

A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the like, the stress is dispersed to the main wall part and the sub-wall part, and hence peeling between layers and a crack are unlikely to occur, as compared with the conventional art. Further, even if the crack and the like occur at the corner, moisture from the outside hardly reaches the integrated circuit part when the main wall part and the sub-wall part are coupled to each other. For this reason, it is possible to ensure an extremely high moisture resistance.

A method of forming box-shaped cylindrical storage nodes includes forming an interlayer insulating layer on a semiconductor substrate. Buried contact plugs are formed to penetrate the interlayer insulating layer. A molding layer and a photoresist layer are then sequentially formed on the substrate. Using a first phase shift mask having line-and-space patterns, the photoresist layer is exposed, forming first exposure regions. Using a second phase shift mask having line-and-space patterns, the photoresist layer is exposed again, forming second exposure regions intersecting the first exposure regions. The photoresist layer is then developed, forming a photoresist pattern having rectangular-shaped openings formed at intersections of the first and the second exposure regions. The molding layer is etched using the photoresist pattern as an etch mask, forming storage node holes exposing the buried contact plugs. Storage nodes are formed inside the storage node holes.