637 results about "Phase-shift mask" patented technology

A method of repairing a semiconductor phase shift mask comprises first providing a semiconductor mask having a defect and then illuminating the mask to create an aerial image of the mask. Subsequently, the aerial image of the mask is analyzed and the defect in the mask is detected from the aerial image. An ideal mask image is defined and compared to the aerial image of the defective mask to determine the repair parameters. Unique parameters for repairing the mask defect are determined by utilizing the aerial image analysis and a look-up table having information on patch properties as a function of material deposition parameters. The mask is then repaired in accordance with the parameters to correct the mask defect. A patch of an attenuated material may be applied to the mask or a predetermined amount of material may be removed from the mask. The aerial image of the repair is analyzed to determine whether the repair sufficiently corrects the defect within predetermined tolerances.

There is disclosed a resist composition that remarkably improves the resolution of photolithography using a high energy beam such as ArF excimer laser light as a light source, and exhibits excellent resistance to surface roughness and side lobe under use of a halftone phase shift mask; and a patterning process using the resist composition. The positive resist composition at least comprises (A) a resin component comprising a repeating unit represented by the following general formula (1); (B) a photoacid generator generating sulfonic acid represented by the following general formula (2) upon exposure to a high energy beam; and (C) an onium salt where a cation is sulfonium represented by the following general formula (3), or ammonium represented by the following general formula (4); and an anion is represented by any one of the following general formulae (5) to (7).

A method and system for providing a microelectric device, such as a magnetoresistive read sensor are described. The method and system include providing a mask layer on the microelectric device. The method and system further include exposing the mask layer to provide a mask. A portion of the mask covers a portion of the microelectric device. The step of exposing the mask layer further includes utilizing a chromeless alt-phase shift mask for providing the portion of the mask.

A method and apparatus for determining optical mask corrections for photolithography. A plurality of grating patterns is printed onto a wafer utilizing a photomask having at least one grating. Each grating pattern within the plurality of grating patterns is associated with known photolithographic settings. Each grating pattern is illuminated independently with a light source, so that light is diffracted off each grating pattern. The diffracted light is measured utilizing scatterometry techniques to determine measured diffracted values. The measured diffracted values are compared to values in a library to determine a profile match. A 2-dimensional profile description is assigned to each grating pattern based on the profile match. A database is compiled of the profile descriptions for the plurality of grating patterns. Photomask design rules are then generated by accessing the database containing the 2-dimensional profile descriptions. In preferred embodiments, the design rules are used to create and correct masks containing OPC corrections, phase-shifting mask corrections and binary masks. In a preferred embodiment the at least one grating is a bi-periodic grating. In a preferred embodiment, the scatterometry technique is optical digital profilometry utilizing a reflectometer or ellipsometer.

Method, system and program product for migrating an integrated circuit (IC) layout for, for example, alternating aperture phase shift masks (AltPSM), are disclosed. In order to migrate a layout to phase compliance, jogs are identified on a first (AltPSM) layer and shifted to another second layer. Isolated or clustered jogs are shifted into an open channel portions on the second layer where possible. Remaining clustered jogs are shifted into as few new channels as possible on the second layer. The jog removal process leaves unidirectional wires that can be trivially phase colored. Standard technology migration techniques are then used to legalize the results on the layers.

A method for reducing lens aberrations sensitivity and proximity effects of alternating phase shifted masks is described. The critical features of a chip design layout are first identified. Multiple, narrow phase regions and auxiliary phase transitions, which provide additional opaque features, are then formed alongside the critical features such that a grating pattern of substantially uniform pitch is printed. Together with a complementary trim mask, the circuit pattern so delineated has reduced sensitivity to lens aberrations and proximity effects.

A checking routine verifies a phase shifted mask (PSM) design based on fundamental principles of PSM and utilizing only basic shape manipulation functions and Boolean operations found in most computer aided design (CAD) systems. The design verification system checks complete chip designs for the two possible design errors that can cause defective masks by eliminating the phase transition; namely, placing a 180° phase region on both sides of a critical feature or completely omitting the phase region adjacent to certain critical features.

An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification tools. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification tool components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification tool components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.

A new method for repairing pattern defect on a photo mask is provided. The method includes the steps of: (a) determining the irradiation area of the focused ion beam (FIB) directed towards a defect, by narrowing the irradiation area by a predetermined distance inwardly from the edge of the defect; (b) focusing the FIB onto its irradiation area to remove a part of the pattern film material of the defect from its top surface and thus leave a thin layer on a mask substrate; and (c) removing the thin layer by using a laser beam. The defect may be an isolated pattern or a pattern extended continuously from an edge of the normal pattern. Further, the photo mask repaired by the method, and a manufacturing method of semiconductor devices employing the repaired photo mask are proposed. The photo mask may include a phase shift mask.

A method includes providing a wafer having a first grating structure and a second grating structure formed in a photoresist layer. At least a portion of the first and second grating structures is illuminated with a light source. Light reflected from the illuminated portion of the first and second grating structures is measured to generate a reflection profile. Misregistration between the first and second grating structures is determined based on the reflection profile. A processing line includes a photolithography stepper, a metrology tool, and a controller. The photolithography stepper is adapted to process wafers in accordance with an operating recipe. The metrology tool is adapted to receive a wafer processed in the stepper. The wafer has a first grating structure and a second grating structure formed in a photoresist layer. The metrology tool includes a light source, a detector, and a data processing unit.

Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact or proximity printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.

The invention concerns a process for forming an optical component comprising:

• • a—formation of a multi-layer stack (32, 34) with an adjustment layer (30) made of a metal-semiconductor mix formed in or on the stack,
  • b—etching a part of the multi-layer stack, including at least a part of the adjustment layer,
  • c—an annealing step to contract the adjustment layer within less than 1 nm.

A modified phase shifting mask is used to improve performance over traditional Zernike phase contrast imaging. The configurations can lead to an improved imaging methodology potentially with reduced artifacts and more than one order of magnitude gain in photon efficiency, in some examples. Moreover, it can be used to yield a direct representation of the sample's phase contrast information without the need for additional specialized post-acquisition image analysis. The approach can be applied to both wide-field and scanning configurations by using a phase mask including a pattern of phase elements and an illumination mask, having a pattern of holes, for example, that corresponds to a pattern of the phase mask.

An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and OPC verification and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.

A pattern is formed by coating a chemically amplified positive resist composition comprising a resin comprising acid labile group-containing recurring units and a photoacid generator onto a substrate, drying to form a resist film, exposing the resist film to high-energy radiation through a phase shift mask including a lattice-like first shifter and a second shifter arrayed on the first shifter and consisting of lines which are thicker than the line width of the first shifter, PEB, developing to form a positive pattern, illuminating or heating the positive pattern to eliminate acid labile groups for increasing alkaline solubility and to induce crosslinking for imparting solvent resistance, coating a reversal film, and dissolving away the positive pattern in an alkaline wet etchant to form a pattern by way of positive/negative reversal.

A reticle inspection system and method for complete and fast inspection of phase shift mask reticles, both for incoming inspection and for periodic and pre-exposure inspection tool, is employable by facilities such as mask shops as an inspection tool compatible to the mask shop's customers. The inventive system and method detect phase errors in an aerial image by acquiring the image of the phase shift mask under the same optical conditions as the exposure conditions (i.e. wavelength, numerical aperture, sigma, and illumination aperture type). Images are acquired at a positive out-of-focus and a negative out-of-focus, and are compared in order to enhance possible phase error. The term “phase error” refers to the acceptable range of the phase deviation from the programmed 180° on the phase shift mask, by using the exposure system to achieve the image on the photoresist, satisfying the requirements of the wafer specification.

In a halftone phase shift mask blank comprising a substrate, a light absorbing film, and a phase shifter film, the light absorbing film contains a metal element of Group 4A in a distribution having a higher metal element content in an upper region than in a lower region. Also provided is a halftone phase shift mask blank comprising a transparent substrate and a halftone phase shift film of a single layer or multiple layers having a preselected phase difference and transmittance, wherein at least one layer of the halftone phase shift film contains at least 90 atom % of silicon and a plurality of metal elements, typically Mo and Zr or Hf.

Utilizing contact printing as the second exposure within a double exposure attenuated phase shift mask (APSM) fabrication process is disclosed. The process defines the shift pattern within the attenuated layer of the APSM using a first exposure, such as electron beam (e-beam) writing. The attenuated layer may be MoSi, MoSiO, and so on. The process then defines the border pattern within the opaque layer of the APSM using a second exposure. The second exposure employs contact printing, utilizing a contact exposure mask. The contact printing process may align the contact exposure mask over the wafer on which the APSM is fabricated utilizing a camera and an image storage system storing an image of this wafer.