289results about How to "Increase process margin" patented technology

A method for fabricating a semiconductor device in which a scribe area can be diced with high yield. The method for fabricating a semiconductor device comprises (a) a step for providing a semiconductor wafer having a plurality of chip areas in which semiconductor elements are formed, and a scribe area for separating the plurality of chip areas and including dicing areas with groove forming areas being defined to surround each chip area on the outer side of the dicing area in the scribe area, (b) a step for arranging a multilayer interconnection structure where interlayer insulation films and interconnection layers are formed alternately above the semiconductor wafer along with dummy lines, (c) a step for forming a cover layer covering the multilayer interconnection structure and including a passivation layer, and (d) a step for forming a groove surrounding each of the plurality of chip areas and penetrating at least the passivation layer from above in the groove forming area.

A process for fabricating a fin-type field effect transistor (FinFET) structure is described. A semiconductor substrate is patterned to form a fin. A spacer is formed on the sidewall of the fin. A portion of the fin is removed, such that the spacer and the surface of the remaining fm together define a cavity. A piece of a semiconductor compound is formed from the cavity, wherein the upper portion of the piece of the semiconductor compound laterally extends over the spacer.

A pattern is formed by coating a chemically amplified positive resist composition comprising a resin comprising acid labile group-containing recurring units and a photoacid generator onto a substrate, drying to form a resist film, exposing the resist film to high-energy radiation through a phase shift mask including a lattice-like first shifter and a second shifter arrayed on the first shifter and consisting of lines which are thicker than the line width of the first shifter, PEB, developing to form a positive pattern, illuminating or heating the positive pattern to eliminate acid labile groups for increasing alkaline solubility and to induce crosslinking for imparting solvent resistance, coating a reversal film, and dissolving away the positive pattern in an alkaline wet etchant to form a pattern by way of positive/negative reversal.

A manufacturing method of a liquid crystal display includes: forming a thin film transistor on a first substrate; forming a color filter on the thin film transistor; forming a pixel electrode on the color filter; and forming a light blocking member including a column spacer protruded from the light blocking member on the color filter. The forming the light blocking member uses a mask including a first region, a second region, and a third region. The first region passes light generated from a light exposer, the second region includes a blocking filter layer which selectively passes the light generated from the light exposer, and the third region blocks the light generated from the light exposer.

The present invention discloses a method for making polycrystalline silicon layer which comprises, providing a substrate, forming a breaker having a plurality of ditches on the substrate, forming a non-crystalline silicon layer on the breaker, proceeding a laser annealing process to form a polycrystalline silicon. The invention can be applied into the production of low-temperature polycrystalline silicon thin film transistor LCDs.

A thin film transistor (TFT) that comprises a gate electrode on a substrate, a gate insulation layer on the gate electrode, an active layer having a source region, a drain region, and a channel region on the gate insulation layer, and a source electrode and a drain electrode formed over the source region and drain region of the active layer respectively and facing each other with respect to the channel region. The profile of channel region between the source electrode and drain electrode is changed in a bend line. A method for forming the TFT is also provided.

A polishing apparatus is used for polishing a substrate such as a semiconductor wafer to a flat finish. The polishing apparatus includes a polishing tool having a polishing surface, a substrate holder configured to hold a substrate, a monitoring device configured to monitor a polishing state of the surface of the substrate being polished, and a controlling device configured to change a polishing condition on the basis of the polishing state of the surface of the substrate being polished detected by the monitoring device.

A semiconductor memory cell array includes an elongated continuous active region. First and second pass transistors are formed in the elongated continuous active region and form part of first and second adjacent memory cells, respectively, of a column of memory cells in the array. An isolation transistor is formed in the elongated continuous active region between the first and second pass transistors and biased in an off state. First and second word lines are coupled to the gates of the pass transistors for applying a reading voltage. The array includes a differential bit line pair including first and second bit lines, a first logic value being encoded into the memory cells by connecting the pass transistors to the first bit line and a second logic value being encoded into the memory cells by connecting the pass transistors to the second bit line.

A method of utilizing dual-layer photoresist to form black matrixes and spacers on a control circuit substrate is provided. The dual-layer photoresist is composed of a layer of black resin and a layer of transparent photoresist. The black resin, of which optical density is greater than three, is mainly used to achieve the effect of black matrix. The transparent photoresist is mainly used to satisfy the needed cell gap between two transparent substrates.

A gate electrode is formed on a substrate via a gate insulating film. The gate insulating film includes a high dielectric constant film containing a metal, oxygen and hydrogen, and a lower barrier film formed below the high dielectric constant film and containing a metal, oxygen, silicon and nitrogen.

A method of manufacturing a semiconductor device that forms laminate layers includes the steps of reducing contamination containing the single bond of carbon on at least one part of a surface on which the laminate films are formed by activated hydrogen before the laminate films are formed, and forming the laminate films on the surface on which the laminate films are formed.

Provided are a substrate temperature control method and a plasma processing apparatus using the method. The method includes: disposing a substrate on a placing table provided in a vacuum processing chamber; supplying a heat conduction gas between a rear surface of the substrate and the placing table; detecting a pressure of the heat conduction gas; comparing the detected pressure value with a set pressure value; controlling the supply of the heat conduction gas so that the detected pressure value becomes the set pressure value; and alternately repeating a first period where the set pressure value is set to be a first set pressure value that is higher than a low pressure value and equal to or higher than the lowest limit pressure value and a second period where the set pressure value is set to be a second set pressure value that is lower than the low pressure value.

An LCD panel includes a first substrate, a second substrate, a displaying medium and a sealing structure, wherein the second substrate is located at the side opposite to the first substrate and the displaying medium is located between the first substrate and the second substrate for displaying an image. The sealing structure is located between the first substrate and the second substrate to seal the displaying medium, wherein the sealing structure includes an inner wall, an outer wall and a sealant. The inner wall disposed surrounding the displaying medium and the outer wall disposed surrounding the inner wall together form a sealant-disposing space therebetween. The outer wall has a plurality of side wall holes and the sealant is disposed in the sealant-disposing space. In this way, the sealing structure is able to enhance the structure strength in a limited layout space and promote the process margin.

The present invention provides a polymerizable liquid crystal composition containing polymerizable liquid crystal compounds and a photoinitiator, wherein the photoinitiator has a light absorption band in a wavelength range of 280 to 400 nm; and at least one of the polymerizable liquid crystal compounds has a light absorption band in a wavelength range of 320 to 400 nm or a light-absorbing agent having a light absorption band in a wavelength range of 280 to 400 nm is contained. Thus, there is provided a material that can be cured in the air without replacing the atmosphere with an inert gas during irradiation with ultraviolet rays and that can achieve the characteristics required for a biaxial film, such as a sufficiently large front phase difference.

There are provided a magnetic tunnel junction structure and a method of fabricating the same. The magnetic tunnel junction structure includes a lower electrode, a lower magnetic layer pattern and a tunnel layer pattern, which are sequentially formed on the lower electrode. The magnetic tunnel junction structure further includes an upper magnetic layer pattern, a buffer layer pattern, and an upper electrode, which are sequentially formed on a portion of the tunnel layer pattern. The sidewall of the upper magnetic layer pattern is surrounded by an oxidized upper magnetic layer, and the sidewall of the buffer layer pattern is surrounded by an oxidized buffer layer. The depletion of the upper magnetic layer pattern and the lower magnetic layer pattern in the magnetic tunnel junction region can be prevented by the oxidized buffer layer.

A pattern is formed by coating a chemically amplified positive resist composition comprising a resin comprising acid labile group-containing recurring units and a photoacid generator onto a substrate, drying to form a resist film, exposing the resist film to high-energy radiation through a phase shift mask having a lattice-like array of shifters, PEB, developing to form a positive pattern, illuminating or heating the positive pattern to eliminate acid labile groups for increasing alkaline solubility and to induce crosslinking for imparting solvent resistance, coating a reversal film, and dissolving away the positive pattern in an alkaline wet etchant to form a pattern by way of positive/negative reversal.

A semiconductor memory device having self-aligned contacts, capable of preventing a short-circuit between contacts for bit lines and contacts for storage electrodes and improving a process margin, and a method of fabricating the same are provided. The semiconductor memory device having self-aligned contacts includes a plurality of gate electrode patterns arranged in parallel on a semiconductor substrate, in which a plurality of first spacers are formed along the sidewalls of the gate electrode patterns, a first interdielectric layer formed on the entire surface of a resultant in which the first spacers are formed, a plurality of bit line patterns arranged in parallel on the first interdielectric layer to be perpendicular to the gate electrode patterns, in which a plurality of second spacers are formed along the sidewalls of the bit line patterns, a plurality of contacts for bit lines self-aligned with the first spacers, a second interdielectric layer formed on the entire surface of a resultant in which the second spacers are formed, and a plurality of contacts for storage electrodes simultaneously self-aligned with the second and first spacers.