166 results about "Schematic" patented technology

The invention provides a radio frequency circuit schematic diagram-to-layout collaborative optimization method and system based on an AI model, and the method comprises the steps: building a mapping database from the geometric parameters of a passive device to corresponding electromagnetic characteristics through obtaining the geometric parameters of the passive device; based on a database, a corresponding AI agent model is trained for each passive device, through the AI agent models, millisecond-level model prediction is used for replacing time-consuming electromagnetic simulation to serve as design guidance, the calling frequency of calculation-intensive electromagnetic simulation is remarkably reduced, the layout parasitic effect is further considered in the schematic diagram design stage, and the design efficiency is improved. And a performance gap between a schematic diagram and a layout is effectively bridged. Then a target schematic diagram is obtained, passive devices in the target schematic diagram are automatically replaced based on a Bayesian optimization algorithm and an AI agent model, and the design period from the schematic diagram to a qualified layout is greatly shortened; by optimizing the layout effect in the schematic diagram design stage, it can be ensured that the simulation performance of the finally generated physical layout is consistent with a schematic diagram simulation result.

The invention relates to the field of electronic design automation (EDA), and provides an AMS circuit automatic design method using a large language model. The method aims at solving the problem that an existing AMS circuit design is insufficient in automation degree, and mainly comprises the steps that a schematic circuit diagram and text description are extracted from literatures, and a data set containing the schematic circuit diagram, a netlist and annotation information is constructed; performing connectivity detection on the schematic circuit diagram, and extracting a netlist; carrying out annotation processing to obtain annotation information; constructing a knowledge graph for storing circuit information; obtaining a design strategy by using a large language model, and describing a circuit architecture; according to the design strategy and the local annotation, relevant circuits and test platforms are retrieved, a complete circuit topology is assembled, and simulation is carried out; size optimization is carried out based on constraints, and a Bayesian optimization algorithm is used for solving; and if the initial topological structure cannot meet the performance target, carrying out topological reconstruction. According to the invention, the automation level and efficiency of analog and mixed signal circuit design are improved.

The invention discloses an integrated circuit layout design teaching assistance method, and relates to the field of integrated circuits, and the method comprises the steps: receiving a circuit diagram creation instruction, and generating a circuit diagram drawing interface according to the circuit diagram creation instruction; identifying types and connection relations of circuit devices in the circuit diagram drawing interface; according to the identified circuit device type and the connection relation, generating a corresponding circuit schematic diagram data structure by adopting a graph neural network GNN algorithm based on message passing; converting the schematic circuit diagram data structure into a layout data structure; the layout data structure comprises geometric parameters and layout position data of layout elements; and according to the layout data structure, generating a circuit layout by using a reinforcement learning algorithm based on a graph neural network. In view of low integrated circuit layout design efficiency in the prior art, the design efficiency is improved by constructing a multi-objective optimized Markov decision process, utilizing deep learning and reinforcement learning algorithms and the like.

The embodiment of the invention provides a schematic diagram standard module management method and an electronic device. The method comprises the following steps: configuring a version number for an uploaded schematic diagram standard module, and analyzing version attribute data and module design data of the schematic diagram standard module under a current version; under the condition that the schematic diagram standard module is determined to be not uploaded for the first time according to the version number, comparing version attribute data and design data of a current version and a previous version of the schematic diagram standard module to obtain a comparison result; and notifying a calling party of the schematic diagram standard module to perform version upgrading according to the comparison result. Through the embodiment of the invention, the problems that a schematic diagram standard module management method mostly depends on manual management, versions are disordered, and traceability is lacked in the prior art are solved, and the effect of improving the cooperation efficiency and standardization degree of IC design is achieved.

The invention relates to the technical field of schematic circuit diagram drawing, in particular to a schematic circuit diagram drawing method and device, electronic equipment and a storage medium, and aims at solving the problems that in the process of manually drawing a schematic circuit diagram, operation is tedious and time is wasted. The method comprises the steps of obtaining a circuit design requirement, and obtaining a first circuit module diagram and a second circuit module diagram according to the circuit design requirement; generating an XML file of the target circuit according to the first circuit module diagram and the second circuit module diagram; obtaining a netlist of the target circuit according to the XML file; and if the design condition meets the circuit design requirement, generating a schematic circuit diagram of the target circuit according to the netlist. According to the method, the schematic circuit diagram of the target circuit can be accurately drawn without tedious manual operation of designers, so that human resources are saved, the drawing time is obviously shortened, and the working efficiency is improved.

The invention discloses a method and a device for automatically examining correctness of a circuit schematic diagram differential network. According to the scheme, the method comprises the following steps: inputting a circuit schematic diagram in an EDIF200 standard format, analyzing a schematic diagram file, obtaining chip pins, resistance-capacitance-inductance and related electrical network data, and storing the data to a chip device information matrix PartU and a non-chip device information matrix Partmer. Thirdly, screening differential pins according to a set standard, and storing the differential pins into a matrix Difpin; then, splitting the matrix Difpin into a matrix Difpin1 and a matrix Difpin2, traversing to obtain a differential path, and storing the differential path into a matrix DiffNet1 and a matrix DiffNet2; afterwards, based on the matrix DiffNet1 and the matrix DiffNet2, the correctness and naming normalization of the differential network are examined, incorrect paths are stored in a Diffnocor matrix, and non-standard named paths are stored in the Diffnocor matrix. Finally, the paths in the two matrixes are converted into character strings, text description is added, and an inspection result is output.

The invention provides an electrostatic discharge structure robustness evaluation method and device, and belongs to the technical field of semiconductors, and the method comprises the steps: carrying out the layer-by-layer removal of a chip, carrying out the circuit analysis of the obtained layout information, obtaining a schematic circuit diagram, carrying out the section dyeing processing according to the schematic circuit diagram, and obtaining the geometric information, and detecting the electrostatic discharge structure to obtain PN region distribution information, performing TCAD simulation by using the layout information, the geometric information and the PN region distribution information, and determining the robust performance of the electrostatic discharge structure of the chip according to the obtained electrical characteristic information. According to the electrostatic discharge structure robustness evaluation method and device provided by the invention, an electrostatic discharge structure robustness evaluation means based on structure extraction and TCAD simulation is provided, and a device design manufacturer does not need to provide a schematic circuit diagram and layout of the electrostatic discharge structure and does not need to provide process parameters; and the robustness evaluation efficiency of the ESD structure of the semiconductor device is effectively improved.

The invention provides intelligent assistant software of a motor train unit and a fault diagnosis and disposal method thereof, and belongs to the technical field of railway transportation. Through cooperative work of the central control unit and multiple modules, intelligent closed-loop management of fault processing of the motor train unit is realized: the system can analyze HMI fault information in real time and automatically match an optimal maintenance scheme, and by combining three-dimensional space positioning, a dynamic circuit schematic diagram and a fault processing scheme, the fault positioning and processing efficiency is remarkably improved; through torque standard automatic pushing and visual guidance, the risk of manual operation errors is effectively reduced; the emergency response time is greatly shortened based on an automatic notification mechanism of a fault level and generation of a personalized disposal scheme; through intelligent linkage and data sharing among the modules, whole-process auxiliary decision support from fault discovery, diagnosis analysis to disposal implementation is formed, normalization and accuracy of maintenance operation are improved, and system performance is continuously optimized through historical data accumulation and adaptive learning.

There is described a driving action recommendation and collision warning device for a vehicle comprising a first onboard sensor 10 configured to receive images of an area in the vicinity of the vehicle from an image sensor and to detect obstacles in the received images; a second onboard sensor 20 configured to acquire structured data of the vehicle; a computing unit 30 configured to generate an image by converting the images received from an image sensor into a schematic representation comprising the obstacles detected by the first onboard sensor 10, an area of interest decision unit 40 configured to extract an area of interest from the image generated by the computing unit 30; a driver action prediction unit 50 unit configured to predict a possible future event based on the extracted area of interest and a driver action prediction model, an action recommendation unit 60 configured to output a driving action recommendation and / or a warning to a driver of the vehicle or a person in the vicinity of the vehicle when a predefined event is predicted.

The invention discloses a circuit netlist conversion method, a circuit netlist conversion control method and a circuit netlist conversion control device. The method comprises the steps that a circuit netlist is obtained and analyzed, netlist intermediate data are constructed, the netlist intermediate data comprise netlist element data and netlist topological data, the netlist element data are used for representing electrical parameters of circuit elements, and the netlist topological data are used for representing the connection relation of the circuit elements; converting the netlist element data into schematic diagram element data according to an element configuration rule of the target electronic design automation tool; determining position information of the circuit elements and routing information between the circuit elements based on the netlist topological data, and generating schematic diagram layout data adaptive to the target electronic design automation tool; and according to the schematic diagram element data and the schematic diagram layout data, generating a circuit schematic diagram file through the target electronic design automation tool. The circuit netlist conversion method has the technical effect of improving the circuit netlist conversion efficiency.

The invention provides an LVS rule detection method, apparatus and device, and a storage medium. The method comprises the steps of obtaining a to-be-detected layout netlist and a schematic diagram netlist; performing structured text representation on the to-be-detected layout netlist and the schematic diagram netlist, and performing cue word optimization operation to obtain target cue word information; searching an LVS rule related to the layout netlist to be detected and the schematic diagram netlist in a rule database according to the target cue word; and inputting the to-be-detected layout netlist, the schematic diagram netlist and the LVS rule into an LVS rule verification model to determine the consistency of the to-be-detected layout netlist and the schematic diagram netlist. By performing cue word optimization operation on the text representation of the layout netlist and the schematic diagram netlist, the pre-trained large language model can be guided to better understand the semantics of the design text, so that the performance of the LVS verification model is improved. The optimized cue word information can enhance the recognition capability of the model to the design rule, and ensures the adaptability of the model to the new layout design.

The invention discloses a method for improving upward fan-shaped deep hole blasting quality, and belongs to the technical field of fan-shaped deep hole blasting of underground metal mines. The method for improving the upward fan-shaped deep hole blasting quality comprises the steps that blast hole deflection measurement is conducted, specifically, after perforation is completed, the deflection angle and the deflection length of a single-row fan-shaped blast hole are measured through a hole measuring instrument, and a single-row fan-shaped blast hole deflection schematic diagram is drawn; the detonation mode of the middle blast holes is determined, and the number of the middle blast holes which are firstly detonated by the single-row fan-shaped blast holes is determined; determining blasting modes of the blast holes in the two sides and executing blasting operation. According to the method, the problems of high blasting boulder rate, poor blasting effect and low shoveling efficiency in the prior art when blast hole deflection exists in the fan-shaped deep hole of the underground mine are solved. According to the method, based on the deflection angle and the deflection length of the blast hole, the problem that the blasting boulder rate of the fan-shaped deep hole is high due to deflection of the blast hole is solved by adjusting different blasting modes of the blast hole.

The invention discloses a composite bearing load calculation method considering ferrule deformation. The composite bearing load calculation method comprises the following steps: step 1, enabling m rolling body rows to be equivalent to springs capable of bearing axial load, radial load and torque; constructing a non-rigid shaft system stress schematic diagram of the composite bearing; step 2, calculating the acting load on each inner ring according to the deformation of the mandrel; 3, calculating the Hertz contact deformation of the rigid ferrule under the loading condition; 4, calculating the contact deformation generated by the deformation of the ferrule; 5, solving the total radial deformation of the raceway contact considering the deformation of the ferrule; 6, calculating the load of the rolling body at the position by using the total deformation of the rolling body and the inner and outer ferrules; and 7, verifying the resultant force of each row of rolling bodies and the reliability of the external load borne by the bearing. According to the method, the acting load of each row of rolling bodies of the composite bearing is calculated, and load analysis is performed on the composite bearing under the condition of considering the deformation of the ferrule, so that a more accurate calculation result is obtained and applied to bearing design.

The invention relates to the field of PCB design, in particular to a PCB design method and a PCB design interaction system. The PCB design method is applied to the PCB design interaction system, the system comprises a database, components of different models and functional attribute data of all the components are stored in the database, module schematic diagrams capable of achieving some specific functions are stored in the database, and the database comprises a schematic diagram database for storing schematic diagrams and a PCB database applied to PCB design. And the logic framework of the schematic diagram database and the logic framework of the PCB database are in a corresponding interconnection relationship. According to the method, the schematic diagram corresponding to the product is acquired, the module schematic diagram corresponding to the schematic diagram is acquired in combination with the database, a designer is helped to design the layout of each module according to the layout of the module schematic diagram pre-stored in the database, and the automatic layout of the PCB is designed by adjusting the layout of the modules, so that the design efficiency is improved on the premise of ensuring the functions of the product. And the PCB design efficiency of a designer is greatly improved.

A method for generating and modifying engineering schematics is provided. The method includes receiving a natural language input via a user interface, the input containing a user intent to perform operations on an engineering schematic. The method generates a structured representation of the input using a language model, identifying components, actions, and attributes. Knowledge graph queries are generated based on this representation, compatible with a standardized ontology. These queries are executed to retrieve component, connection, and attribute data from the knowledge graph. A system representation of the schematic is generated using the retrieved data and specified actions. The method then renders a visual representation of the engineering schematic based on this system representation and outputs it via the user interface. This approach allows for intuitive schematic modification using natural language processing and knowledge graph technologies.

The invention discloses a traffic regulation knowledge graph enhanced driving decision reasoning question and answer method and device, relates to the technical field of traffic scene understanding of an auxiliary driving system in intelligent traffic, and aims at an online simulation driving test scene. The semantic confusion problem of the traffic schematic diagram under the condition of limited sample scale is solved, and the interpretability of traffic schematic diagram questions and answers is enhanced. The method comprises the following steps: receiving a to-be-answered traffic schematic diagram problem input by a user by using electronic equipment; inputting the to-be-answered traffic schematic diagram question into a trained traffic schematic diagram driving decision inference question and answer model to output an inference answer; and displaying the reasoning answer by using the electronic equipment so that a user can refer to the reasoning answer to complete a driving decision. According to the method, the accuracy of traffic schematic diagram questions and answers is guaranteed under the condition that semantic confusion exists in the samples, and good technical support is provided for an auxiliary driving system, automatic driving and other applications in an intelligent traffic scene.

The present invention discloses an automatic layout generation method. First, for a process library PDK specified by an analog circuit or a mixed-analog circuit, a cell library compiler AcellGen is used to generate the minimum analog unit Acell of each circuit component required for automatic layout. Then, each parameterized unit Pcell in a schematic diagram constructed using the parameterized unit Pcell is replaced with the corresponding minimum analog unit Acell. Then, based on the currently obtained schematic diagram, a corresponding circuit netlist is generated, and the Acell used in the schematic diagram is placed in the same schematic to extract a GDS file. Finally, based on the circuit netlist, GDS and the minimum analog unit of each circuit component required for automatic circuit layout, an automatic place and route tool (PNR) is used to perform final layout generation. The method has the advantages that it can be used for the layout design of analog circuits or mixed-analog circuits, the layout area is small, and no manual intervention is required when performing layout design on analog circuits or mixed-analog circuits, so the efficiency is high.

The invention discloses a schematic circuit diagram generation method and system based on an action mask and a diagram neural network, and the method comprises the steps: 1, carrying out the preprocessing of a circuit netlist, and obtaining a circuit netlist topological matrix; 2, connecting a preset pin state and the number of the arranged units to obtain features after connection; 3, inputting a preset canvas state, the circuit netlist topological matrix and the connected features into the intelligent agent to obtain a layout and wiring result; and 4, constructing an action mask according to a layout wiring result, obtaining a predicted action by using the action mask, and generating a schematic circuit diagram according to the predicted action. According to the method, the schematic circuit diagram can be automatically generated, diagram information in a circuit netlist is concerned, and selection of invalid actions is avoided through action masks.

The invention relates to a method and device for automatically generating a schematic circuit diagram sketch and a storage medium, and belongs to the technical field of circuit design, and the method comprises the following steps: extracting target parameters of netlist information by using a script function of circuit drawing software and a file type of the netlist information of a circuit board; and based on the target parameters, generating a schematic circuit diagram sketch containing the network labels and the annotation characters in circuit drawing software. According to the method for automatically generating the schematic circuit diagram sketch provided by the invention, the file type of the netlist information is determined according to the netlist information of the circuit board, and the target parameters are accurately extracted according to the file type by utilizing the script function of the circuit drawing software, so that errors possibly introduced by manual operation are avoided; according to the method, the schematic circuit sketch containing the network label and the annotation characters is generated in the circuit drawing software according to the target parameters, the schematic circuit sketch easy to read can be quickly generated, and compared with traditional manual drawing, time and labor cost are greatly saved.

This application discloses a method, apparatus, equipment, and medium for generating downloadable engineering files, relating to the field of nuclear power technology. The method includes: reading a PID control design schematic diagram drawing file to be converted; identifying the correctness and completeness of the PID control design schematic diagram drawing file; if the PID control design schematic diagram drawing file is correct and complete, converting the PID control design schematic diagram to be converted based on the mapping relationship between each symbol in the symbol library of the PID control design schematic diagram drawing file read from the database and the symbols in the symbol library of the engineering configuration software, to obtain an engineering configuration file. This application can improve the accuracy of generating downloadable engineering files in nuclear instrumentation and control systems, increase the efficiency of engineering configuration implementation, and shorten the engineering configuration implementation cycle.

The invention discloses a structure schematic diagram of a clamp and a steel plate spring assembly, the clamp is configured to connect at least two adjacent steel plate spring pieces, the clamp comprises a connecting body, the connecting body is configured to be connected to one steel plate spring piece, and a clamping groove is formed in the connecting body relative to the other adjacent steel plate spring piece; the opening end of the clamping groove is gradually reduced in the direction close to the other adjacent steel plate spring piece and used for being connected with the other adjacent steel plate spring piece, and the cross section of the connecting body comprises a first steel plate layer, a first rubber layer and a second steel plate layer which are sequentially arranged from inside to outside and connected with one another. The problem that when the impact force of the road surface on the wheel is transmitted, transverse movement and longitudinal movement exist between the multiple steel plates, and consequently friction noise is generated can be effectively solved.

Disclosed is an improved approach to identify and visualize relevant changes that are made between an earlier schematic and an updated schematic. Both the old schematic and the updated schematic are presented into separate interface windows in conjunction with the layout design. Any changes between the schematics that are pertinent to the electronic design can be highlighted within the interface windows to permit the layout designer to properly appreciate any changes that are relevant to the layout.

This item is a retainer that holds the weatherstrip that seals the floor and the lower edge of the panel, as shown in the "Reference Diagram Showing Usage".

The invention provides a schematic circuit diagram comparison method and device, electronic equipment and a storage medium, and relates to the technical field of circuit design, and the method comprises the steps: converting a conventional schematic circuit diagram comparison idea, converting circuit elements into graph units, and determining a boundary region of the comparison circuit elements by comparing the shape description information of the graph units, a reference circuit schematic diagram is obtained, a target reference graph unit is determined in a boundary area in the reference circuit schematic diagram, difference information corresponding to reference circuit elements is determined by comparing a contrast graph unit with the target reference graph unit, the difference information is overlaid on the reference circuit schematic diagram for visual display, and the comparison process is completed in a number-form combination mode. The difference information can be visually displayed, the comparison efficiency and accuracy of the schematic circuit diagram are improved, the user experience is improved, a user can rapidly master the difference information of the reference schematic circuit diagram and the contrast schematic circuit diagram, and then the design quality and development efficiency of the user are improved.

A rail flaw detector is configured for locating flaws in rails of a railroad track and for use with a vehicle travelling on the railroad track. The detector includes at least one signal applicator configured for applying ultrasonic signals to the rail and for receiving return signals; a mechanical subsystem connected to the applicator and to the vehicle and configured for maintaining the at least one signal applicator in operational position on the track. A human- machine interface is connected to the at least one signal applicator, is configured to control the detector and to monitor sensed rail condition. In one embodiment, the human-machine interface includes a schematic display of the rail being monitored and at least one touch screen control for controlling the mechanical subsystem and the at least one signal applicator.

The invention discloses a method for intelligently recommending typesetting and layout of a schematic diagram of an automobile circuit system, which relates to the technical field of circuit diagram development, and specifically comprises the following steps of: screening a schematic diagram of a circuit system of a representative automobile model based on historically developed automobile models, and judging and marking core position components in the schematic diagram of the circuit system of the representative automobile model; creating a general circuit system schematic diagram standard name in the brand, and based on the circuit system schematic diagram standard name and a name set of each core position component in the circuit system schematic diagram. According to the method for intelligently recommending the typesetting layout of the schematic diagram of the automobile circuit system, the schematic diagram of the system can be quickly generated through an algorithm and calculation, so that the drawing efficiency is remarkably improved, the development speed of the automobile circuit diagram is accelerated, and the layout of the schematic diagram of the automobile circuit system is improved by reducing the time and effort of manual drawing. According to the automatic drawing method of the system schematic diagram, the development cost is reduced, and a cost-effective solution is provided.

The application discloses a kind of light purse seine fishing boat energy-saving optimization method and system based on photovoltaic regulation, and the energy-saving optimization method and system are as follows: obtaining photovoltaic power output parameters and fish gathering lamp group response data of the fishing boat, identifying the photovoltaic control terminal of each independent power supply circuit corresponding to the fish gathering lamp group, constructing the control terminal circuit schematic diagram and power monitoring network thereof; monitoring the power generation of the photovoltaic system and the real-time power consumption through the network, predicting the total available energy budget in the night operation stage; at the same time, combining the fish detection data of the planned operation area to determine the expected operation time of the fish gathering lamp; finally, according to the total available energy budget and the expected operation time, the dynamic lighting strategy of the night fish gathering lamp is constructed to realize the efficient use of photovoltaic energy and the energy-saving optimization of the operation process, effectively reducing the consumption of traditional energy, improving the operation economy and environmental protection of the light purse seine fishing boat.

The invention belongs to the technical field of automatic detection planning, and particularly relates to a gas path detection automatic planning method based on a knowledge graph. Comprising the following steps: acquiring gas path information through a gas path schematic diagram and converting the gas path information into a gas path knowledge graph; analyzing a main gas path based on the gas path knowledge graph, and performing main gas path detection planning; analyzing a main gas path based on the gas path knowledge graph, and performing branch gas path detection planning; and outputting the main gas path detection planning information and the branch gas path detection planning information in a unified format. According to the method, the gas path detection planning problem is solved through an automatic detection planning algorithm, and the gas path detection guidance scheme is automatically generated by using the information obtained from the gas path schematic diagram.

The invention relates to the technical field of intellectualization and industrial software, in particular to a radio frequency circuit programming method and system based on artificial intelligence collaborative design, and the method comprises the steps: generating an initial schematic diagram and codes; training a circuit generation model; predicting candidate code snippets; simulating and screening the accepted fragments; displaying the accepted fragment and counting the operation frequency; adjusting the model based on the operation; performing loop iteration to target generation, and training a circuit generation model by using preprocessed data through close combination of a design index, an initial circuit schematic diagram and a structured code so as to realize intelligent prediction of a radio frequency circuit code snippet; high-quality code snippets are dynamically screened in combination with performance simulation results, and then a self-adaptive feedback mechanism is formed based on dragging frequency and parameter modification frequency data in user interaction. The problems of low design efficiency and high error rate caused by weak generalization ability of a circuit design result due to model static training and lack of performance closed-loop verification are effectively solved.

The invention provides a reservoir area soil bank slope bank collapse width prediction method, and relates to the technical field of water conservancy and hydropower engineering, and the method comprises the following steps: measuring the current terrain section of a bank slope, obtaining the bank slope height, slope angle and bank slope terrain line before reservoir water storage, and obtaining the characteristic water level of reservoir water storage; drawing an engineering geological profile map; the bank slope soil body is sampled, and physical and mechanical indexes of the bank slope soil body are measured through a test; and drawing a bank collapse width schematic diagram, and predicting the bank collapse width of the bank slope. According to the method, the four-section method bank collapse prediction model is established, the influence of the water level amplitude variation area and stormy waves on the stability of the reservoir bank is fully considered, the problem that the actual bank collapse width is inconsistent with the prediction result after water storage of the reservoir in the prior art is solved, and meanwhile the method has the advantages of being simple, easy to implement, high in reliability and accurate in prediction result.