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6 results about "Phase time" patented technology

Low-power-consumption control method and system for fuze chip

The invention relates to the technical field of integrated circuit low-power-consumption control, and discloses a low-power-consumption control method and system for a fuze chip. The low-power-consumption control method of the fuze chip is applied to chip control equipment, and specifically comprises the following steps: S101, detecting the working state of a functional module electrically connected with the fuze chip within a preset stage time, and judging whether the current state of the functional module is an idle state or not; and S102, if the function module is in the working state, monitoring the operation parameters of the function module, and determining whether the operation parameters of the function module have threshold value changes within the preset stage time. Through precise detection of the idle state of the functional module and delay protection and state verification before the clock is closed, it is ensured that necessary data storage and state synchronization are completed before the functional module enters the low-power-consumption state, system faults caused by sudden interruption of clock signals are avoided, and meanwhile the low-power-consumption requirement and operation reliability are considered.
Owner:BEIJING VIAGRA TECHNOLOGY CO LTD

Multi-shot time-to-digital converter and time-measurement device

The present invention relates a multi-shot time-to-digital converter and a time-measurement device. The multi-shot time-to-digital converter includes a time-to-digital conversion circuit and a timing control circuit. The timing control circuit is coupled to the time-to-digital conversion circuit and sending a start signal to the time-to-digital conversion circuit multiple times for measuring a time interval corresponding to the start signal. The time-to-digital conversion circuit obtains a fine phase time based on a plurality of clock signals to measure the time interval and provides a plurality of time-to-digital codes for digital processing. The clock signals have different phases. The time-to-digital codes are further processed to obtain the time-to-digital codes with better resolution.
Owner:SEER MICROELECTRONICS INC

Scheduling and beam design in JPTA

Methods and apparatus for joint scheduling and beam design in a phase-time array (JPTA). In another embodiment, a method for operating a base station (BS) is provided. The method includes identifying a set of user equipments (UEs) to schedule, a plurality of resource blocks (RBs), and a UE beam map. The UE beam mapping maps one or more of the plurality of beams to one or more UEs of the set of UEs. The method also includes, for a UE in the set of UEs, allocating one or more RBs to the UE from the plurality of RBs based on the UE beam map and the beam gain of the one or more RBs in the direction of the UE. The method also includes determining a JPTA beam for the UE. The method also includes transmitting scheduling information indicating the allocated one or more RBs and the determined one or more JPTA beams.
Owner:SAMSUNG ELECTRONICS CO LTD

Phase compensation method for multifunctional electric power digital display instrument

ActiveCN119596218BElectrical measurementsPhase timeFuzzy reasoning
The application discloses a phase compensation method of a multifunctional electric power digital display instrument, relates to the technical field of phase compensation, and is used for improving the incompatible problems of phase differences of various detection circuits in the multifunctional electric power digital display instrument, and comprises the following steps: detecting a correction environment, obtaining a normal power frequency period of a reference signal, setting a power frequency locking experiment in the correction environment to determine the power frequency of the reference signal, calculating the power frequency period according to the power frequency of the reference signal, setting the number of oversampling, calculating a sampling interval by using a geometric mean method according to the power frequency period and the number of oversampling, calculating a sampling point interval difference after the sampling interval is determined, obtaining historical data, comprehensively using the historical data and the sampling point interval difference to select direct compensation or time delay adjustment by using fuzzy reasoning, detecting channel noise when the time delay adjustment is selected, collecting phase differences of various channels, converting the phase differences into phase time differences, and completing phase compensation according to the phase time differences.
Owner:ANHUI PUERDUN ELECTRIC CO LTD

A multi-stage time synchronization method for structural health monitoring array

This invention discloses a multi-stage time synchronization method for a structural health monitoring array, comprising: preprocessing a floor acceleration signal with unknown time delay; calculating the initial delay of the floor acceleration signal based on cross-correlation; calculating the residual time delay of the floor acceleration signal based on wave propagation constraints; calculating the residual time delay of the floor acceleration signal based on cross-spectral phase; reconstructing the synchronized floor acceleration signal using the initial delay, residual time delay, and residual time delay; calculating the displacement response through integration; and outputting the inter-story displacement. This invention divides the synchronization process into three sequential stages: the first stage rapidly reduces the large time delay to the order of several vibration periods; the second stage further refines the process, controlling the residual time delay within one period; and the third stage utilizes phase information to achieve high-precision synchronization while limiting the frequency range to avoid the influence of high-frequency noise.
Owner:INST OF ENG MECHANICS CHINA EARTHQUAKE ADMINISTRATION

Frequency agility frequency synthesizer system capable of keeping phase consistency

The invention discloses a frequency agility frequency synthesizer system capable of keeping phase consistency, relates to the technical field of frequency synthesis, and forcibly constrains an originally asynchronous and random frequency updating request to a determined time node generated by a frequency dividing circuit. And the frequency of the synchronous trigger signal becomes a common divisor of all preset output frequencies, namely the output frequency and the trigger frequency are in an integral multiple relationship. No matter when the system sends out a frequency hopping instruction, the actual frequency switching action is always standardized at the determined zero-phase time points, so that the phase randomness introduced due to uncertain instruction arrival time is eliminated, the phases of output signals are strictly consistent in any two processes of hopping from the same frequency to the same frequency, and the frequency hopping efficiency is improved. And phase maintenance and repeatability are realized.
Owner:成都益为创科技有限公司