646results about How to "Reduce Harmonic Distortion" patented technology

A single phase power supply module for electric arc welders and plasma arc cutters comprising: a single phase input stage; positive and negative output terminals; a full wave rectifier connected to the input stage for rectifying the single phase voltage at the input stage; a buck converter type power factor correcting circuit for controlling current flow from the input stage to the rectifier, which buck converter has an output capacitor regulated to an intermediate voltage in the range of 100-150 volts; and, a high speed DC to DC converter having an internal transformer coupling applying voltage across the output terminals and means for regulating the applied voltage to an output voltage in the range of 0-113 volts. The module is universal and several can be connected in parallel, in series or to switch networks to construct several welders or cutters.

The purposes of the devices described herein are to provide an LED lighting device capable of efficiently and economically emitting light having a selectable color temperature or a warm-on-dim feature when driven with AC power and to provide LED lighting devices which have an improved power factor and a reduced total harmonic distortion when powered with AC power.

A class D amplifier uses a summation of two or more PWM output stages to achieve an increased dynamic range and improved linearity for any given clock operating speed. The amplifier accepts a digital data stream as its input, such as from a compact disk, or other compatible media, at a data rate, Fa, that could be 44.1 kHz, 96 kHz, or any other rate appropriate for audio data. In the preferred embodiment, the input audio data resolution, N bits, would be split into two data samples, of J and K.Internal switching frequency, Fs, switches the PWM with an over sampling factor M, where Fs=M*Fa. The time resolution of the PWM is determined by a precision oscillator that operates at Fc=Fs*(max(J,K)-log2(M)+1).The J most significant bits would be routed to a power PWM stage operated at a DC voltage of VHI. The K least significant bits are routed to a finesse PWM stage operated at a DC voltage of VLO.The ratio of VLO to VHI will be appropriate for the ratio of K and J so the summation of the power PWM stage and the finesse PWM stage will provide the full range of N bits. This summation is accomplished with a low pass filter and time-division multiplexing of the two PWM stages.A micro controller (MCU) is used to apply a sample packet distribution algorithm to provide more resolution by reducing quantization noise in the audio band of interest. The MCU is also used to calibrate the VLO or VHI, or to calibrate the PWM timing of the two PWM stages to achieve appropriate performance.

This invention is an improvement to a multi-level, multi-phase power supply. Typically, in such power supplies, each of the phases has one or more power cells providing a pulse width modulated output. In such a configuration, when the transition of the pulse width modulated outputs of corresponding power cells in different phases occurs simultaneously, a double step in voltage is observed on the output of the power cell. This invention is an improvement over the prior art wherein the transitions of the outputs of the power cells are controlled to avoid simultaneous transitions.

A high voltage inverter is provided which includes a plurality of k-level flying capacitor H bridge modules, k being greater than 2, each having a positive dc terminal, a negative dc terminal, and two ac terminals, a connecting unit for connecting said ac terminals of said plurality of k-level flying capacitor H bridge modules in series to form a cascading set of modules, and a dc source connected to an ac source and having a transformer, a rectifier rectifying an output voltage of said transformer, and a capacitor connected between the positive and negative dc terminals.