87 results about "Reference circuit" patented technology

The application belongs to the technical field of electronic circuits, and particularly relates to a low-temperature-drift high-PSRR op-amp-free bandgap reference circuit, which comprises MOS tubes M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13, M14, M15, triodes Q1, Q2, Q3, resistors R1, R2 and R3; compared with the prior art, the circuit is an op-amp-free bandgap reference circuit, which avoids the influence of op-amp offset voltage on reference voltage and improves the accuracy of the reference voltage; the temperature coefficient of the reference voltage can be well adjusted by adjusting the resistance coefficient, so that the low-temperature-drift reference voltage is realized.

The invention provides a three-dimensional stacked packaging substrate device and a manufacturing method, and relates to the technical field of semiconductor packaging, and the three-dimensional stacked packaging substrate device comprises a substrate which is a multi-layer stacked substrate; a drop point area corresponding to the vertical interconnection terminal is provided with a backflow channel, and the backflow channel comprises a grounding via hole array or a grounding metal ring surrounding the drop point area and is used for providing a continuous reference loop for a high-speed signal transmitted through the vertical interconnection terminal. Providing a core plate, carrying out multi-layer lamination, and manufacturing a backflow channel in a corresponding vertical interconnection terminal drop point area; manufacturing blind holes or micro holes in the substrate to realize interlayer interconnection; the substrate is divided into a high-speed digital area, an analog / radio frequency area and a power supply area according to functions for partition wiring, and the ground plane of each partition is kept continuous; a decoupling device is arranged at the near end of the vertical interconnection drop point or the chip power supply inlet. The system has the beneficial effects that low reflection, low jitter and low bit error rate of high-speed signal transmission are realized, and the electromagnetic compatibility and the working reliability of the system are improved.

This invention discloses a bandgap reference circuit structure, belonging to the field of integrated circuit design technology. The circuit structure includes a bandgap reference core circuit, a chopper-equipped operational amplifier (op-amp), a bandgap reference startup circuit, a temperature-to-absolute-temperature (PTAT) bias current source, and a current source startup circuit. By optimizing the bandgap reference core circuit architecture, combining chopper technology to eliminate the effects of offset voltage and device mismatch, and with the matching startup circuit and low-voltage-adaptive bias current source, the reference voltage is essentially independent of the op-amp input offset voltage, improving circuit symmetry performance and load dynamic response speed. Furthermore, in most common complementary metal-oxide-semiconductor (CMOS) processes, it only requires a power supply voltage of 2V or higher to operate stably, significantly improving the accuracy and stability of the reference voltage.

The utility model discloses a kind of under-voltage latching circuits with recovery time, including power supply voltage detection module and recovery time generation module;Power supply voltage detection module is composed of sampling circuit and first comparator circuit, and recovery time generation module is composed of charge pump circuit and second comparator circuit;The under-voltage latching circuit with recovery time further includes band gap reference circuit and logic circuit.The utility model can realize accurate recovery time.Through logic circuit, the voltage of first comparator and second comparator output is calculated, can avoid under-voltage latching during power-on process of power supply to generate false inversion signal.In addition, as the case shown in the preceding figure 3, recovery time generation module can effectively avoid the situation of power fluctuation, and more effectively protect the circuit.Recovery time can be adjusted by increasing charging current control circuit.Low cost, easy to design, easy to copy, smaller layout area, low cost.

This invention discloses a startup circuit for a bandgap reference circuit. The startup circuit includes an inverter and first and second switches. A second switch is placed in a second resistor path between the negative input terminal of the operational amplifier in the main circuit of the bandgap reference circuit and ground. Upon power-up, before the reference voltage rises to the switching voltage of the inverter in the startup circuit, the first switch is turned on, pulling down the output of the operational amplifier. The second switch is turned off, making the voltage at the negative input terminal of the operational amplifier higher than the voltage at the positive input terminal, thus collaboratively pulling down the output of the operational amplifier. After the reference voltage rises to the switching voltage of the inverter, the first switch is turned off, and the second switch is turned on. This invention eliminates the simplification of the input state of the operational amplifier during power-up and the resulting competition between pull-up and pull-down voltages at the output terminal, thus eliminating the oscillation or even failure to establish the reference voltage. Furthermore, it ensures that the temperature coefficient of the reference voltage remains unaffected after power-up.

This application provides a read circuit for a magnetic storage chip and an MRAM. The read circuit includes: a storage circuit, including a memory bit under test and a first transistor, the memory bit under test including a first free layer and a first reference layer; a reference circuit, including a reference memory bit and a second transistor, the reference memory bit including a second free layer and a second reference layer; a first interconnect line, including a first sub-connection line and a second sub-connection line, the first sub-connection line being connected to the first free layer; a second interconnect line, including a third sub-connection line and a fourth sub-connection line, the third sub-connection line being connected to the first reference layer through the first transistor; a first interconnect line, the second sub-connection line being connected to the second reference layer through the first interconnect line and the second transistor; and a second interconnect line, the fourth sub-connection line being connected to the second free layer through the second interconnect line. This application solves the problem in the prior art where designing two sets of read logic circuits in a single chip results in an excessively large chip area and high read power consumption.

A storage device includes a memory cell array and a peripheral circuit region that at least partially overlaps with the memory cell array in a first direction. The peripheral circuit region includes a bias voltage generation circuit and a leakage current control circuit. The bias voltage generation circuit is configured to generate a bias voltage and provide the bias voltage to a separate circuit within the peripheral circuit region. The leakage current control circuit is configured to generate a bias voltage control signal and use the bias voltage control signal to control the amplitude of a leakage current generated in the peripheral circuit region by the bias voltage. The leakage current control circuit includes: a test circuit configured to generate a test voltage based on the bias voltage; a reference circuit configured to generate a reference voltage based on a power supply voltage; and a differential amplifier configured to generate the bias voltage control signal by comparing the test voltage with the reference voltage.

The application relates to the technical field of circuits, and discloses an LDO circuit, a chip and electronic equipment. The LDO circuit comprises a current bias circuit, a driving circuit, a reference circuit and a power circuit; the current bias circuit comprises a current unit and a control unit, a first end of the current unit is used for being connected with a first end of the reference circuit, a first end of the power circuit and a power supply end, a second end of the current unit is connected with a first end of the control unit, a second end of the control unit is connected with a first end of the driving circuit, and a third end of the control unit is connected with a second end of the power circuit; a second end of the driving circuit is connected with a second end of the reference circuit; a third end of the power circuit is connected with an output end of the LDO circuit; wherein when a voltage difference between a power supply voltage of the power supply end and an output end voltage is less than a first voltage threshold, the driving circuit is in a conduction state, and the current unit outputs a fixed bias current to the control unit. In this way, the battery discharge speed can be reduced, and damage to the battery can be reduced.

This invention provides a radiation-hardened LDO with base current balancing and drive enhancement functions, comprising: a bandgap reference circuit, a base current balancing circuit, an error amplifier circuit, a bias circuit, a startup circuit, a power drive circuit, and a drive enhancement circuit. The base current balancing circuit balances the bandgap reference current, ensuring that the bandgap current remains equal before and after irradiation. The drive enhancement circuit dynamically enhances the load-carrying capacity of the power transistor, ensuring its load-carrying capacity even after irradiation reduces the power transistor's current gain, thus guaranteeing that the output current range is unaffected by irradiation. From a circuit design perspective, this invention utilizes a simple and efficient circuit structure to achieve radiation hardening of the LDO at a relatively low cost, making the LDO circuit insensitive to the degradation of current gain of bipolar devices after irradiation, maintaining a stable output voltage and output load-carrying capacity.

The application discloses a low-power-consumption temperature sensor circuit, which comprises a temperature sensing core circuit, a starting circuit, a current reference circuit and a buffer circuit; the temperature sensing core circuit is composed of a band gap reference and a positive temperature current generating circuit, and generates a voltage proportional to temperature; the starting circuit is composed of a Schmitt trigger starting circuit and a band gap reference starting circuit, and prevents latch effect from occurring when power is applied; the current reference circuit adopts a voltage-controlled current source to provide stable and load-independent current; and the buffer circuit adopts a source follower connection method of two-stage operational amplifiers, the first stage adopts a differential-to-single-end diode to load a common source amplifier structure, and the second stage adopts a current source to load a common source amplifier structure. The application does not need complex circuits such as ADC to process temperature data, and only needs a band gap reference and a positive temperature generating circuit to realize temperature detection of a chip, so that the design difficulty of the circuit is reduced, and the power consumption of the circuit is lowered.

This application discloses a voltage control circuit and system for a bipolar electrostatic chuck. The voltage control circuit includes a reference circuit, a voltage output circuit, a positive sampling adjustment circuit, a negative sampling adjustment circuit, and a selection control circuit. The positive sampling adjustment circuit samples the positive output voltage to generate a first sampling voltage, and generates a first adjustment signal when the sum of the first sampling voltage and the reference voltage is not equal to zero. The negative sampling adjustment circuit samples the negative output voltage to generate a second sampling voltage, and generates a second adjustment signal when the sum of the second sampling voltage and the reference voltage is not equal to zero. The selection control circuit selects between the first and second adjustment signals and outputs a target adjustment signal, so that the voltage output circuit adjusts the positive or negative output voltage based on the target adjustment signal. This voltage control circuit improves the stability of the output voltage through closed-loop control of sampling, comparison, and adjustment, thereby improving the adsorption effect of the bipolar electrostatic chuck.

This invention claims protection for a high-order temperature-compensated bandgap reference circuit based on BCD technology, comprising a bias circuit, a temperature compensation circuit, and a first-order bandgap reference circuit. This invention utilizes the difference between the base-emitter voltages of two NPN transistors and the base-emitter voltage of NPN transistor Q3 to generate positive and negative temperature coefficient currents across resistors R1 and R2, respectively, providing bias to the temperature compensation circuit. The invention uses the base-emitter voltages of NPN transistors Q7 and Q8, along with clamping technology from amplifier A1, to generate a first-order bandgap reference voltage. Furthermore, it employs linear loop technology and base-emitter clamping technology from NPN transistors Q4 and Q5 to generate a high-order temperature nonlinear current to compensate for the high-order temperature nonlinearity of the first-order bandgap reference voltage, improving the temperature drift performance of the bandgap reference voltage, thereby realizing a high-order temperature-compensated bandgap reference circuit based on BCD technology.

The application discloses a low-temperature-drift high-precision segmented compensation bandgap reference circuit for information storage, which comprises the following steps: according to a power supply voltage, a starting circuit is used to drive a bandgap reference core circuit to get rid of a degenerate state and is turned off after the bandgap reference core circuit is established to reduce power consumption; according to the bandgap reference core circuit, a first-order bandgap reference core module is used to generate a first-order bandgap reference voltage; and according to the first-order bandgap reference voltage, a segmented compensation circuit is used to carry out temperature coefficient compensation in a low-temperature section and a high-temperature section respectively, and a low-temperature-drift high-precision reference voltage is output. The application can fundamentally solve a series of negative effects caused by insufficient performance of a DCDC converter on output precision, temperature stability and light load efficiency of the DCDC converter, and finally realizes a high-performance and high-reliability power management system.

An integrated circuit includes a bandgap reference circuit configured to generate, from a digital chip supply voltage, a reference voltage and a proportional-to-absolute temperature (PTAT) voltage. A voltage-to-frequency (VTF) readout circuit to receive the reference voltage and the PTAT voltage as inputs. The VTF readout circuit includes sets of switched capacitors that operate as a voltage divider. The capacitors of the sets of switched capacitors are selectively charged by the PTAT voltage and generate a feedback voltage. A voltage-controlled oscillator (VCO) is driven by a difference between the feedback voltage and the reference voltage and generates a VCO clock. A clock generator generates a feedback clock based on the VCO clock. First switches of the sets of switched capacitors are controlled by the feedback clock.

This invention discloses a low-supply-voltage bandgap reference circuit, comprising: a startup circuit, a positive temperature coefficient current generating circuit, and a bandgap voltage core generating circuit. The startup circuit is electrically connected to the positive temperature coefficient current generating circuit and is used to output an initial bias current to the positive temperature coefficient current generating circuit. The positive temperature coefficient current generating circuit is electrically connected to the bandgap voltage core generating circuit and is used to output a positive temperature coefficient current and mirror the positive temperature coefficient current to the bandgap voltage core generating circuit. The bandgap voltage core generating circuit is used to receive the positive temperature coefficient current, and based on the superposition of the positive temperature coefficient current and the negative temperature coefficient voltage of the transistor, output a low-temperature drift reference voltage and simultaneously output a zero-temperature coefficient current. This low-supply-voltage bandgap reference circuit has the beneficial effects of fast startup speed and excellent low-temperature drift performance.

This invention relates to the field of power electronics technology, and more particularly to a design method for an adjustable high-precision sampling signal monitoring and protection circuit system. The technical solution includes the following steps: threshold setting, by adjusting the first adjustable resistor RP1 in the signal input and reference module to set the maximum output voltage of a reference circuit; and by adjusting an external knob JP3 to control the voltage input to the first operational amplifier to obtain a pre-set threshold electrical signal. This invention, through step-by-step adjustment of the adjustable resistor and external knob, in conjunction with a precision reference source, instrumentation amplifier, operational amplifier comparison channel, and isolation optocoupler, achieves precise threshold tuning, flexible matching of sampling signals, and reliable isolated output. The design method provides a quantitative calculation formula, solving the problems of poor reference stability, low threshold tuning accuracy, insufficient signal matching, and weak isolation and anti-interference capabilities in existing technologies.

Embodiments disclosed herein relate to reference signals produced by integrated circuits. In an example, a reference circuit is provided. The reference circuit includes a first transistor, a second transistor, and an operational amplifier. The first transistor includes an input configured to couple to a voltage supply, an output coupled to a first resistor and a second resistor, and a control coupled to an output of the operational amplifier. The first resistor is coupled in series with a third resistor, and the second resistor is coupled in series with the second transistor. The second transistor includes an input and a control coupled with the second resistor and an output coupled to ground. The operational amplifier includes a first input coupled between the first and third resistors and a second input coupled between the second resistor and second transistor.

The application belongs to the technical field of integrated circuits, and particularly relates to an ultra-low-power and ultra-low-voltage op-amp-free bandgap reference circuit, which comprises a bandgap core circuit, a current mirror negative feedback circuit and a frequency compensation circuit; the bandgap core circuit is used for generating a PTAT current proportional to absolute temperature, and outputting a bandgap reference voltage with zero temperature coefficient by using an emission junction voltage with a negative temperature coefficient; the current mirror negative feedback circuit is used for providing a bias current for the circuit, and forming a negative feedback loop based on voltage variation in the bandgap core circuit to stabilize the working voltage of the bandgap core circuit; and the frequency compensation circuit is used for frequency compensation of the negative feedback loop to increase the phase margin. The application replaces the traditional operational amplifier by a unique current mirror negative feedback circuit structure, eliminates the limitation of the operational amplifier on the power supply voltage, and realizes ultra-low power consumption while ensuring stable operation of the circuit.

The application discloses a band gap reference circuit based on high-order curvature compensation, comprising a reference voltage generating circuit and a high-order curvature compensation circuit, wherein the high-order curvature compensation circuit comprises a positive temperature coefficient current generating circuit, a non-temperature coefficient current generating circuit and a extraction compensation current generating circuit; the reference voltage generating circuit is used for generating a reference voltage and outputting the reference voltage through an output terminal; the positive temperature coefficient current generating circuit is used for generating a positive temperature coefficient current according to the reference voltage and outputting the positive temperature coefficient current through an output terminal; the non-temperature coefficient current generating circuit is used for generating two equal non-temperature coefficient currents according to the reference voltage and outputting the two non-temperature coefficient currents through first and second output terminals; and the extraction compensation current generating circuit is used for generating an extraction compensation current according to the positive temperature coefficient current and the non-temperature coefficient current and acting on the reference voltage generating circuit to compensate the reference voltage generated by the reference voltage generating circuit; and the application has smaller temperature drift and can meet more use scenarios.

A semiconductor device includes: a GND reference circuit based on a GND potential and a floating reference circuit based on a potential higher than the GND potential; a lead frame; a first semiconductor substrate arranged on the lead frame and provided with the GND reference circuit; and a second semiconductor substrate arranged on the lead frame and provided with the floating reference circuit, wherein either the first semiconductor substrate or the second semiconductor substrate is arranged on the lead frame with an insulating material interposed.

The present application relates to a kind of vibration compensation effect simulation evaluation system and method based on VCO phase accumulation, system includes arbitrary waveform generator, analog differentiator, voltage-controlled oscillator, real-time compensation module, oscilloscope and host computer, arbitrary waveform generator generates a sine wave signal as analog speed quantity, and input voltage-controlled foot of voltage-controlled oscillator and analog differentiator, analog differentiator will signal after processing input to real-time compensation module, integral follow-up signal exported by real-time compensation module and the modulation signal output by voltage-controlled oscillator enter oscilloscope and be collected record, oscilloscope is connected with host computer by USB, data stream is transmitted to host computer and is carried out automatic calculation processing.The present application adopts pure electronic signal simulation scheme, vibration signal is generated by signal generator, while input is measured compensation module and the phase accumulation reference circuit based on VCO, constructs double-path parallel processing verification architecture.The system significantly improves the development test efficiency of compensation system.

This application provides a current reference circuit, including a current reference core module, a first switch, and a startup module. The current reference core module outputs a reference current. The first switch is connected to the current reference core module. The startup module is connected to the first switch and, during power-on, controls the first switch to connect to the current reference core module, transmitting a startup current to the current reference core module via the first switch to start the current reference core module. After transmitting the startup current to the current reference core module, the startup module controls the first switch to disconnect. By controlling the first switch to disconnect after transmitting the startup current to the current reference core module, the problem of no startup current being transmitted to the current reference core module due to the first switch not conducting or insufficient conducting during slow power-on is avoided, thus improving the reliability of the current reference circuit during power-on startup.

The embodiment of the application provides a reference circuit, a chip and an electronic device, the reference circuit comprises a first voltage generating module, a second voltage generating module, a third voltage generating module, a voltage summing module and an output module, the first negative temperature coefficient voltage is generated through the first voltage generating module, the second voltage generating module generates a positive temperature coefficient voltage, the third voltage generating module generates a high-order temperature compensation voltage based on the first negative temperature coefficient voltage and the first voltage, the voltage summing module generates a first output voltage based on the first negative temperature coefficient voltage, the positive temperature coefficient voltage and the high-order temperature compensation voltage, and the output module outputs the first output voltage as a reference voltage after performing a mismatch processing, the output module is added on the basis of the voltage summing module, the first output voltage can be outputted as the reference voltage after the mismatch processing of the output module, and therefore the stability of the reference voltage is improved due to the improvement or elimination of the mismatch.

The application provides a semiconductor structure with bipolar transistors, a bandgap reference circuit and a chip. The semiconductor structure comprises a substrate and at least two transistor groups formed on the substrate, wherein for any adjacent first transistor group and second transistor group in the at least two transistor groups, the first transistor group and the second transistor group comprise bipolar transistors arranged in a ring structure, the first transistor group comprises at least one bipolar transistor, the second transistor group comprises two bipolar transistors nested, and the at least one bipolar transistor is nested inside the bipolar transistor on the inner side in the second transistor group.

The application relates to a bandgap reference circuit. The bandgap reference circuit of the application comprises a voltage mode reference voltage generation circuit configured to provide an intermediate reference voltage; a current mode bandgap reference circuit configured to be adjusted according to the intermediate reference voltage to generate and output an arbitrary adjustable reference voltage; and a start-up circuit configured to be controlled by the intermediate reference voltage to provide a start-up signal for the voltage mode reference voltage generation circuit to make the voltage mode reference voltage generation circuit out of a zero current balance state; or the voltage mode reference voltage generation circuit outputs the intermediate reference voltage and the start-up circuit stops working. The intermediate reference voltage output by the voltage mode reference voltage generation circuit is adjusted by the current mode bandgap reference circuit to obtain an arbitrary adjustable reference voltage, thus overcoming the defects caused by the voltage mode or the current mode structure used alone.

A novel bandgap reference startup circuit with degeneracy state detection is disclosed, particularly relating to the design of integrated circuit power control chips. The circuit includes a novel bandgap reference startup circuit and a bias voltage and enable signal generation circuit. The novel bandgap reference startup circuit comprises a startup circuit and an inverter, a degeneracy-removal current generation circuit, a bandgap core and process corner adaptive compensation circuit, and a Schmitt trigger circuit. This invention utilizes the on / off characteristics of MOSFETs to achieve startup. By detecting the difference in degeneracy state between the core devices of the second-order compensated bandgap circuit (such as BJTs and MOSFETs) at the degeneracy point and in normal operating conditions, it can accurately identify and effectively remove the bandgap reference circuit from the degeneracy state. Simultaneously, it adapts to the spurious operating point detection requirements of first-order bandgap circuits, accurately identifying the operating state of the reference circuit and effectively solving problems such as unreliable startup, high power consumption, inaccurate judgment, and poor adaptability in existing circuits.

The application discloses an online detection and maintenance method for a hydraulic system of an underground trackless equipment, and belongs to the technical field of fault diagnosis of underground trackless equipment. When a vehicle meets a quasi-static boundary condition, the hydraulic circuit is locked and the integrity of the reference circuit is checked; a bistable test signal containing dynamic pressure building and static pressure maintaining is synchronously sent to the to-be-detected hydraulic circuit and the reference hydraulic circuit; the effective bulk modulus of the fluid is inversed by using the dynamic response of the reference hydraulic circuit, and the flow supply efficiency is calculated; the internal leakage flow in the to-be-detected hydraulic circuit is calculated by combining the inversed modulus and the static pressure decay data; finally, the fault type is determined and the control parameter is corrected according to the internal leakage flow and the flow supply efficiency. The application eliminates the influence of the change of oil characteristics on the detection accuracy, and realizes independent identification and closed-loop compensation of the faults of the control valve and the executing element.

This invention discloses an NPN-type adjustable low-temperature drift current reference circuit, comprising a startup circuit module and a current reference generation circuit module. The startup circuit module includes NMOS transistors M3, M4, M5, PMOS transistors M6 and M7, and resistor R3. The current reference generation circuit module includes PMOS transistors M1 and M2, NPN transistors Q1 and Q2, resistors R1 and R2. The NPN-type adjustable low-temperature drift current reference circuit provided by this invention reduces the temperature drift of the reference current, significantly improves the temperature coefficient, and enhances the accuracy of the current reference circuit. Furthermore, this invention only adds resistors to the circuit, making the circuit simple and easy to implement without requiring additional manufacturing processes, thus facilitating practical applications.