Ultrahigh-precision low-noise band-gap reference circuit

Abstract

The invention discloses an ultrahigh-precision low-noise band-gap reference circuit, and relates to the technical field of integrated circuit design, the ultrahigh-precision low-noise band-gap reference circuit comprises a starting turn-off circuit, a reference core circuit, a high-order temperature compensation circuit and a digital trimming circuit, the starting turn-off circuit is connected with the reference core circuit, and the high-order temperature compensation circuit is connected with the digital trimming circuit through a Brokaw type band-gap reference topological structure. Accurate compensation of the voltage is achieved through deep negative feedback of the operational amplifier and a high-order temperature compensation circuit, and the temperature drift of the reference voltage is as low as 0.5-2 ppm / DEG C (-40 DEG C to 130 DEG C) and is increased by 5-10 times compared with a traditional band-gap reference (5-10 ppm / DEG C). The power consumption of the system can be saved by turning off the circuit when the circuit is not used, meanwhile, the digital trimming module is added to replace laser trimming in traditional engineering, the upper limit of the trimming range is improved, high-order temperature compensation and the digital trimming circuit are introduced, the precision of output voltage is improved, different devices are replaced, and the noise of the circuit is reduced. The problems that a traditional high-voltage band-gap reference temperature coefficient is high and noise is large are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit design, and particularly relates to a super-high-precision low-noise bandgap reference circuit. BACKGROUND

[0002] As one of the key modules of an analog circuit, the bandgap reference circuit provides a high-precision reference voltage for internal circuits, and the index parameters of the bandgap reference circuit largely determine the performance index of the entire chip.

[0003] The conventional bandgap reference circuit is based on the physical characteristics of a bipolar transistor (BJT), and combines the superposition of a positive temperature coefficient (PTAT) and a negative temperature coefficient (CTAT) voltage to realize a zero-temperature-coefficient reference voltage output, wherein a typical structure includes: a double-BJT branch: a PTAT current is generated by using the base-emitter voltage difference (ΔV BE ) of two BJTs, and a resistance network: a CTAT voltage compensation is realized by resistance voltage division.

[0004] To reduce the chip area, a single-BJT structure is proposed, which only uses one BJT in combination with a MOS tube and a resistor to realize similar functions, For example, a MOS tube working in a sub-threshold region provides a weak bias current, but needs to rely on a complex start-up circuit, and the temperature coefficient of the conventional circuit is usually 20-100 ppm / ℃, which is difficult to meet the high-precision requirement; Under a high-temperature environment, the output voltage may exhibit a negative temperature coefficient (decreases with temperature rise); Secondly, the temperature curvature error cannot be eliminated by only one-order compensation, resulting in output fluctuation in a wide temperature range, the weak current start-up of the sub-threshold region MOS tube may cause start-up failure due to process deviation, especially under an advanced process, the threshold voltage change significantly affects the stability of the circuit, and the power supply rejection ratio (PSRR) of the circuit is insufficient: the conventional circuit is sensitive to power supply noise, which affects the stability of the reference voltage, and the circuit noise is large.

[0005] The core circuit of the conventional bandgap reference is shown in FIG. 1, Figure 1 Due to the mismatch between M1 and M2, the currents flowing through the transistors Q1 and Q2 are not equal, which causes a large deviation of the bandgap reference output voltage and affects the accuracy of the reference voltage; Another conventional Brokaw bandgap reference circuit is shown in FIG. 2, Figure 2As shown, resistors are used as loads, and at the same time, the voltage is clamped by using operational amplifiers, so that the currents flowing through the two triodes are equal, a relatively stable voltage reference source is generated, and the precision may be about several tens of ppm / ℃, the precision is poor, therefore, aiming at the problems of poor matching, low precision and large noise existing in the traditional bandgap reference structure, aiming at the application scene of high-precision chips, it is of great significance to design an ultra-high-precision low-noise bandgap reference. SUMMARY

[0006] In view of the deficiencies of the prior art, the present application provides an ultra-high-precision low-noise bandgap reference circuit, which can generate an internally stable output reference voltage, does not require a pre-regulator module, improves the precision of the chip, reduces the noise of the circuit, and solves the problems of poor matching, low precision and large noise existing in the traditional bandgap reference structure proposed in the above background art.

[0007] To achieve the above object, the present application is implemented by the following technical scheme: an ultra-high-precision low-noise bandgap reference circuit, comprising a start-off and shutdown circuit, a reference core circuit, a high-order temperature compensation circuit and a digital trimming circuit, the start-off and shutdown circuit is connected with the reference core circuit, the reference core circuit is connected with the high-order temperature compensation circuit and the digital trimming circuit; The start-off and shutdown circuit comprises three PMOS tubes, ten NMOS tubes and an inverter, wherein the three PMOS tubes are denoted as M1, M2 and M3, and the ten NMOS tubes are denoted as NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9 and NM10; The reference core circuit comprises an operational amplifier A1, an operational amplifier A2, a triode Q1, a triode Q2, a triode Q3, resistors R1, R2, R3 and R4, an NMOS tube M1 and NPN triodes Q1 and Q2; The resistor R3 is connected between the emitters of the triodes Q1 and Q2, and the voltage drop of the resistor is ΔVBE, wherein the triodes Q1 and Q2 are core triodes of the reference core circuit, and the collectors thereof are connected to two input terminals of the operational amplifier A1, The high-order temperature compensation circuit generates a VREF voltage through the reference core circuit, forms a temperature-independent current Izero through a unit gain amplifier and a resistor, lets it flow into the collector of the triode Q7 and the base of the triode Q6, and lets the VREF voltage be connected to the base of a triode and then pass through a resistor to form a PTAT current Ip that flows into the collector of the triode Q5 and the base of the triode Q4, the collectors of the triodes Q4 and Q6 are respectively connected with current mirrors, and the output terminals of the two current mirror modules are respectively connected back to the bases of the triodes Q5 and Q7, forming two loops.

[0008] As a further of the present application, wherein the bandgap reference core circuit introduces two feedback loops, respectively, a negative feedback loop (NFBL) and a positive feedback loop (PFBL), the feedback circuit can improve the accuracy of the bandgap reference output voltage and improve the power supply rejection ratio, the common mode feedback circuit detects the voltage of points B and C, compares the result with the output voltage V REF out, and feeds back to the bias network in the bandgap reference core circuit. Through the action of negative feedback, the voltage of points B and C is suppressed from following the change of the power supply voltage, thereby improving the PSRR of the circuit. The negative feedback loop (NFBL) is mainly composed of an operational amplifier A1 and a transistor Q1, As a further of the present application, the positive feedback loop (PFBL) is mainly composed of an operational amplifier A1 and a transistor Q2 in the circuit topology design. The operational amplifier A1 and the transistor Q2 determine the loop gain of the negative feedback loop NFBL, and the operational amplifier A1 and the transistor Q1 determine the loop gain of the positive feedback loop (PFBL). In the two signal paths of the negative feedback loop NFBL and the positive feedback loop (PFBL), the absolute gain of the operational amplifier A1 is the same. The emitter of the transistor Q2 is connected in series with a resistor R3, which is equivalent to a common emitter stage amplifier with emitter negative feedback. The equivalent transconductance of the transistor Q2 is smaller than that of the transistor Q1, and the loads of the transistor Q1 and the transistor Q2 are the same. Therefore, the gain of the common emitter stage amplifier with emitter negative feedback of the transistor Q2 is smaller.

[0009] As a further of the present application, the differential input pair tubes in the operational amplifier A1 and the operational amplifier A2 are transistors.

[0010] As a further of the present application, the clamping action of the operational amplifier A1 and the operational amplifier A2 makes the collector voltages of the transistor Q1 and the transistor Q2 equal. Then, through the equal resistance values of the symmetric resistors connected on both sides, the currents flowing through the transistor Q1 and the transistor Q2 are equal, i.e. C1 =I C2 The area ratio of the transistor Q1 to the transistor Q2 is 1:8, and the reverse saturation current ratio of the transistor Q1 to the transistor Q2 is 1:8, i.e. S1 = I S2 Therefore, As shown below:

[0011] The collector current flowing through the transistor Q1 is as follows:

[0012] Since the collector currents flowing through the transistor Q1 and the transistor Q2 are equal, the current flowing through the resistor R4 is twice the collector current of the transistor Q1. Bandgap reference voltage V REF for:

[0013] in, It is a voltage with a negative temperature coefficient. Since it is a voltage with a positive temperature coefficient, a suitable... By calculating the ratio, we can obtain an output reference voltage with zero temperature coefficient.

[0014] As a further aspect of the present invention, the high-order temperature compensation circuit is based on the base-emitter junction of the transistor. V BE The formula for voltage:

[0015] in, These are parameters related to the current flowing through the PN junction. (where D is a constant) A PTAT current and a zero-temperature current are generated respectively, and then these are flowed into the collectors of transistors Q5 and Q7 respectively. The difference between the base-emitter voltages of transistors Q5 and Q7 at this time is... It contains higher-order terms and is connected to the bases of transistors Q5 and Q7 via resistor R. The current flowing through this resistor... I R This contains higher-order terms. Based on the mirror relationship between current mirrors and neglecting the base current of the transistor, the higher-order compensation current can be derived. ,in It refers to the proportional relationship between the current mirrors. It is a zero temperature coefficient current, and I R It contains higher-order terms, therefore the compensation current It contains higher-order terms and flows into the R4 terminal of the bandgap reference core circuit.

[0016] As a further aspect of the present invention, when the V_START voltage is low, NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9, and NM10 are turned on, the drain voltage of NM1 increases, that is, the gates of M1 and M2 are pulled low, the voltage at point A increases, NM10 is turned on, current flows through the resistor, and the entire bandgap circuit gets rid of the zero current state and begins to work normally; When the input voltage V_START is high, the start-up and shutdown circuit turns off all NMOS transistors and turns on transistor M3, which in turn pulls up the gate voltages of M1 and M2, turning them off. The voltage at point A is pulled down, and the circuit is in the off state.

[0017] As a further part of the present invention, the digital adjustment circuit is composed of a MOS switch with a 19-bit control word and a current mirror.

[0018] This invention provides an ultra-high precision, low-noise bandgap reference circuit, which has the following advantages: This ultra-high precision, low-noise bandgap reference circuit employs a Brokaw-type bandgap reference topology, utilizing deep negative feedback from operational amplifiers and high-order temperature compensation circuitry to achieve precise voltage compensation. This results in a reference voltage temperature drift as low as 0.5~2ppm / °C (-40°C~130°C), a 5-10 times improvement over traditional bandgap references (5~10ppm / °C). Turning off the circuit when not in use saves system power. Furthermore, the addition of a digital adjustment module replaces traditional laser adjustment, increasing the upper limit of the adjustable range. The introduction of high-order temperature compensation and digital adjustment circuitry improves output voltage accuracy. Replacing different components reduces circuit noise, overcoming the problems of high temperature coefficients and high noise levels associated with traditional high-voltage bandgap references. Through circuit topology innovation and component-level optimization, it offers significant advantages in high-precision sensors, medical equipment, and other fields, particularly suitable for high-end applications requiring "zero drift and low noise." Compared to existing technologies, it can improve system accuracy by 2-3 orders of magnitude. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the core structure of a traditional bandgap reference. Figure 2 This is a schematic diagram of the existing structure of the Brokaw bandgap reference circuit of the present invention; Figure 3 This is a schematic diagram of the high-precision, low-noise bandgap reference circuit of the present invention; Figure 4 This is a schematic diagram of the start-up and shutdown circuit of the present invention; Figure 5 This is a circuit diagram of the reference core circuit of the present invention; Figure 6 This is a schematic diagram of the high-order temperature compensation circuit of the present invention; Figure 7 V is the reference voltage of this invention. REF A schematic diagram of the temperature coefficient simulation; Figure 8 The noise diagram of the circuit of the present invention is shown in the frequency range of 0.01 to 10 Hz. Figure 9 For the present invention Figure 2 A partial schematic diagram; Figure 10 For the present invention Figure 2 A partial schematic diagram; Figure 11 For the present invention Figure 2a partial view. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present application will be apparently and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0021] Please refer to Figures 1 to 11 The present application provides a technical solution: an ultra-high-precision low-noise bandgap reference circuit, comprising a start-off circuit, a reference core circuit, a high-order temperature compensation circuit and a digital trimming circuit, the start-off circuit is connected with the reference core circuit, the reference core circuit is connected with the high-order temperature compensation circuit and the digital trimming circuit, The start-off circuit comprises three PMOS tubes, ten NMOS tubes and an inverter, wherein the three PMOS tubes are denoted as M1, M2 and M3 respectively, and the ten NMOS tubes are denoted as NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9 and NM10 respectively, When the V_START voltage is low, NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9 and NM10 are turned on, the NM1 drain voltage rises, the M1 and M2 gate voltages are pulled low, the A point voltage rises, NM10 is turned on, and there is a current flowing through the resistor, so that the whole bandgap circuit gets out of the zero-current state and starts to work normally. The start-off circuit makes all the NMOS tubes be turned off when the input voltage V_START is high, the M3 tube is turned on, the M1 and M2 gate voltages are pulled high to make them be turned off, the A point voltage is pulled low, and the circuit is in the off state.

[0022] Please refer to Figure 5 The reference core circuit comprises an operational amplifier A1, an operational amplifier A2, a transistor Q1, a transistor Q2, a transistor Q3, resistors R1, R2, R3 and R4, an NMOS tube M1 and NPN tubes Q1 and Q2.

[0023] The resistor R3 is connected between the emitters of the transistors Q1 and Q2, and the voltage drop of the resistor is ΔVBE, wherein the transistors Q1 and Q2 are core transistors of the reference core circuit, the collectors of which are connected to the two input terminals of the operational amplifier A1 respectively, The clamping effect of the operational amplifiers A1 and A2 makes the collector voltages of the transistors Q1 and Q2 at both ends be equal, and the equal resistance values of the symmetric resistors connected on both sides make the currents flowing through the transistors Q1 and Q2 be equal, i.e. C1 =I C2The ratio of the area of the transistor Q1 and the transistor Q2 is 1:8, and the ratio of the reverse saturation current of the transistor Q1 and the transistor Q2 is 1:8, that is, 8I S1 = I S2 . Then As shown below:

[0024] The collector current flowing through the transistor Q1 is as follows:

[0025] Since the collector current flowing through the transistor Q1 and the transistor Q2 is equal, the current flowing through the resistor R4 is twice the collector current of the transistor Q1. The bandgap reference voltage V REF is:

[0026] wherein, is a voltage with a negative temperature coefficient, is a voltage with a positive temperature coefficient, so by selecting a suitable ratio, an output reference voltage with zero temperature coefficient can be obtained, wherein two feedback loops are introduced in the bandgap reference core circuit, namely a negative feedback loop (NFBL) and a positive feedback loop (PFBL). The feedback circuit can improve the accuracy of the bandgap reference output voltage and improve the power supply rejection ratio. The common mode feedback circuit detects the voltage at points B and C, compares it with the output voltage V REF , and feeds back the result to the bias network in the bandgap reference core circuit. Through the action of negative feedback, the voltage at points B and C is suppressed from following the change of the power supply voltage, thereby improving the PSRR of the circuit. The negative feedback loop (NFBL) is mainly composed of an operational amplifier A1 and a transistor Q1, The positive feedback loop (PFBL) is mainly composed of the operational amplifier A1 and the transistor Q2 in the circuit topology design. The operational amplifier A1 and the transistor Q2 determine the loop gain of the negative feedback loop NFBL, and the operational amplifier A1 and the transistor Q1 determine the loop gain of the positive feedback loop (PFBL).

[0027] In the two signal paths of the negative feedback loop NFBL and the positive feedback loop (PFBL), the absolute gain of the operational amplifier A1 is the same. The emitter of the transistor Q2 is connected in series with a resistor R3, which is equivalent to a common emitter stage amplifier with emitter negative feedback. The equivalent transconductance of the transistor Q2 is smaller than that of the transistor Q1, and the loads of the transistor Q1 and the transistor Q2 are the same, so the gain of the common emitter stage amplifier with emitter negative feedback of the transistor Q2 is smaller.

[0028] Therefore, the loop gain of the positive feedback loop (PFBL) is less than that of the non-positive feedback loop (NFBL), meaning the circuit as a whole exhibits negative feedback and is stable. Furthermore, to reduce overall circuit noise, the differential input pairs in op-amps A1 and A2 are both transistors.

[0029] For advanced temperature compensation circuits, please refer to [link / reference]. Figure 6 Among them, the high-order temperature compensation circuit can further improve the accuracy of the circuit. The high-order temperature compensation circuit generates a VREF voltage through the reference core circuit. This VREF voltage is then passed through a unity-gain amplifier and a resistor to form a temperature-independent current Izero. This current Izero flows into the collector of transistor Q7 and the base of transistor Q6. Simultaneously, this VREF voltage is connected to the base of another transistor and then through a resistor to form a PTAT current Iptat, which flows into the collector of transistor Q5 and the base of transistor Q4. The collectors of transistors Q4 and Q6 are connected to current mirrors, and the outputs of the two current mirror modules are then connected back to the bases of transistors Q5 and Q7, forming two loops.

[0030] According to the base-emitter junction of a transistor V BE The formula for voltage:

[0031] in, These are parameters related to the current flowing through the PN junction. (where D is a constant). Therefore, a PTAT current and a zero-temperature current are generated respectively, and then these are flowed into the collectors of transistors Q5 and Q7 respectively. The difference between the base-emitter voltages of transistors Q5 and Q7 at this time... It contains higher-order terms and is connected to the bases of transistors Q5 and Q7 via resistor R. The current flowing through this resistor... I R This leads to higher-order terms. Based on the mirror relationship between current mirrors, and neglecting the transistor's base current, the higher-order compensation current can be derived. ,in It refers to the proportional relationship between the current mirrors. It is a zero temperature coefficient current, and I R It contains higher-order terms, therefore the compensation current The higher-order terms flow into the R4 terminal of the bandgap reference core circuit. Considering the changes in device parameters caused by process deviations during chip manufacturing, a digital trimming circuit is introduced, which consists of a MOS switch with a 19-bit control word and a current mirror.

[0032] The high-precision, low-noise bandgap reference circuit of this invention (see [link])Figure 2 ) Build schematic diagram on Cadence platform by using virtuoso and verify by using spectre simulation, Please refer to Figure 7 , Figure 8 , the temperature coefficient and noise diagram of the output reference voltage V REF of the application are shown, wherein the power supply voltage V DD is set to 5V and GND is set to 0V, and scanning is performed in the temperature range of -40℃ to 130℃. From the simulation results, it can be seen that in the full temperature range, the temperature coefficient is 0.519ppm / ℃, and the noise is 0.61112uV at 0.1-10Hz, which meets the design index of the bandgap reference circuit.

[0033] The above describes only the preferred specific embodiments of the application, but the protection scope of the application is not limited to this. Any person skilled in the art, according to the technical solution and the inventive concept of the application, makes equivalent replacement or change within the technical range disclosed by the application, which should be covered within the protection scope of the application.

Claims

1. A high-precision, low-noise bandgap reference circuit, characterized in that: It includes a start-up and shutdown circuit, a reference core circuit, a high-order temperature compensation circuit, and a digital adjustment circuit. The start-up and shutdown circuit is connected to the reference core circuit, and the reference core circuit is connected to the high-order temperature compensation circuit and the digital adjustment circuit. The start-up and shutdown circuit includes three PMOS transistors, ten NMOS transistors, and one inverter. The three PMOS transistors are designated as M1, M2, and M3, and the ten NMOS transistors are designated as NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9, and NM10. The reference core circuit includes operational amplifier A1, operational amplifier A2, transistor Q1, transistor Q2, transistor Q3, resistor R1, resistor R2, resistor R3, resistor R4, NMOS transistor M1, and NPN transistors Q1 and Q2. The resistor R3 is connected between the emitters of transistors Q1 and Q2, and its voltage drop is ΔVBE. Transistors Q1 and Q2 are the core transistors of the reference core circuit, and their collectors are respectively connected to the two input terminals of operational amplifier A1. The high-order temperature compensation circuit generates a VREF voltage through the reference core circuit. This VREF voltage is then passed through a unity-gain amplifier and a resistor to form a temperature-independent current Izero. This current Izero flows into the collector of transistor Q7 and the base of transistor Q6. Simultaneously, this VREF voltage is connected to the base of another transistor and then through a resistor to form a PTAT current Iptat, which flows into the collector of transistor Q5 and the base of transistor Q4. The collectors of transistors Q4 and Q6 are connected to current mirrors, and the outputs of the two current mirror modules are then connected back to the bases of transistors Q5 and Q7, forming two loops.

2. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: The core circuit of the bandgap reference incorporates two feedback loops: a negative feedback loop (NFBL) and a positive feedback loop (PFBL). These feedback circuits improve the accuracy of the bandgap reference output voltage and increase the power supply rejection ratio. The common-mode feedback circuit detects the voltage at points B and C and compares it with the output voltage V. REF The comparison is made, and the result is fed back to the bias network in the core circuit of the bandgap reference. Through the effect of negative feedback, the voltage across B and C is suppressed from following the change of the power supply voltage, thereby improving the PSRR of the circuit. The negative feedback loop (NFBL) is mainly composed of operational amplifier A1 and transistor Q1.

3. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: The positive feedback loop (PFBL) is mainly composed of operational amplifier A1 and transistor Q2 in the circuit topology design. Operational amplifier A1 and transistor Q2 determine the loop gain of the negative feedback loop NFBL, while operational amplifier A1 and transistor Q1 determine the loop gain of the positive feedback loop (PFBL). In the two signal paths of the negative feedback loop (NFBL) and the positive feedback loop (PFBL), the absolute gain of the operational amplifier A1 is the same. The emitter of transistor Q2 is connected in series with a resistor R3, which is equivalent to a common-emitter amplifier with emitter negative feedback. The equivalent transconductance of transistor Q2 is slightly smaller than that of transistor Q1 (gm). Since the loads of transistors Q1 and Q2 are the same, the gain of the common-emitter amplifier with emitter negative feedback transistor Q2 is smaller.

4. The ultra-high precision low-noise bandgap reference circuit according to claim 2, characterized in that: The differential input pairs in op-amps A1 and A2 are both transistors.

5. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: The clamping effect of operational amplifiers A1 and A2 makes the collector voltages of transistors Q1 and Q2 equal. Furthermore, because the symmetrical resistors connected to both sides have equal resistances, the currents flowing through transistors Q1 and Q2 are also equal, i.e., I0. C1 =I C2 If the area ratio of transistor Q1 to transistor Q2 is 1:8, then the ratio of their reverse saturation currents is also 1:8, i.e., 8I. S1 = I S2 ,but As shown below: ， The collector current flowing through transistor Q1 is shown below: ， Since the collector currents flowing through transistors Q1 and Q2 are equal, the current flowing through resistor R4 is twice the collector current of transistor Q1. Bandgap reference voltage V REF for: ， in, It is a voltage with a negative temperature coefficient. Since it is a voltage with a positive temperature coefficient, a suitable... By calculating the ratio, we can obtain an output reference voltage with zero temperature coefficient.

6. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: In high-order temperature compensation circuits, the base-emitter junction of the transistor is used as a reference. V BE The formula for voltage: ， in, These are parameters related to the current flowing through the PN junction. (where D is a constant) A PTAT current and a zero-temperature current are generated respectively, and then these are flowed into the collectors of transistors Q5 and Q7 respectively. The difference between the base-emitter voltages of transistors Q5 and Q7 at this time is... It contains higher-order terms and is connected to the bases of transistors Q5 and Q7 via resistor R. The current flowing through this resistor... I R This contains higher-order terms. Based on the mirror relationship between current mirrors and neglecting the base current of the transistor, the higher-order compensation current can be derived. ,in It refers to the proportional relationship between the current mirrors. It is a zero temperature coefficient current, and I R It contains higher-order terms, therefore the compensation current It contains higher-order terms and flows into the R4 terminal of the bandgap reference core circuit.

7. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: When the V_START voltage is low, NM1, NM2, NM3, NM4, NM5, NM6, NM7, NM8, NM9, and NM10 are turned on, the drain voltage of NM1 increases, that is, the gates of M1 and M2 are pulled low, the voltage at point A increases, NM10 is turned on, current flows through the resistor, and the entire bandgap circuit gets rid of the zero current state and starts to work normally. When the input voltage V_START is high, the start-up and shutdown circuit turns off all NMOS transistors and turns on transistor M3, which in turn pulls up the gate voltages of M1 and M2, turning them off. The voltage at point A is pulled down, and the circuit is in the off state.

8. The ultra-high precision low-noise bandgap reference circuit according to claim 1, characterized in that: The digital trimming circuit consists of a MOS switch with a 19-bit control word and a current mirror.

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