628results about "Low noise amplifier" patented technology

The invention relates to the technical field of wireless communication, and provides a radio frequency low-noise amplifier which comprises an input matching module, a power amplification module, an output matching module, an RC attenuation module and an RC feedback module, the first end of the first inductor serves as the input end of the output matching module, the first end of the first inductor is connected with the output end of the power amplification module, the control end of the switch and the first end of the first adjustable resistor, and the second end of the first inductor is connected with the first end of the second inductor and the first end of the third capacitor. The output end of the switch is connected with the first end of the first capacitor and the first end of the second capacitor. The second end of the second capacitor is connected with the second end of the first adjustable resistor and the second end of the second inductor and used for being connected with a power supply. The second end of the first capacitor is connected with the second end of the third capacitor and serves as the output end of the output matching circuit. The radio frequency low-noise amplifier is adjustable in gain, low in noise and good in linearity performance.

Aspects of this disclosure relate to acoustic wave filters with bulk acoustic wave resonators. An acoustic wave filter can include a first bulk acoustic wave resonator configured to excite an overtone mode as a main mode and a second bulk acoustic wave resonator having a fundamental mode as a main mode.

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

The invention relates to a folded cascode low noise amplifier. The disclosed low noise amplifiers (LNAs) include a common emitter amplifier (CE-A), a common gate amplifier (CG-A), and various passive devices located in CE-A and CG-A. The CE-A includes an NPN type bipolar junction transistor (BJT) having emitter and collector (E / C) regions, and a base region located between the E / C regions and connected to an input node. The CG-A includes a P-channel field effect transistor (PFET) having source and drain (S / D) regions, a channel region between the S / D regions, and a gate adjacent to the channel region. A drain region of the PFET is connected to the output node. Further, the common inductor, the collector region of the BJT, and the source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) in which the BJT and the FET are located on different chips and the passive device is located in a back-end-of-line region between the BJT and the FET.

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

Disclosed is a technology related to a low noise amplifier applied between an RF receiver and an RF switch. A phase difference matching circuit having the same phase difference as a positive gain amplifier is added to an output terminal of an attenuator of a low noise amplifier having a variable gain switching structure. In addition, a variable impedance circuit connected to an output terminal of the positive gain amplifier and an output terminal of a phase difference matching unit to finely adjust the phase difference of each output terminal may be further included.

A disclosed low noise amplifier (LNA) includes a common-emitter amplifier (CE-A), a common-gate amplifier (CG-A) and various passive devices in CE-A and CG-A. CE-A includes an NPN-type bipolar junction transistor (BJT) with emitter and collector (E / C) regions and a base region between the E / C regions and connected to an input node. CG-A includes P-channel field effect transistor (PFET) with source and drain (S / D) regions, a channel region between the S / D region, and a gate adjacent to the channel region. The drain region of the PFET is connected to an output node. Additionally, a common inductor, collector region of the BJT, and source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) with the BJT and FET on different chips and with passive devices in back end of the line regions between the BJT and FET.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

The invention provides a low-noise amplification circuit, a radio frequency front-end module and an electronic terminal.The low-noise amplification circuit comprises an input matching adjustment circuit, a common-source amplification circuit, a first inductor, an inter-stage feedback circuit, a common-gate amplification circuit, an input and output feedback circuit, an output matching adjustment circuit and an output attenuation circuit; the common-source amplification circuit comprises at least two first signal amplification units; each first signal amplification unit comprises a first field effect transistor; the common-gate amplification circuit comprises at least two second signal amplification units; and each second signal amplification unit comprises a second field effect transistor. According to the low-noise amplification circuit, transconductance nonlinearity of devices under different bias signals can be mutually counteracted, so that the linearity fluctuation of the low-noise amplification circuit at different temperatures is optimized, and the linearity of the low-noise amplification circuit is kept basically not to change along with the temperature change.

Techniques for controlling remote antenna systems. An example method of receiving radio frequency signals with a remote antenna module includes providing a first signal to a remote receiver on a conductor, receiving a control signal from the remote receiver on the conductor, wherein the control signal is a bias voltage on the conductor, and providing a second signal on the conductor in response to receiving the control signal.

A disclosed low noise amplifier (LNA) includes a common-emitter amplifier (CE-A), a common-gate amplifier (CG-A) and various passive devices in CE-A and CG-A. CE-A includes an NPN-type bipolar junction transistor (BJT) with emitter and collector (E / C) regions and a base region between the E / C regions and connected to an input node. CG-A includes P-channel field effect transistor (PFET) with source and drain (S / D) regions, a channel region between the S / D region, and a gate adjacent to the channel region. The drain region of the PFET is connected to an output node. Additionally, a common inductor, collector region of the BJT, and source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) with the BJT and FET on different chips and with passive devices in back end of the line regions between the BJT and FET.

A power amplification circuit may comprise a power distributor configured to receive a radio frequency (RF) signal and output a first RF signal and a second RF signal, a first power amplifier configured to receive the first RF signal from the power distributor and amplify the first RF signal based on a first bias, a second power amplifier configured to receive the second RF signal from the power distributor and amplify the second RF signal based on a second bias, an impedance matching circuit configured to receive the first RF signal amplified by the first power amplifier and the second RF signal amplified by the second power amplifier, and a protection circuit configured to identify a current input to a bias terminal of the second power amplifier and, control a magnitude of the current input to the bias terminal based on the identified input current.

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor (“capless LNAs”). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.

Certain aspects of the present disclosure generally relate to electronic components and, more particularly, to circuitry for signal amplification for transmission. One example apparatus generally includes: a modem; a controller; a feedforward path coupled between the modem and the bias controller; and an amplifier having a main amplification path and an auxiliary amplification path, wherein the controller is configured to provide at least one bias signal for biasing the auxiliary amplification path based on information associated with a transmission signal, the information being provided by the modem to the controller via the feedforward path.

A low-noise amplifier (LNA) includes a first transistor, a second transistor, and a load coupled to a drain of the first transistor and a drain of the second transistor. The LNA also includes a first reactive impedance matching network including a first inductor and a second inductor inductively coupled with the first inductor, wherein the first inductor is coupled to a source of the first transistor, and the second inductor is coupled to a gate of the first transistor. The LNA also includes a second reactive impedance matching network including a third inductor and a fourth inductor inductively coupled with the third inductor, wherein the third inductor is coupled to a source of the second transistor, and the fourth inductor is coupled to a gate of the second transistor. The LNA also includes a switching circuit configured to enable or disable each of the reactive impedance matching networks.

Certain aspects of the present disclosure are directed towards techniques and apparatus for implementing concurrent matching for a transmitter and a receiver. An example transceiver may include a first amplifier, a second amplifier, a third amplifier, a first transformer, a second transformer, a first switch, and a third transformer. The first switch is coupled between a terminal of a secondary winding of the first transformer and a reference potential node.

Bidirectional variable gain amplifiers (VGAs) for radio frequency (RF) communication systems are provided. In certain embodiments, a bidirectional VGA includes a first amplifier having an input coupled to a transmit / receive port, a second amplifier having an output coupled to a transmit port, a third amplifier having an input coupled to a receive port, a fourth amplifier having an output coupled to the transmit / receive port and to the input of the first amplifier, and a switch circuit that connects an output of the first amplifier to an input of the second amplifier in a transmit mode, and that connects an output of the third amplifier to an input of the fourth amplifier in a receive mode.

A radio frequency circuit includes first and second filters for first and second time division duplex (TDD) bands. Third and fourth filters cover third and fourth bands. A switch including a first terminal, a second terminal, and a third terminal to connect these filter to an antenna. The first terminal is connected to only the first filter and the second terminal is connected to only the second filter, among the filters having acoustic wave filters. The third terminal connects to both the third filter and the fourth filter. This configuration enables simultaneous transfer of a transmission signal of the first band and a reception signal of the second band, as well as simultaneous transfer of signals of the third and fourth bands. By isolating the TDD filters on separate terminals, signal quality and isolation are improved during simultaneous operation.

An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

Circuits and methods include amplification circuitry coupled to a plurality of input signal paths and an output signal path and a unified signal path combining a feedback path couplable between a feedback node in the output signal path and the input signal path via a plurality of input switches and a passive gain path couplable between the feedback node in the output signal path and one or more input signal paths through the input switch. The circuit may include a first capacitor and a variable resistor coupled in series and a second capacitor coupled in series with a feedback path switch and a power supply rejection resistor. The passive gain path may further include a shunt switch coupled in series between a plurality of bypass switches to form a T-switch. A fast charging switch may be configurable to couple a second capacitor to a reference potential during a state change of the unified signal path.

An LNA with inductive source degeneration provided by a degeneration network is presented. The degeneration network includes an inductor in parallel with a stability compensation network for provision of unconditional stability with reduced effect on in-band performance of the LNA. The stability compensation network includes an RLC network comprising a resistor, an inductor and a capacitor in series connection. According to one aspect, a resonant frequency provided by the series-connected inductor and capacitor is selected based on a known frequency of instability. Values of the resistor, inductor and capacitor are iteratively derived based on an optimization routine with criteria that includes a magnitude of the μ-factor. The criteria further include an in-band RF performance of the LNA. According to another aspect, initial values of the inductor and capacitor are selected for an initial value of the resonant frequency to be equal to about 10× the in-band frequency.

A high-frequency circuit includes a switch circuit having terminals and configured to switch between connection and disconnection between the terminals, and a charge pump circuit configured to supply a control voltage to the switch circuit, wherein the switch circuit includes an FET having a first gate, a first drain and a first source, where the first gate is supplied with a first control voltage from the charge pump circuit, the first drain is connected to the terminal, and the first source is connected to the other terminal, and an FET having a second gate, a second drain and a second source, where the second gate is supplied with a second control voltage from the charge pump circuit, the second drain and the second source are connected to a path connecting the terminal, the FET and the terminal, and the second drain and the second source are short-circuited.

Disclosed are example embodiments describing receiver circuits and methods for mitigating out-of-band blockers. The receiver circuits include a low noise transconductance amplifier (LNTA) stage, a down-conversion mixer stage, a post-mixer filter, and a gain stage. A feature is the reuse of supply currents from the post-mixer filter and the gain stage to supply the LNTA stage. The method involves down-converting an input signal, filtering the down converted signal through a current-mode notch filter, amplifying the filtered signal, and reusing a combined supply current for the LNTA stage.

The invention provides a radio frequency power amplification circuit and an adjusting method thereof. The radio frequency power amplification circuit comprises an image transmission module, a first radio frequency switch, a radio frequency power amplification module, a radio frequency low-noise amplifier, a second radio frequency switch and an antenna module, the radio frequency power amplification module comprises a GaN radio frequency power amplifier, the image transmission module is connected with an RFC of the first radio frequency switch, the GaN radio frequency power amplifier is connected between RF1 channels of the first radio frequency switch and the second radio frequency switch, and the radio frequency low noise amplifier is connected between RF2 channels of the first radio frequency switch and the second radio frequency switch. The antenna module is connected with the RFC of the second radio frequency switch; the two radio frequency switches are configured to control a radio frequency signal transmitted by the image transmission module to flow to the GaN radio frequency power amplifier in a radio frequency transmitting state, and the radio frequency signal is transmitted to the antenna module after being amplified; in the radio frequency receiving state, radio frequency signals received by the antenna module are controlled to flow to the radio frequency low-noise amplifier and are sent to the image transmission module after being amplified. According to the invention, ultra-long distance image transmission of the unmanned equipment can be realized.

A Doherty power amplifier (PA) includes a main amplifier, an auxiliary amplifier, a first inductor coupled between an output of the main amplifier and a first node, a second inductor coupled between an output of the auxiliary amplifier and the first node, and a third inductor coupled between a supply rail and the first node. The Doherty PA also includes a first capacitor coupled between the output of the main amplifier and a ground, a second capacitor coupled between the output of the auxiliary amplifier and the ground, and an impedance matching circuit coupled between the output of the auxiliary amplifier and an output of the Doherty PA.

A radio frequency circuit includes a first radio frequency circuit, a second radio frequency circuit, and a first switch circuit. The first switch circuit includes a first terminal connected to an antenna connection terminal, a second terminal connected to the first radio frequency circuit, and a third terminal connected to the second radio frequency circuit. The first radio frequency circuit includes a first power amplifier circuit supporting a first power class, and a first filter circuit connected to the first power amplifier circuit and having a passband that includes a first band. The second radio frequency circuit includes a second power amplifier circuit supporting a second power class having a maximum output power greater than a maximum output power of the first power class. The second radio frequency circuit includes a second filter circuit connected to the second power amplifier circuit and having a passband that includes the first band.

Radio frequency devices are presented that include input termination paths for use during calibration of these devices using test equipment. In one embodiment, an integrated circuit is disclosed. The integrated circuit may include an input terminal; an amplifier circuit; an input path connecting the input terminal to the amplifier circuit; and a calibration switch connected in series to a resistor to form a calibration path. In some embodiments, the calibration path is connected to the input path, and wherein the calibration switch is configured to be in a closed state during calibration of the amplifier circuit and in an open state after completion of the calibration of the amplifier circuit.

Disclosed in the present invention are a low-loss radio frequency transceiving front-end module and an electronic device. The radio frequency transceiving front-end module comprises at least one PA transmitting path, at least one LNA receiving path, at least one bypass receiving path, and / or at least one bypass transmitting path; the at least one PA transmitting path or the at least one LNA receiving path is directly connected to an ANT port of an antenna, and the PA transmitting path or the LNA receiving path comprises at least one switch connected in parallel to the ground; the remaining PA transmitting path or LNA receiving path is connected to the ANT port of the antenna by means of a radio frequency switch.

The invention discloses a single-power-supply ultra-wideband temperature compensation low-noise amplifier circuit, and belongs to the technical field of radio frequency microwaves. The circuit is mainly composed of a pre-stage low-noise amplifier module, an inter-stage temperature compensation equalization module and a post-stage driving amplifier module. The temperature compensation equalizer module generates differential voltage related to temperature through a three-stage gallium arsenide diode temperature sensing unit, outputs a control signal through an enhanced FET differential amplification circuit, drives a voltage-controlled attenuation equalizer to dynamically adjust the attenuation amount of a radio frequency signal, and achieves gain stability in a frequency band. Through the collaborative design of a blocking capacitor and a divider resistor, the grid bias of an FET switch is strictly limited in a transconductance linear adjustment interval, and the interval covers 80% of the effective range of the threshold voltage of a gallium arsenide FET tube. The circuit is powered by a single power supply + 5V, stable work of each module is ensured through active bias and a power supply filter network, and the circuit is suitable for extreme temperature environments such as high-frequency communication and radar.

Apparatus and methods for fast and accurate biasing of LNAs are provided herein. In certain embodiments, an LNA includes an amplification circuit that amplifies a radio frequency (RF) input signal, and a biasing circuit that generates a bias voltage for the amplification circuit based on comparing a sensed bias current through the amplification circuit to a reference current.