871results about "Low noise amplifier" patented technology

Aspects of this disclosure relate to a bulk acoustic wave device that includes a multi-layer raised frame structure. The multi-layer raised frame structure includes a first raised frame layer positioned between a first electrode and a second electrode of the bulk acoustic wave device. The first raised frame layer has a lower acoustic impedance than the first electrode. The first raised frame layer and the second raised frame layer overlap in an active region of the bulk acoustic wave device. Related filters, multiplexers, packaged modules, wireless communication devices, and methods are disclosed.

The invention relates to the technical field of wireless communication, and provides a radio frequency low-noise amplifier which comprises an input matching module, a power amplification module, an output matching module, an RC attenuation module and an RC feedback module, the first end of the first inductor serves as the input end of the output matching module, the first end of the first inductor is connected with the output end of the power amplification module, the control end of the switch and the first end of the first adjustable resistor, and the second end of the first inductor is connected with the first end of the second inductor and the first end of the third capacitor. The output end of the switch is connected with the first end of the first capacitor and the first end of the second capacitor. The second end of the second capacitor is connected with the second end of the first adjustable resistor and the second end of the second inductor and used for being connected with a power supply. The second end of the first capacitor is connected with the second end of the third capacitor and serves as the output end of the output matching circuit. The radio frequency low-noise amplifier is adjustable in gain, low in noise and good in linearity performance.

The invention provides a broadband low-noise amplifier based on a three-coil coupling transformer. The broadband low-noise amplifier comprises an input matching network, a common-source differential output driving stage amplifier, an inter-stage matching network, a common-source differential output power stage amplifier and an output matching network which are connected in sequence, broadband matching is realized by using the input matching network and the inter-stage matching network, and the effective transconductance of the transistor is improved; through the cross-coupled capacitors, the LNA gain and stability on a broadband are improved, better isolation is realized, and input and output are decoupled; due to the design of the grounding capacitor, the linearity of the LNA is improved; through the combination of the three-coil coupling transformer and the differential topology, output signals are superposed in the same direction at the output end, and noise is cancelled in the reverse direction at the output end, so that the thermal noise is greatly inhibited, the isolation is improved through the output matching network, the insertion loss is reduced, and the output matching performance is optimized.

Aspects of this disclosure relate to acoustic wave filters with bulk acoustic wave resonators. An acoustic wave filter can include a first bulk acoustic wave resonator configured to excite an overtone mode as a main mode and a second bulk acoustic wave resonator having a fundamental mode as a main mode.

The invention relates to the field of signal processing, and provides a signal processing method and system for a reconnaissance unmanned aerial vehicle, and the method comprises the steps: carrying out the signal decomposition of a first intermediate frequency signal obtained through the frequency mixing of an unmanned aerial vehicle signal, so as to obtain a set of signal component intrinsic mode functions; a signal analysis and processing algorithm based on deep learning is adopted to carry out waveform semantic feature extraction on the intrinsic mode function of each signal component, so that a filtered first intermediate frequency signal is automatically generated based on the significant dynamic aggregation representation of the waveform semantic feature of each signal component in a global domain; the method can dynamically adapt to the change of a signal environment and extract more representative features so as to improve the flexibility of signal processing. Compared with a traditional fixed parameter filter, the method can better deal with interference and noise in a complex environment, enables the final signal to be clearer, and improves the signal processing quality and automation level of the reconnaissance unmanned aerial vehicle.

Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a multi-mode power amplifier circuit in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The multi-mode power amplifier circuit includes a stacked output stage including a transistor stack of two or more transistors. The multi-mode power amplifier circuit also includes a bias circuit configured to control a bias of at least one transistor of the transistor stack based on a mode of the multi-mode power amplifier circuit. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.

Aspects of this disclosure relate to acoustic wave filters with bulk acoustic wave resonators. An acoustic wave filter can include a first bulk acoustic wave resonator configured to excite an overtone mode as a main mode and a second bulk acoustic wave resonator having a fundamental mode as a main mode.

Amplification circuitry is disclosed that couples neutralization transistors to amplification transistors to neutralize parasitic capacitance of the amplification transistors. Gates of a first amplification transistor and a first neutralization transistor are coupled together, and gates of a second amplification transistor and a second neutralization transistor are also coupled together. Drains of the first amplification transistor and the second neutralization transistor are coupled together, and drains of the second amplification transistor and the first neutralization transistor are also coupled together. Sources of neutralization transistors are coupled together at a node, such that a voltage swing of a first signal in the first neutralization transistor may be canceled by a voltage swing of a second signal in the second neutralization transistor. The node also couples to a resistor that prevents charge building in the neutralization transistors.

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

The invention relates to a folded cascode low noise amplifier. The disclosed low noise amplifiers (LNAs) include a common emitter amplifier (CE-A), a common gate amplifier (CG-A), and various passive devices located in CE-A and CG-A. The CE-A includes an NPN type bipolar junction transistor (BJT) having emitter and collector (E / C) regions, and a base region located between the E / C regions and connected to an input node. The CG-A includes a P-channel field effect transistor (PFET) having source and drain (S / D) regions, a channel region between the S / D regions, and a gate adjacent to the channel region. A drain region of the PFET is connected to the output node. Further, the common inductor, the collector region of the BJT, and the source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) in which the BJT and the FET are located on different chips and the passive device is located in a back-end-of-line region between the BJT and the FET.

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

A frontend circuit includes a wide-band filter, a transmit filter, and switches. The wide-band filter passes both the receive frequency band of a first communication frequency band and that of a second communication frequency band which is close to or overlaps that of the first communication frequency band. The transmit filter passes the transmit frequency band of the first or second communication frequency band. The switches are capable of simultaneously bringing, into conduction, at least two of multiple filters including the wide-band filter and the transmit filter. In carrier aggregation using the receive frequency bands of the first and second communication frequency bands, the switches simultaneously bring the wide-band filter and the transmit filter into conduction. Thus, in carrier aggregation using signals of multiple communication frequencies simultaneously in communication, attenuation of signals due to signal leakage in two receive frequency bands, which are close to each other, is suppressed.

Disclosed is a technology related to a low noise amplifier applied between an RF receiver and an RF switch. A phase difference matching circuit having the same phase difference as a positive gain amplifier is added to an output terminal of an attenuator of a low noise amplifier having a variable gain switching structure. In addition, a variable impedance circuit connected to an output terminal of the positive gain amplifier and an output terminal of a phase difference matching unit to finely adjust the phase difference of each output terminal may be further included.

A reference system is provided for generating a clock signal with a tunable noise pedestal for driving a signal generator. The reference system includes a reference source configured to generate a reference signal and a multiplier chain, including a noise pedestal generator. The noise pedestal generator includes a noise pedestal attenuator configured to attenuate the reference signal to degrade a noise floor of the reference signal, a VGA configured to adjust the attenuated reference signal to a desired signal level, a bandpass filter configured to filter out excess noise from the adjusted reference signal to form a noise pedestal, and a switch arrangement configured to selectively input the reference signal to a first path including the noise pedestal attenuator and the VGA, and a second path bypassing the noise pedestal attenuator and the VGA. The clock signal includes the noise pedestal when the first path is selected.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

A disclosed low noise amplifier (LNA) includes a common-emitter amplifier (CE-A), a common-gate amplifier (CG-A) and various passive devices in CE-A and CG-A. CE-A includes an NPN-type bipolar junction transistor (BJT) with emitter and collector (E / C) regions and a base region between the E / C regions and connected to an input node. CG-A includes P-channel field effect transistor (PFET) with source and drain (S / D) regions, a channel region between the S / D region, and a gate adjacent to the channel region. The drain region of the PFET is connected to an output node. Additionally, a common inductor, collector region of the BJT, and source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) with the BJT and FET on different chips and with passive devices in back end of the line regions between the BJT and FET.

Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a multi-mode power amplifier circuit in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The multi-mode power amplifier circuit includes a stacked output stage including a transistor stack of two or more transistors. The multi-mode power amplifier circuit also includes a bias circuit configured to control a bias of at least one transistor of the transistor stack based on a mode of the multi-mode power amplifier circuit. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.

A mixer includes a mixing stage, and a first transistor and a second transistor coupled to the mixing stage. A gate of the first transistor is coupled to a first input of the mixer, and a gate of the second transistor is coupled to a second input of the mixer. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer further includes an amplifier having a first input coupled to the source of the first transistor, and a second input coupled to the source of the second transistor. The amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first and second inputs of the amplifier.

Certain aspects of the present disclosure are directed towards techniques and apparatus for implementing concurrent matching for a transmitter and a receiver. An example transceiver may include: a transformer having a primary winding and a secondary winding; a first amplifier having a first output coupled to the primary winding; a second amplifier having an input coupled to a first terminal of the secondary winding, wherein a second terminal of the secondary winding is coupled to an antenna port of the transceiver; and a first inductive element coupled between the first terminal of the secondary winding and a reference potential node.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

An apparatus includes a first plurality of switches having a first plurality of input nodes and a first common output node, a second plurality of switches having a second plurality of input nodes and a second common output node, a low noise amplifier having a low noise amplifier input node and a low noise amplifier output node, a first matching component having a first node coupled to the first common output node and a second node coupled to the low noise amplifier input node, and a second matching component having a third node coupled to the second common output node and fourth node coupled to the first common output node and the first node, where at least two matching network configurations of the first matching component and the second matching component are obtained by configuring respective states of the first plurality of switches and the second plurality of switches.

The invention provides a low-noise amplification circuit, a radio frequency front-end module and an electronic terminal.The low-noise amplification circuit comprises an input matching adjustment circuit, a common-source amplification circuit, a first inductor, an inter-stage feedback circuit, a common-gate amplification circuit, an input and output feedback circuit, an output matching adjustment circuit and an output attenuation circuit; the common-source amplification circuit comprises at least two first signal amplification units; each first signal amplification unit comprises a first field effect transistor; the common-gate amplification circuit comprises at least two second signal amplification units; and each second signal amplification unit comprises a second field effect transistor. According to the low-noise amplification circuit, transconductance nonlinearity of devices under different bias signals can be mutually counteracted, so that the linearity fluctuation of the low-noise amplification circuit at different temperatures is optimized, and the linearity of the low-noise amplification circuit is kept basically not to change along with the temperature change.

A radio frequency front-end module includes an antenna switch module and a receive path including a low-noise amplifier and a receive filter. The receive filter is connected between a port of the antenna switch module and the low-noise amplifier. A first transmit path includes a power amplifier, a transmit filter, and an inductive coupled resonator. The inductive coupled resonator is connected between the transmit filter and the port of the antenna switch module. The transmit filter is connected between the inductive coupled resonator and the power amplifier.

Techniques for controlling remote antenna systems. An example method of receiving radio frequency signals with a remote antenna module includes providing a first signal to a remote receiver on a conductor, receiving a control signal from the remote receiver on the conductor, wherein the control signal is a bias voltage on the conductor, and providing a second signal on the conductor in response to receiving the control signal.

Aspects of the present disclosure provide a circuit configured to adjust an input impedance of an amplifier such as a low-noise amplifier. In certain aspects, the circuit is coupled to a node, wherein the node is between a first transistor and a second transistor of the amplifier. The circuit may include an inductor and a capacitor coupled in series, wherein the inductor is coupled with one or more load inductors of the amplifier through negative magnetic coupling.

A disclosed low noise amplifier (LNA) includes a common-emitter amplifier (CE-A), a common-gate amplifier (CG-A) and various passive devices in CE-A and CG-A. CE-A includes an NPN-type bipolar junction transistor (BJT) with emitter and collector (E / C) regions and a base region between the E / C regions and connected to an input node. CG-A includes P-channel field effect transistor (PFET) with source and drain (S / D) regions, a channel region between the S / D region, and a gate adjacent to the channel region. The drain region of the PFET is connected to an output node. Additionally, a common inductor, collector region of the BJT, and source region of the PFET are connected at an intermediate node. The LNA is implemented on a three-dimensional integrated circuit (3DIC) with the BJT and FET on different chips and with passive devices in back end of the line regions between the BJT and FET.

Certain aspects of the present disclosure are directed towards apparatus and techniques for wireless communication. An example apparatus generally includes: a first transmitter circuit; a second transmitter circuit; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; and a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail.

Certain aspects of the present disclosure provide techniques for pre-distortion training feedback via inductive coupling. An example apparatus includes a receive path; a transmit path comprising an amplifier having a first output that is inductively coupled to the receive path; a memory; and a processor coupled to the memory. The processor is configured to cause the apparatus to obtain a first signal, based on a second signal output by the amplifier, via the receive path being inductively coupled to the first output of the amplifier; determine a parameter for pre-distortion associated with the amplifier based at least in part on the first signal; pre-distort a third signal based at least in part on the parameter; amplify the pre-distorted third signal via the amplifier; and transmit the amplified third signal.

A power amplification circuit may comprise a power distributor configured to receive a radio frequency (RF) signal and output a first RF signal and a second RF signal, a first power amplifier configured to receive the first RF signal from the power distributor and amplify the first RF signal based on a first bias, a second power amplifier configured to receive the second RF signal from the power distributor and amplify the second RF signal based on a second bias, an impedance matching circuit configured to receive the first RF signal amplified by the first power amplifier and the second RF signal amplified by the second power amplifier, and a protection circuit configured to identify a current input to a bias terminal of the second power amplifier and, control a magnitude of the current input to the bias terminal based on the identified input current.

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor (“capless LNAs”). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.