93results about How to "Increase power gain" patented technology

A low power low noise amplifier achieves a high power gain without increasing power consumption by sharing the bias current. The amplifier is composed of a cascade structure which consists of a parallel connected common source transistor and common gate transistor connected to a common source transistor, an inverter type structure connected to the common source transistor, and structure improving the third-order intermodulation component using the parallel connected common source transistor and common gate transistor.

Provided is a distributed amplifier in communication systems, including: an input transmission line; an output transmission line; an input impedance match and an output impedance match, for providing termination of the input transmission line and the output transmission line, respectively and for preventing signal reflection in the input transmission line and the output transmission line, respectively; multi-stage Gm cells with common mode feedback, the input transmission line being coupled to the output transmission line by the transconductance of the Gm cells; and an input gate bias circuit, for providing bias for the multi-stage Gm cells. In at least one of the Gm cells, one inverter performs V / I conversion while other inverters provide negative resistance to control common mode of output voltage and to enhance DC gain of the Gm cell. Due to common mode feedback, no output gate bias is needed.

The invention discloses a high-gain and high-power millimeter wave power amplifier which comprises a four-way three-level pseudo differential amplifier. The pseudo differential amplifier adopts capacitance neutralization technology. An input-output circuit adopts a transformer of 2:4 to complete power distribution and power synthesis. The transformer, a transmission line and a shunt inductor are adopted among levels of the amplifier to carry out impedance matching. The pseudo differential amplifier uses the capacitance neutralization technology and improves stability of the circuit and gain. Due to the fact that the shunt inductor is added in a matching network formed by the common transmission line and the transformer, loss among the levels of the matching network can be reduced. The high-gain and high-power millimeter wave power amplifier uses the transformer of 2:4, can achieve four-way power synthesis and impedance matching, greatly improves output power, and decreases the area at the same time.

The invention discloses a radio-frequency power amplifier with a stack structure. The radio-frequency power amplifier comprises an input matching circuit, an output broadband matching circuit, a biasing circuit A, a biasing circuit B and a power amplification circuit, and the power amplification circuit is formed by stacking of at least two transistors with drains and sources connected. A radio-frequency signal source is connected with a grid electrode of the bottom transistor of the power amplification circuit through the input matching circuit, the biasing circuit B is connected with the grid electrode of the bottom transistor, and the source of the bottom transistor is grounded. The drain of the top transistor of the power amplification circuit is connected with a load through the output broadband matching circuit. Integral linearity, output voltage swing, operation bandwidth, power efficiency, power gain and maximum output power of the radio-frequency power amplifier are increased, and excellent second harmonic inhibition effects are achieved.

The present invention provides a new method and apparatus, in a network device of a multi-carrier based wireless access network, for transmitting uplink data to access device side, and the corresponding method and apparatus for channel estimation in its uplink counterpart device, wherein, a plurality of network device comprise one or more multi-antenna network devices, at least one of the multi-antenna network device transmits multipath subcarrier modulated symbols via a plurality of transmitting antennas configured for itself, wherein, at least two transmitting antennas use different subcarrier sets, but share one pilot pattern, wherein, pilot pattern used by each network device is different from the pilot pattern used by any other network device. The present invention not only can fully utilize the frequency diversity introduced by the plurality of transmitting antennas, but also can guarantee a relative high antenna power gain and save as much time-frequency resource cost caused by pilot signal as possible.

high-gain and low-noise low noise amplifier (LNA) includes a differential amplifier, a pre-amplifier and an impedance matching network. The differential amplifier includes a first input end and a second input end coupled to a grounded impedance. The pre-amplifier includes an input end and an output end. The impedance matching network is coupled between the first input end of the differential amplifier and the output end of the pre-amplifier for matching an input impedance of the differential amplifier with an output impedance of the pre-amplifier. The present invention provides a LNA structure with low noise, high gain and easy design.

A filtering method, a transceiver and a transmitter are provided. The transmitter comprises a power amplifier amplifying an RF signal and having multiple stages, and a local oscillator, the power amplifier comprising between at least two stages of the power amplifier an impedance circuitry for forming an impedance at a frequency related to the frequency of the local oscillator, and a switch for switching the impedance of the impedance circuitry means to RF frequency.

The invention discloses a drive power amplifier with the adjustable gain of a 0.1-3GHz CMOS. The drive power amplifier comprises an input match circuit, an ultra-wideband drive stage amplifying circuit, a gain-adjustable amplifying circuit, an ultra-wideband power amplifying circuit and an output blocking circuit. A first ultra-wideband drive stage is used for achieving preceding-stage gain and ensuring ultra-wideband input match of the whole circuit. A gain control circuit is used for controlling power gain of wideband radio frequency signals and the good inter-ultra-wideband matching property. A third ultra-wideband drive power stage is used for ensuring large power output of the whole circuit and the good wideband output matching property. A three-stage stacking structure is combined with a compensation capacitance circuit, and the area of a chip is small. In the whole circuit, parameters of an adopted component can be determined according to indexes of items such as the whole circuit gain, the wideband and the output power, and therefore the adjustable gain, the high-linearity and the high drive power within the 0.1-3GHz can be achieved.

A heatsink for dissipating heat generated by electronic components comprising an outer frame of copper tungsten or copper molybdenum metal matrix composite having a cavity extending between the top and the bottom surfaces, a copper-diamond composite material within the opening, and copper plating on the top and the bottom surfaces. The heatsink also includes an array of alternating layers of copper and a material selected from the group of molybdenum and copper / molybdenum metal matrix surrounding the outer frame. The heatsink can be manufactured by press fitting at room temperature a porous isotropic diamond material in the cavity of an outer frame of porous tungsten or molybdenum, co-infiltrating the assembly under pressure with copper, press fitting at room temperature the outer frame into the layered array, and subjecting the heatsink to a temperature of approximately 800 Deg C.

Power amplifiers for amplifying a radio frequency signal are provided. The power amplifier may include an envelope tracking power supply, a carrier amplifier coupled with the envelope tracking power supply and configured to amplify the radio frequency signal, an input matching network configured to split the amplified radio frequency signal from the carrier amplifier such that one part of the amplified radio frequency signal passes along a peak amplifier path and another part of the amplified radio frequency signal passes along an impedance transformer path, a peak amplifier coupled with the envelope tracking power supply and configured to amplify the one part of the amplified radio frequency signal from the input matching network, an impedance transformer configured to perform impedance transformation on the other part of the amplified radio frequency signal from the input matching network, an output matching network configured to combine the output of the peak amplifier and the impedance transformer, wherein the peak amplifier is configured to be switched off in a lower power mode and switched on in a high power mode based at least in part on an input power level of the radio frequency signal. With the claimed solutions, more powerful and efficient power amplifiers that are capable of operating over broader frequency ranges may be achieved.

A heterojunction bipolar transistor, having a structure in which a subcollector layer of a first conductive type having a higher doping concentration than a collector layer, a collector layer of the first conductive type, a base layer of the second conductive type, and an emitter layer of the first conductive type are deposited, in order, on a semi-insulating semiconductor substrate, and in which a hole barrier layer of semiconductor material with a band gap wider than that of the base layer is inserted between the base layer and the collector layer, so as to be in direct contact with the base layer.

A piezoelectric actuator having a bottom electrode attached to a membrane, a piezoelectric layer on the bottom electrode, and a top electrode formed on the piezoelectric layer, wherein the bottom electrode extends substantially over the entire bottom surface of the piezoelectric layer, and at least a peripheral portion of a top surface of the piezoelectric layer and side faces of that layer are covered with an insulating layer, and wherein in the peripheral portion of the top surface of the piezoelectric layer the top electrode is superposed on the insulating layer.

A wideband low-noise amplifier includes a source-degenerated common-source amplifier, a common-gate amplifier, and a matching frequency band determiner. The source-degenerated common-source amplifier is configured to amplify an input signal to output a first signal that is opposite in phase to the input signal. The common-gate amplifier is connected in parallel to the source-degenerated common-source amplifier to amplify the input signal to output a second signal that has the same phase as the input signal. The matching frequency band determiner is configured to isolate an input terminal of the source-degenerated common-source amplifier and an input terminal of the common-gate amplifier and determine a matching frequency band.

The invention discloses a strong anti-mismatch high-efficiency power amplifier based on a transistor stacking technology. The power amplifier comprises a -45-degree phase-shifting input matching network, a +45-degree phase-shifting input matching network, a double-path balance type three-stack power amplification network, a +45-degree phase-shifting output matching network, a -45-degree phase-shifting output matching network, a first power supply bias network and a second power supply bias network. According to the power amplifier, a three-stack transistor amplification network is adopted to realize an amplification function of the balance type amplifier, so that the power gain and the power capacity of the balance type power amplifier are improved, and meanwhile, a three-stage T-shaped filtering type phase-shifting circuit is used for realizing the + / -45-degree phase-shifting control of two paths of balance signals and input and output impedance matching, so that the anti-mismatch characteristic of the amplifier is greatly improved on the premise of ensuring low insertion loss and high efficiency, and thus the stability and the reliability of the circuit are improved. A strong anti-mismatch high-efficiency power amplifier chip circuit realized by the invention is high in output power, high in power gain and small in area.

An improved tunable antenna of planar construction is distinguished by the following features:in plan view perpendicular to the effective surface (7), the electrically conductive structure (13, 113) completely or partially covers the effective surface (7),the electrically conductive structure (13, 113) is coupled and / or connected galvanically or capacitively or serially and / or with interposition with at least one electrical component (125) with the ground surface (3) and / or a chassis (B) located on a potential or ground.

The invention relates to an active phase shifter, and provides an on-chip active phase shifter based on a vector synthesis technology. The on-chip active phase shifter is used for solving the problems that an active phase shifter is high in power consumption and large in phase error and amplitude error. The on-chip active phase shifter based on the vector synthesis technology comprises a power distribution unit, an orthogonal signal generation unit, two differential signal generation units, a signal synthesis unit and an output balun; a single-ended input signal is input to the input end of the power distribution unit, the power distribution unit divides the input signal into two paths of in-phase signals to be output to the orthogonal signal generation unit which produces a group of orthogonal signals to be input to the two differential signal generation units respectively, each differential signal generation unit produces a group of differential signals to be input to the signal synthesis unit, and the signal synthesis unit synthesizes the two groups of the differential signals into one group of differential signal to be input to the output balun. The active phase shifter is simple in structure, capable of effectively improving signal power gain on the condition that the low circuit power consumption and high phase accuracy are guaranteed and suitable for large-scale application and promotion.

The invention relates to a high reflection gain type photovoltaic packaging glue film and applications; the packaging glue film comprises a package layer and a reflection layer; the package layer is 200-500 micron in thickness, and comprises a first body resin, a modified auxiliary agent, a UV auxiliary agent, an anti-heat and oxygen aging agent and an initiator, wherein said materials are mixed and fused at 60-200 DEG C, thus forming the film through the film casting technology; the reflection layer is 5-200 micron in thickness, and comprises a second body resin, an auxiliary resin, a first filling, a second filling, a modified auxiliary agent, a diluents, a UV auxiliary agent, an anti-heat and oxygen aging agent and an initiator, wherein said materials are mixed and coated on the surface of the package layer, and solidified at the temperature of 30-150 DEG C so as to form the reflection layer. The preparation technology is simple and low in cost, and the product is excellent in performance, thus providing effective gain effect for a double-face crystal silicon cell assembly, providing basis for cost optimization of one side crystal silicon cell assembly gain type packaging material, and simultaneously providing stability and reliability of the crystal silicon photovoltaic assembly in outdoor long time applications.

The invention relates to an arrangement and circuit, and to a method for interconnecting flat rigid or flexible solar cells, the photoelectrically active layers thereof being applied to an insulating substrate material. The solar cells (1) in the arrangement and circuit of flat rigid or flexible solar cells are disposed overlapping in the contact area to one or more adjacent solar cells (1), as is already known as such.; Said solar cells (1) are interconnected to each other directly once or a plurality of times in a novel manner, having a contact material (10) at the overlapping area to each other, using contact material (10) or switching points (22). In the method, an electrically conductive layer is generated on an entire solar cell matrix made of a plurality of overlapping solar cells (1) at individual or, if necessary, selectively at a plurality of (optionally a great many of) switching points (22), by means of screen printing, dispensing, spraying, vaporization, sputtering, or galvanically precipitating. Said layer, or the corresponding number of layers, are then applied pointwise to the corresponding locations so that the back side contact (7) of each of the upper solar cells (1) is connected to the front side contact (17) of the immediately adjacent overlapping solar cell (1).; The contact material (10) can be applied and disposed here as a continuous strand or as individual or a plurality of contacts in one or more switching points (22). The invention can be applied for rigid or flexible solar cells, particularly those produced using thin film technology. Said solar cells can also be individual, discrete solar cells, or also a plurality of so-called monolithically interconnected solar cells on a common substrate material.

The invention discloses a radio frequency power amplifier in a two-stage stack structure, comprising an input matching circuit, an output bandwidth matching circuit, and a two-stage amplifier circuit formed by cascading interstage matching circuits. A preceding stage of the two-stage amplifier circuit is a driving stage, and a following stage thereof is a power stage; a radio frequency signal source is connected with a gate electrode of a transistor in the bottommost layer of the driving stage through the input matching circuit, a drain electrode of a transistor in the uppermost layer of the driving stage is connected with one end of the corresponding interstage matching circuit, the other end of this interstage matching circuit is connected with a gate electrode of a transistor in the bottommost layer of the power stage, and a drain electrode of a transistor in the uppermost layer of the power stage is connected with a load through the output bandwidth matching circuit. This circuit enables improvements in the voltage withstand capacity, output voltage swing, operation bandwidth, power efficiency, power gain and maximum output power of the power amplifier and provides better harmonic suppression effect.

The invention discloses a power-enhanced transparent mesh backplane, which is composed of a mesh layer and a transparent backplane layer, wherein the mesh layer is coated on the transparent backplanelayer. The transparent backplane layer maintains good light transmittance, and the grid layer has good reflectivity, so that the solar ray can be reflected back to the surface of the battery sheet, thereby fully utilizing the solar ray, and comprehensively enhancing the power generation effect of the double glass module. In addition, the backboard designed by the invention has excellent adhesion,insulation, ultraviolet resistance and damp-heat aging resistance, and can ensure the long-term reliability of the double-glass module in the outdoor environment.

A method for monitoring and measuring an insulation resistance in ungrounded and grounded power supply systems includes the method steps of generating a periodic measuring signal, coupling in the measuring signal between active conductors of the power supply system to be monitored and ground, and detecting and evaluating measured values of the measuring signal. In one embodiment of the invention, the generated measuring signal is formed as a multi-frequency signal by the superposition of a finite number of harmonic oscillations with at least three harmonics. Alternatively, the multi-frequency signal can also be realized by means of a targeted, portioned construction of the signal shape in the time domain on the basis of a binary sequence optimization or by generating the measuring signal by means of the time-division multiplexing method.

A piezoelectric actuator having a bottom electrode attached to a membrane, a piezoelectric layer on the bottom electrode, and a top electrode formed on the piezoelectric layer, wherein the bottom electrode extends substantially over the entire bottom surface of the piezoelectric layer, and at least a peripheral portion of a top surface of the piezoelectric layer and side faces of that layer are covered with an insulating layer, and wherein in the peripheral portion of the top surface of the piezoelectric layer the top electrode is superposed on the insulating layer.

The invention discloses an RF (radio frequency) transceiver circuit system. The system comprises an on-chip circuit and a matching circuit connected with the on-chip circuit; the matching circuit is in circuit connection with the on-chip circuit through a first port, a second port and a third port; the on-chip circuit comprises a transmitter circuit and a receiver circuit in circuit connection with the transmitter circuit; the first port is in circuit connection with a voltage stabilizer of a receiver and a voltage stabilizer of a transmitter respectively; the second port is in circuit connection the voltage stabilizer of the transmitter and a first-stage amplifier respectively; and the third port is in circuit connection with a second-stage amplifier and a low-noise amplifier. According to the invention, the third port just needs to be arranged on a radio frequency signal channel, and only one inductor is adopted in the matching circuit, so that off-chip matching circuit is simplified and the cost of off-chip components BOM (Bill of Material) is reduced.

A compound semiconductor integrated circuit is provided, comprising a substrate, at least one compound semiconductor electronic device, a first metal layer, a protection layer, a plurality of second metal layers, and at least one dielectric layer. The first metal layer contains Au but does not contain Cu, and is at least partly electrically connected to the compound semiconductor electronic device. The protection layer covers the compound semiconductor electronic device and at least part of the first metal layer. Each of the plurality of second metal layers contains at least a Cu layer, and at least one of the plurality of second metal layers is partly electrically connected to the first metal layer described above. The at least one dielectric layer separates each pair of adjacent second metal layers. The second metal layers are used to form passive electronic components.

The stereotype tabulate antenna includes a reflection unit, a first radiating element (RE), and a second RE. The reflection unit possesses a first reflection plane (RP), and a second RP. Being setup opposite to the first RP of the reflection unit, the first RE possesses a first radiation portion, and a first electrical connection portion. One end of the said first electrical connection portion is connected to the first radiation portion electrically, and the first radiation portion is parallel to the first RP approximately. Being setup opposite to the second RP of the reflection unit, the second RE possesses a second radiation portion, and a second electrical connection portion. The second radiation portion is parallel to the second RP approximately. One end of the second electrical connection portion is connected to the second radiation portion electrically, and the other end is connected to the other end of the first electrical connection portion.

A device includes a substrate; a buffer layer on the substrate; a barrier layer on the buffer layer, a source electrically coupled to the barrier layer; a gate electrically coupled to the barrier layer; and a drain electrically coupled to the barrier layer. The device further includes an electron concentration reduction structure arranged with at least one of the following: in the barrier layer and on the barrier layer. The electron concentration reduction structure is configured to at least one of the following: reduce electron concentration around the gate, reduce electron concentration around an edge of the gate, reduce electron concentration, increase power gain, increase efficiency, decouple the gate from the drain, decouple the gate from the source, and reduce capacitance.

The invention discloses a high gain V wave band power amplifier based on genetic algorithm optimization. The power amplifier comprises two stages of pseudo differential common source structures whichare in tandem connection successively, and the pseudo differential common-source amplifier structures adopt the cross coupling capacitance neutralization technology; the input-stage matching network adopts a series capacitance shunt inductance mode; two stages of amplifiers directly adopt a capacitance direct coupling link for matching. A shunt inductance is adopted in the input-stage matching network so that matching network loss can be reduced; in addition, the cross coupling capacitance neutralization is adopted to improve power gain, improve circuit reverse isolation and stability, and achieve high gain under the circumstance of not increasing extra power dissipation. In order to solve the center frequency and matching performance deviation theoretical value caused by element parasitism, the genetic algorithm is adopted to slightly adjust sizes of passive devices (inductances) and CMOS transistors so that the circuit can reach the optimum performance under the parasitic effect influence. The circuit designed by the power amplifier is simple in structure and easy to design and implement.

A balanced and active coplanar microwave coupler for an MMIC, comprising FETs provided with metal grid, source, and drain electrodes integrated with coplanar plane metal elements combined to constitute the inlet and outlet accesses of the coupler. All of the access are constituted by an association comprising one or more CPSes and one or more CPWs.

The invention discloses a high-power and high-efficiency power amplifier insensitive to source impedance and load impedance. An amplification function of a balance type amplifier is realized through adoption of four ways of three-stack transistor amplification networks, the power gain and power capacity of the balance type amplifier are greatly improved; and moreover, + / -45-degree and + / -135-degree phase-shifting control and input and output impedance matching of four ways of balance signals are realized through utilization of a multi-level T-type filtering phase shift circuit, so on the premise of low insertion loss and high efficiency, the sensitivity of the amplifier for the source impedance and the load impedance is greatly reduced, and the circuit stability and robustness are improved. According to the high-power and high-efficiency power amplifier insensitive to the source impedance and the load impedance realized by the invention, the output power is high, the power gain is high, and the low load impedance sensitivity is high.

A semiconductor device has a plurality of external connection lead terminals including an input lead terminal, an output lead terminal, and an RF grounding lead terminal, a heat dissipation plate connected to the RF grounding lead terminal, a semiconductor device and a printed circuit board each mounted on the heat dissipation plate, and a mold resin for sealing the semiconductor device, the printed circuit board, and the heat dissipation plate such that at least a part of the back surface of the heat dissipation plate is exposed. The semiconductor device amplifies a signal inputted to the input lead terminal and outputs the amplified signal from the output lead terminal.