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555results about How to "Reduced risk of short circuits" patented technology

Metal lithium negative electrode piece, preparation method thereof and metal lithium secondary battery

The invention discloses a metal lithium negative electrode piece, a preparation method thereof and a metal lithium secondary battery. The metal lithium negative electrode piece comprises a current collector, wherein a metal lithium layer is formed on the current collector; a composite conductive film is formed on the metal lithium layer. The preparation method of the metal lithium negative electrode piece comprises the following steps: laminating a metal lithium foil and the current collector together, or plating lithium metal on the surface of the current collector; dissolving a polymer electrolyte in a solvent to prepare a polymer electrolyte solution; adding a conductive agent into the polymer electrolyte solution; stirring uniformly and then coating a mixed solution on the metal lithium layer; after evaporating the solvent, forming the composite conductive film on the surface of the metal lithium layer to obtain the metal lithium negative electrode piece; or, coating the mixed solution on a substrate and evaporating the solvent to obtain the composite conductive film, laminating the composite conductive film on the surface of the metal lithium layer to form the composite conductive film and obtain the metal lithium negative electrode piece. The metal lithium negative electrode piece provided by the invention can inhibit lithium dendrites, prevent batteries from being short-circuited, and improve safety performance and cycling performance of lithium batteries.
Owner:ZHUHAI COSMX BATTERY CO LTD

High-power high-capacity lithium ion battery and preparation method thereof

ActiveCN106469825AMeet the requirements of instantaneous high-power workMeet the requirements of large capacityFinal product manufactureElectrode carriers/collectorsInternal resistanceElectrical battery
The invention provides a high-power high-capacity lithium ion battery and a preparation method thereof. by changing the structure of electrodes and placement position of current collectors in existing lithium ion battery, an electrode material layer is arranged between two layers of current collectors to form an electrode, and positive and negative current collectors are respectively positioned at two sides of a diaphragm instead of being positioned inside the electrode material layer. According to the structure, the battery electrode layer is close to a reaction area for porous current collector, and there is always a low-internal-resistance area. Thus, the battery can meet requirement of instantaneous high-power operation. Meanwhile, thickness of the electrode layer can be greatly increased, and the requirement of a battery on large capacity can be met. Therefore, the contradiction that the increase of battery capacity leads to instantaneous power coastdown of a battery is effectively solved. As the porous current collector is arranged between the electrode layer and the diaphragm, direct contact between the electrode material layer and the diaphragm is avoided, the internal short-circuited risk caused by positive and negative active particles and a nano-conducting layer entering the diaphragm is reduced, and safety of the battery is raised.
Owner:BEIJING HAWAGA POWER STORAGE TECH

Inorganic/organic composite porous isolating membrane, preparation method and lithium-ion battery thereof

The invention discloses an inorganic/organic composite functional porous isolating membrane. The isolating membrane comprises porous base material and at least one inorganic functional coating adhering to the surface of the porous base material, and aqueous slurry prepared for the inorganic functional coatings is prepared from inorganic ceramic particles, water-soluble polymer thickener and aqueous polymer adhesive; the inorganic ceramic particles comprise the same substance in two types of particle sizes, wherein the average particle size (D50) of the smaller inorganic ceramic particles is 0.2-0.5 micrometer, and the average particle size (D50) of the larger inorganic ceramic particles is 0.6-1.0 micrometer; the aqueous polymer adhesive is a hydrophobic high-molecular polymer with the water drop contact angle of the dry adhesive of the aqueous polymer adhesive 110-140 degrees; the solid content of the aqueous slurry is 40-60%. According to the inorganic/organic composite functional porous isolating membrane, the high-temperature thermal stability of the isolating membrane can be effectively improved by means of the inorganic functional coatings, and the water content of the inorganic coatings is effectively reduced, so that the safe performance of a battery and the stability of long-term circulation are improved.
Owner:深圳市旭然电子有限公司

Integrated-form water-cooling power battery shell used for new energy automobiles

The invention discloses an integrated-form water-cooling power battery shell used for new energy automobiles. The integrated-form water-cooling power battery shell used for new energy automobiles comprises an upper shell body and a lower shell body; the lower shell body is composed of a bottom plate and a side plate; the bottom plate is a cuboid, and is of a double layer structure composed of an upper layer bottom plate and a lower layer bottom plate; vertical ribs are uniformly arranged between the upper layer bottom plate and the lower layer bottom plate; a plurality of cooling water runnersare arranged between the upper layer bottom plate and the lower layer bottom plate; the cooling water runners are arranged to be parallel to the width direction of the bottom plate; the side plate isa rectangle frame composed of two long edge side plates and two short edge side plates; a water inlet channel and a water outlet channel are arranged on the external sides of the two long edge side plates respectively; one end of each cooling water runner is communicated with the water inlet channel, and the other end is communicated with the water outlet channel. According to the integrated-formwater-cooling power battery shell, a cooling device is arranged on the lower shell body via integration, so that the battery shell whole structure is simplified greatly, and the cost of the battery shell is reduced; the cooling water runners are arranged in the bottom plate of the lower shell body, so that the risk of module short circuit caused by water leakage of conventional cooling pipelinesis reduced; and the external walls of the cooling water runners are contacted with battery modules, so that cooling effect is improved.
Owner:LINGYUN INDAL CORP

Inorganic/organic compound functional porous isolating membrane and preparation method as well as lithium ion battery adopting inorganic/organic compound functional porous isolating membrane

ActiveCN105789523AGood dispersionImproved high temperature thermal stabilitySecondary cellsCell component detailsPorous substrateOrganic compound
The invention provides an inorganic / organic compound functional porous isolating membrane. The inorganic / organic compound functional porous isolating membrane comprises a porous substrate and an inorganic functional coating which is adhered to at least one surface of the porous substrate, wherein the inorganic functional coating is prepared from inorganic ceramic particles, a water-soluble macromolecular thickening agent, a water emulsion type polymer binding agent and a water soluble type polymer binding agent; the water emulsion type polymer binding agent is a macromolecular polymer with the surface tensile force of 40dyne / cm to 50dyne / cm, and a water drip contact angle of water emulsion type polymer binding agent dry glue is 100 degrees to 130 degrees; the water emulsion type polymer binding agent is a polar macromolecular polymer with the glass transition temperature of 100 DEG C to 150 DEG C. Therefore, the inorganic / organic compound functional porous isolating membrane has the advantages that the heat stability of the isolating membrane can be effectively improved, and the moisture content of the inorganic coating can also be reduced, so that the safety performance of a battery and the stability of long-period cycle are improved.
Owner:深圳市旭然电子有限公司

Array substrate, manufacturing method thereof and display device

The invention discloses an array substrate, a manufacturing method thereof and a display device, and belongs to the field of display. The array substrate includes a substrate, a first metal layer, a second metal layer, and a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are disposed on the substrate; the array substrate is divided into a displayarea and a peripheral area; the peripheral area of the array substrate is provided with a plurality of signal line leads, one part of the plurality of signal line leads are located at the first metallayer, another part of the plurality of signal line leads are located in at least one layer of the third metal layer and the second metal layer, the first metal layer includes a shading layer locatedat the display area, the second metal layer comprises a gate layer located at the display area, and the third metal layer includes a source and drain layer located at the display area. In the case where the peripheral area is small, the wiring congestion of the signal line leads is alleviated, the signal line lead pitch is increased, a short circuit risk is lowered, and the signal line leads canbe designed to be thicker due to the reduced wiring congestion, thereby avoiding the open circuit risk of the signal line leads.
Owner:BOE TECH GRP CO LTD +1

Array substrate, liquid crystal display panel and touch display device

The present invention discloses an array substrate, a liquid crystal display panel and a touch display device. The array substrate comprises: a base substrate, as well as a touch trace layer including a plurality of touch traces, a first insulating layer, touch electrode layer including a plurality of touch electrode blocks in matrix arrangement, a second insulating layer, and a pixel electrode layer including a plurality of pixel electrodes in matrix arrangement and a bridge structure, which are disposed on the base substrate in sequence, wherein the touch traces are electrically connected to the corresponding touch electrode blocks by means of the bridge structure; the bridge structure fills up and runs through first via holes of the second insulating layer that expose the touch electrode blocks and run through second via holes of the second insulating layer and the first insulating layer that expose the traces; and the bridge structure is located between every two adjacent columns of pixel electrodes, and the first via holes and the second via holes that the bridge structure correspondingly fills up are spaced apart by at least one row of pixel electrodes. With the technical solution provided in the present invention, risks of short-circuiting between the bridge structure and the pixel electors are reduced, and the yield of manufacturing of liquid crystal display panels is improved.
Owner:XIAMEN TIANMA MICRO ELECTRONICS

Arrangement and circuit, and method for interconnecting flat solar cells

InactiveCN102714249AReliable and persistent interconnectionReduced risk of short circuitsDiodeEnergy conversion devicesScreen printingEngineering
The invention relates to an arrangement and circuit, and to a method for interconnecting flat rigid or flexible solar cells, the photoelectrically active layers thereof being applied to an insulating substrate material. The solar cells (1) in the arrangement and circuit of flat rigid or flexible solar cells are disposed overlapping in the contact area to one or more adjacent solar cells (1), as is already known as such.; Said solar cells (1) are interconnected to each other directly once or a plurality of times in a novel manner, having a contact material (10) at the overlapping area to each other, using contact material (10) or switching points (22). In the method, an electrically conductive layer is generated on an entire solar cell matrix made of a plurality of overlapping solar cells (1) at individual or, if necessary, selectively at a plurality of (optionally a great many of) switching points (22), by means of screen printing, dispensing, spraying, vaporization, sputtering, or galvanically precipitating. Said layer, or the corresponding number of layers, are then applied pointwise to the corresponding locations so that the back side contact (7) of each of the upper solar cells (1) is connected to the front side contact (17) of the immediately adjacent overlapping solar cell (1).; The contact material (10) can be applied and disposed here as a continuous strand or as individual or a plurality of contacts in one or more switching points (22). The invention can be applied for rigid or flexible solar cells, particularly those produced using thin film technology. Said solar cells can also be individual, discrete solar cells, or also a plurality of so-called monolithically interconnected solar cells on a common substrate material.
Owner:太阳离子股份公司

Array substrate and preparation method thereof

The invention discloses an array substrate and a preparation method thereof. The array substrate comprises a substrate, a buffer layer, a semiconductor pattern layer, a first grid electrode insulation layer, a second grid electrode insulation layer, a first conductive pattern layer, an interlayer insulation layer and a second conductive pattern layer, wherein the substrate comprises a thin-film transistor region and a capacitor region; the buffer layer is formed on the substrate; the semiconductor pattern layer is formed on the buffer layer and comprises a source and drain electrode region and a first electrode; the first grid electrode insulation layer is formed on the semiconductor pattern layer and correspondingly covers regions, except the first electrode, of the thin-film transistor region and the capacitor region; the second grid electrode insulation layer is formed on the first grid electrode insulation layer; the first conductive pattern layer is formed on the second grid electrode insulation layer and comprises a grid electrode and a second electrode; the interlayer insulation layer is formed on the first conductive pattern layer; the second conductive pattern layer is formed on the interlayer insulation layer and comprises a source electrode and a drain electrode which are coupled with the source and drain electrode region as well as a third electrode. With the adoption of the array substrate and the preparation method thereof, the capacitance of a capacitor is increased, film layer structures of the regions except the capacitor region are not changed, the signal line load is effectively decreased, and meanwhile, short-circuit risks of upper and lower film layers of the grid electrode insulation layers are reduced.
Owner:KUNSHAN GO VISIONOX OPTO ELECTRONICS CO LTD

Wafer bonding method and wafer bonding structure

The invention provides a wafer bonding method and a wafer bonding structure. The wafer bonding method is characterized in that before the wafer bonding processing, an interlayer dielectric layer is formed on a wafer, and the interlayer dielectric layer comprises a first dielectric layer and an insulation layer, which are formed sequentially; an interconnection structure can be formed in the interlayer dielectric layer, and a part of the interconnection structure is protruded from the surface of the interlayer dielectric layer, and is a bonding end of the interconnection structure; and side walls are formed on the side walls of the bonding end. The wafer bonding method and the wafer bonding structure are advantageous in that the insulation layer is used to completely cover the surface of the interlayer dielectric layer, and the side walls are used to cover the side walls of the bonding end; after the bonding processing of a plurality of wafers, the adjacent bonding ends are provided with the insulation layers and the side walls for the isolation, and the short circuit is not easy to occur; and in addition, under the protection of the side walls, the bonding ends are not exposed in the external environment, and the oxide is not easy to form under the influence of the oxygen and the water vapour, and at the same time, the short circuit risk can be reduced.
Owner:SEMICON MFG INT (SHANGHAI) CORP

Fractional-slot concentrated winding permanent magnet synchronous motor and design method thereof for improving reluctance torque

The invention discloses fractional-slot concentrated winding permanent magnet synchronous motor and a design method thereof for improving reluctance torque. The fractional-slot concentrated winding permanent magnet synchronous motor comprises a stator and a rotor, wherein the stator is slotted along the peripheral direction to form fault-tolerant teeth and armature teeth arranged alternately; an armature winding is wound on the armature teeth, the fault-tolerant teeth and the armature teeth are different in widths, and the widths of the armature teeth are wider than those of the fault-tolerantteeth; the rotor consists of a permanent magnet, a rotor core and a magnetic obstacle, the permanent magnet is a double-layer permanent magnet, the rotor core is composed of a plurality of independent units, and during machining, the rotor is wrapped with a non-metal material to form a compact structure. The rotor core is segmented along the axis pole direction of the permanent magnet, and the width of the upper part of the magnetic obstacle during segmentation is narrower than that of the lower part. The permanent magnet synchronous motor has the advantages that the direct-axis inductance can be reduced through the special magnetic obstacle design, the influence on quadrature axis inductance can also be reduced as much as possible, and the subharmonic of the motor is free of obvious inhibition. Therefore, the reluctance torque of the motor can be improved effectively, and the iron loss and eddy-current loss of the motor are reduced.
Owner:JIANGSU UNIV

Antistatic protection structure and reliability improving method of semiconductor panel

The invention provides an antistatic protection structure and a reliability improving method of a semiconductor panel. The antistatic protection structure comprises an antistatic protection ring, a circuit module and pads, each pad is in short-circuit connection with the antistatic protection ring via a short-circuit line, part, connected with the short-circuit lines, of the antistatic protection ring is positioned at the outer side of a cutting line of the semiconductor panel, and a passivation insulating layer over the short-circuit lines in the semiconductor panel is internally provided with a cut-off window out of which a short-circuit line film layer is exposed. In the manufacture process of the panel, different points of the circuit are kept in the same potential, and static injury is avoided; before completion of the manufacture process of the panel, the short-circuit lines are cut off to disconnect the pads from the antistatic protection ring; and after completion of the manufacture process of the panel, the parts outside the panel of the short-circuit lines are cut to realize dual electrical isolation of the circuit module from the antistatic protection ring. On the premise that a static protection effect is ensured, the reliability of the panel is improved greatly.
Owner:SHANGHAI IRAY TECH

Capacitor structure and manufacturing method thereof

The invention provides a capacitor structure and a manufacturing method thereof, and the method comprises the steps: forming an etching stop layer, a lower sacrificial layer, a central supporting layer, a top sacrificial layer, a first supporting layer, and a stress relieving layer on a bottom substrate, wherein the bottom substrate is provided with a contact hole; etching the stress relieving layer based on a first pattern mask to form a stress relieving part; forming a second supporting layer on the first supporting layer and the stress relieving part, wherein the first supporting layer andthe second supporting layer wrap the stress relieving part to form a top supporting layer; etching the top supporting layer based on the second pattern mask to form a primary capacitance hole; forminga lower electrode layer at least on the surface of the inner wall of the primary capacitor hole; etching at least the top supporting layer based on a third pattern mask to form an etching opening; and removing the top sacrificial layer, a portion of the central supporting layer, and the lower sacrificial layer based on the etch opening to form an ultimate capacitance hole. According to the invention, the problem of low stability of the capacitor support layer in the existing capacitor structure is solved.
Owner:CHANGXIN MEMORY TECH INC
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